2 #ifndef dream_armcore_H
3 #define dream_armcore_H 1
10 struct arm_registers {
11 uint32_t r[16]; /* Current register bank */
16 /* Various banked versions of the registers. */
17 uint32_t fiq_r[7]; /* FIQ bank 8..14 */
18 uint32_t irq_r[2]; /* IRQ bank 13..14 */
19 uint32_t und_r[2]; /* UND bank 13..14 */
20 uint32_t abt_r[2]; /* ABT bank 13..14 */
21 uint32_t svc_r[2]; /* SVC bank 13..14 */
22 uint32_t user_r[7]; /* User/System bank 8..14 */
26 #define CPSR_N 0x80000000 /* Negative flag */
27 #define CPSR_Z 0x40000000 /* Zero flag */
28 #define CPSR_C 0x20000000 /* Carry flag */
29 #define CPSR_V 0x10000000 /* Overflow flag */
30 #define CPSR_I 0x00000080 /* Interrupt disable bit */
31 #define CPSR_F 0x00000040 /* Fast interrupt disable bit */
32 #define CPSR_T 0x00000020 /* Thumb mode */
33 #define CPSR_MODE 0x0000001F /* Current execution mode */
35 #define MODE_USER 0x00 /* User mode */
36 #define MODE_FIQ 0x01 /* Fast IRQ mode */
37 #define MODE_IRQ 0x02 /* IRQ mode */
38 #define MODE_SV 0x03 /* Supervisor mode */
39 #define MODE_ABT 0x07 /* Abort mode */
40 #define MODE_UND 0x0B /* Undefined mode */
41 #define MODE_SYS 0x0F /* System mode */
43 extern struct arm_registers armr;
47 #endif /* !dream_armcore_H */
.
lxdream 0.9.1