4 * Provides the implementation for the ia32 ABI (eg prologue, epilogue, and
7 * Copyright (c) 2007 Nathan Keynes.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
20 #ifndef __lxdream_x86_64abi_H
21 #define __lxdream_x86_64abi_H 1
25 #define load_ptr( reg, ptr ) load_imm64( reg, (uint64_t)ptr );
28 * Note: clobbers EAX to make the indirect call - this isn't usually
29 * a problem since the callee will usually clobber it anyway.
32 #define CALL_FUNC0_SIZE 12
33 static inline void call_func0( void *ptr )
35 load_imm64(R_EAX, (uint64_t)ptr);
39 #define CALL_FUNC1_SIZE 14
40 static inline void call_func1( void *ptr, int arg1 )
42 MOV_r32_r32(arg1, R_EDI);
46 #define CALL_FUNC2_SIZE 16
47 static inline void call_func2( void *ptr, int arg1, int arg2 )
49 MOV_r32_r32(arg1, R_EDI);
50 MOV_r32_r32(arg2, R_ESI);
54 #define MEM_WRITE_DOUBLE_SIZE 35
56 * Write a double (64-bit) value into memory, with the first word in arg2a, and
59 static inline void MEM_WRITE_DOUBLE( int addr, int arg2a, int arg2b )
63 call_func2(sh4_write_long, addr, arg2a);
66 ADD_imm8s_r32(4, R_EDI);
67 call_func0(sh4_write_long);
70 #define MEM_READ_DOUBLE_SIZE 43
72 * Read a double (64-bit) value from memory, writing the first word into arg2a
73 * and the second into arg2b. The addr must not be in EAX
75 static inline void MEM_READ_DOUBLE( int addr, int arg2a, int arg2b )
77 REXW(); SUB_imm8s_r32( 8, R_ESP );
79 call_func1(sh4_read_long, addr);
82 ADD_imm8s_r32(4, R_EDI);
83 call_func0(sh4_read_long);
84 MOV_r32_r32(R_EAX, arg2b);
86 REXW(); ADD_imm8s_r32( 8, R_ESP );
91 * Emit the 'start of block' assembly. Sets up the stack frame and save
94 void sh4_translate_begin_block( sh4addr_t pc )
98 load_ptr( R_EBP, &sh4r );
100 sh4_x86.in_delay_slot = FALSE;
101 sh4_x86.priv_checked = FALSE;
102 sh4_x86.fpuen_checked = FALSE;
103 sh4_x86.branch_taken = FALSE;
104 sh4_x86.backpatch_posn = 0;
105 sh4_x86.recovery_posn = 0;
106 sh4_x86.block_start_pc = pc;
107 sh4_x86.tlb_on = IS_MMU_ENABLED();
108 sh4_x86.tstate = TSTATE_NONE;
112 * Exit the block with sh4r.pc already written
114 void exit_block_pcset( sh4addr_t pc )
116 load_imm32( R_ECX, ((pc - sh4_x86.block_start_pc)>>1)*sh4_cpu_period ); // 5
117 ADD_r32_sh4r( R_ECX, REG_OFFSET(slice_cycle) ); // 6
118 load_spreg( R_EAX, R_PC );
119 if( sh4_x86.tlb_on ) {
120 call_func1(xlat_get_code_by_vma,R_EAX);
122 call_func1(xlat_get_code,R_EAX);
129 * Exit the block with sh4r.new_pc written with the target address
131 void exit_block_newpcset( sh4addr_t pc )
133 load_imm32( R_ECX, ((pc - sh4_x86.block_start_pc)>>1)*sh4_cpu_period ); // 5
134 ADD_r32_sh4r( R_ECX, REG_OFFSET(slice_cycle) ); // 6
135 load_spreg( R_EAX, R_NEW_PC );
136 store_spreg( R_EAX, R_PC );
137 if( sh4_x86.tlb_on ) {
138 call_func1(xlat_get_code_by_vma,R_EAX);
140 call_func1(xlat_get_code,R_EAX);
146 #define EXIT_BLOCK_SIZE(pc) (25 + (IS_IN_ICACHE(pc)?10:CALL_FUNC1_SIZE))
148 * Exit the block to an absolute PC
150 void exit_block( sh4addr_t pc, sh4addr_t endpc )
152 load_imm32( R_ECX, pc ); // 5
153 store_spreg( R_ECX, REG_OFFSET(pc) ); // 3
154 if( IS_IN_ICACHE(pc) ) {
155 REXW(); MOV_moff32_EAX( xlat_get_lut_entry(pc) );
156 } else if( sh4_x86.tlb_on ) {
157 call_func1(xlat_get_code_by_vma, R_ECX);
159 call_func1(xlat_get_code,R_ECX);
161 REXW(); AND_imm8s_r32( 0xFC, R_EAX ); // 4
162 load_imm32( R_ECX, ((endpc - sh4_x86.block_start_pc)>>1)*sh4_cpu_period ); // 5
163 ADD_r32_sh4r( R_ECX, REG_OFFSET(slice_cycle) ); // 6
169 #define EXIT_BLOCK_REL_SIZE(pc) (28 + (IS_IN_ICACHE(pc)?10:CALL_FUNC1_SIZE))
172 * Exit the block to a relative PC
174 void exit_block_rel( sh4addr_t pc, sh4addr_t endpc )
176 load_imm32( R_ECX, pc - sh4_x86.block_start_pc ); // 5
177 ADD_sh4r_r32( R_PC, R_ECX );
178 store_spreg( R_ECX, REG_OFFSET(pc) ); // 3
179 if( IS_IN_ICACHE(pc) ) {
180 REXW(); MOV_moff32_EAX( xlat_get_lut_entry(GET_ICACHE_PHYS(pc)) ); // 5
181 } else if( sh4_x86.tlb_on ) {
182 call_func1(xlat_get_code_by_vma,R_ECX);
184 call_func1(xlat_get_code,R_ECX);
186 REXW(); AND_imm8s_r32( 0xFC, R_EAX ); // 4
187 load_imm32( R_ECX, ((endpc - sh4_x86.block_start_pc)>>1)*sh4_cpu_period ); // 5
188 ADD_r32_sh4r( R_ECX, REG_OFFSET(slice_cycle) ); // 6
194 * Write the block trailer (exception handling block)
196 void sh4_translate_end_block( sh4addr_t pc ) {
197 if( sh4_x86.branch_taken == FALSE ) {
198 // Didn't exit unconditionally already, so write the termination here
199 exit_block_rel( pc, pc );
201 if( sh4_x86.backpatch_posn != 0 ) {
204 uint8_t *end_ptr = xlat_output;
205 MOV_r32_r32( R_EDX, R_ECX );
206 ADD_r32_r32( R_EDX, R_ECX );
207 ADD_r32_sh4r( R_ECX, R_PC );
208 MOV_moff32_EAX( &sh4_cpu_period );
210 ADD_r32_sh4r( R_EAX, REG_OFFSET(slice_cycle) );
212 call_func0( sh4_raise_exception );
213 load_spreg( R_EAX, R_PC );
214 if( sh4_x86.tlb_on ) {
215 call_func1(xlat_get_code_by_vma,R_EAX);
217 call_func1(xlat_get_code,R_EAX);
222 // Exception already raised - just cleanup
223 uint8_t *preexc_ptr = xlat_output;
224 MOV_r32_r32( R_EDX, R_ECX );
225 ADD_r32_r32( R_EDX, R_ECX );
226 ADD_r32_sh4r( R_ECX, R_SPC );
227 MOV_moff32_EAX( &sh4_cpu_period );
229 ADD_r32_sh4r( R_EAX, REG_OFFSET(slice_cycle) );
230 load_spreg( R_EDI, R_PC );
231 if( sh4_x86.tlb_on ) {
232 call_func0(xlat_get_code_by_vma);
234 call_func0(xlat_get_code);
239 for( i=0; i< sh4_x86.backpatch_posn; i++ ) {
240 *sh4_x86.backpatch_list[i].fixup_addr =
241 xlat_output - ((uint8_t *)sh4_x86.backpatch_list[i].fixup_addr) - 4;
242 if( sh4_x86.backpatch_list[i].exc_code == -1 ) {
243 load_imm32( R_EDX, sh4_x86.backpatch_list[i].fixup_icount );
244 int rel = preexc_ptr - xlat_output;
247 load_imm32( R_EDI, sh4_x86.backpatch_list[i].exc_code );
248 load_imm32( R_EDX, sh4_x86.backpatch_list[i].fixup_icount );
249 int rel = end_ptr - xlat_output;
256 _Unwind_Reason_Code xlat_check_frame( struct _Unwind_Context *context, void *arg )
258 void *rbp = (void *)_Unwind_GetGR(context, 6);
259 if( rbp == (void *)&sh4r ) {
260 void **result = (void **)arg;
261 *result = (void *)_Unwind_GetIP(context);
262 return _URC_NORMAL_STOP;
265 return _URC_NO_REASON;
268 void *xlat_get_native_pc()
270 struct _Unwind_Exception exc;
273 _Unwind_Backtrace( xlat_check_frame, &result );
.