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lxdream.org :: lxdream/src/gdrom/ide.h
lxdream 0.9.1
released Jun 29
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filename src/gdrom/ide.h
changeset 125:49bf45f8210a
prev47:da09bcb7ce69
next138:afabd7e6d26d
author nkeynes
date Wed Mar 22 14:29:02 2006 +0000 (14 years ago)
permissions -rw-r--r--
last change Rename IDE DMA registers appropriately
Remove forced irq hack
Add correct irq handling for IDE
Miscellaneous WIP for the GD-rom drive
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     1 /**
     2  * $Id: ide.h,v 1.4 2006-03-22 14:29:02 nkeynes Exp $
     3  *
     4  * This file defines the interface and structures of the dreamcast's IDE 
     5  * port. Note that the register definitions are in asic.h, as the registers
     6  * fall into the general ASIC ranges (and I don't want to use smaller pages
     7  * at this stage). The registers here are exactly as per the ATA 
     8  * specifications, which makes things a little easier.
     9  *
    10  * Copyright (c) 2005 Nathan Keynes.
    11  *
    12  * This program is free software; you can redistribute it and/or modify
    13  * it under the terms of the GNU General Public License as published by
    14  * the Free Software Foundation; either version 2 of the License, or
    15  * (at your option) any later version.
    16  *
    17  * This program is distributed in the hope that it will be useful,
    18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    20  * GNU General Public License for more details.
    21  */
    23 #ifndef dream_ide_H
    24 #define dream_ide_H 1
    26 #include "dream.h"
    28 struct ide_registers {
    29     uint8_t status;  /* A05F709C + A05F7018 Read-only */
    30     uint8_t control; /* A05F7018 Write-only 01110 */
    31     uint8_t error;   /* A05F7084 Read-only  10001 */
    32     uint8_t feature; /* A05F7084 Write-only 10001 */
    33     uint8_t count;   /* A05F7088 Read/Write 10010 */
    34     uint8_t disc;    /* A05F708C Read-only 10011 */
    35     uint8_t lba0;    /* A05F708C Write-only 10011 (NB: Presumed, TBV */
    36     uint8_t lba1;    /* A05F7090 Read/Write 10100 */
    37     uint8_t lba2;    /* A05F7094 Read/Write 10101 */
    38     uint8_t device;  /* A05F7098 Read/Write 10110 */
    39     uint8_t command; /* A05F709C Write-only 10111 */
    41     /* We don't keep the data register per se, rather the currently pending
    42      * data is kept here and read out a byte at a time (in PIO mode) or all at
    43      * once (in DMA mode). The IDE routines are responsible for managing this
    44      * memory. If dataptr == NULL, there is no data available.
    45      */
    46     unsigned char *data;
    47     uint16_t *readptr, *writeptr;
    48     int datalen;
    49     int blocksize; /* Used to determine the transfer unit size */
    50     int blockleft; /* Bytes remaining in the current block */
    51     uint8_t intrq_pending; /* Flag to indicate if the INTRQ line is active */
    52 };
    54 #define IDE_ST_BUSY  0x80
    55 #define IDE_ST_READY 0x40
    56 #define IDE_ST_SERV  0x10
    57 #define IDE_ST_DATA  0x08
    58 #define IDE_ST_ERROR 0x01
    60 #define IDE_CTL_RESET 0x04
    61 #define IDE_CTL_IRQEN 0x02 /* IRQ enabled when == 0 */
    63 #define IDE_CMD_RESET_DEVICE 0x08
    64 #define IDE_CMD_PACKET 0xA0
    65 #define IDE_CMD_IDENTIFY_PACKET_DEVICE 0xA1
    66 #define IDE_CMD_SERVICE 0xA2
    67 #define IDE_CMD_SET_FEATURE 0xEF
    69 #define IDE_FEAT_SET_TRANSFER_MODE 0x03
    71 #define IDE_XFER_PIO        0x00
    72 #define IDE_XFER_PIO_FLOW   0x08
    73 #define IDE_XFER_MULTI_DMA  0x20
    74 #define IDE_XFER_ULTRA_DMA  0x40
    76 /* The disc register indicates the current contents of the drive. When open
    77  * contains 0x06.
    78  */
    79 #define IDE_DISC_AUDIO 0x00
    80 #define IDE_DISC_NONE  0x06
    81 #define IDE_DISC_CDROM 0x20
    82 #define IDE_DISC_GDROM 0x80
    83 #define IDE_DISC_READY 0x01 /* ored with above */
    84 #define IDE_DISC_IDLE  0x02 /* ie spun-down */
    86 #define PKT_CMD_RESET    0x00 /* Wild-ass guess */
    87 #define PKT_CMD_IDENTIFY 0x11
    88 #define PKT_CMD_SENSE    0x13
    89 #define PKT_CMD_READ_TOC 0x14
    90 #define PKT_CMD_READ_SECTOR 0x30
    92 extern struct ide_registers idereg;
    94 /* Note: control can be written at any time - all other registers are writable
    95  * only when ide_can_write_regs() is true
    96  */
    97 #define ide_can_write_regs() ((idereg.status&0x88)==0)
    98 #define IS_IDE_IRQ_ENABLED() ((idereg.control&0x02)==0)
   100 void ide_reset(void);
   102 uint16_t ide_read_data_pio(void);
   103 uint8_t ide_read_status(void);
   104 void ide_write_data_pio( uint16_t value );
   105 void ide_write_buffer( unsigned char *data, int length ); 
   107 void ide_write_command( uint8_t command );
   108 void ide_write_control( uint8_t value );
   109 #endif
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