12 void pvr2_init( void );
14 struct dreamcast_module pvr2_module = { "PVR2", pvr2_init, NULL, NULL, NULL,
17 void pvr2_init( void )
19 mem_create_ram_region( 0x05000000, 8 MB, MEM_REGION_VIDEO );
20 register_io_region( &mmio_region_PVR2 );
21 video_base = mem_get_region_by_name( MEM_REGION_VIDEO );
24 uint32_t vid_stride, vid_lpf, vid_ppl, vid_hres, vid_vres, vid_col;
25 int interlaced, bChanged = 1, bEnabled = 0, vid_size = 0;
26 char *frame_start; /* current video start address (in real memory) */
29 * Display the next frame, copying the current contents of video ram to
30 * the window. If the video configuration has changed, first recompute the
31 * new frame size/depth.
33 void pvr2_next_frame( void )
36 int dispsize = MMIO_READ( PVR2, DISPSIZE );
37 int dispmode = MMIO_READ( PVR2, DISPMODE );
38 int vidcfg = MMIO_READ( PVR2, VIDCFG );
39 vid_stride = ((dispsize & DISPSIZE_MODULO) >> 20) - 1;
40 vid_lpf = ((dispsize & DISPSIZE_LPF) >> 10) + 1;
41 vid_ppl = ((dispsize & DISPSIZE_PPL)) + 1;
42 vid_col = (dispmode & DISPMODE_COL);
43 frame_start = video_base + MMIO_READ( PVR2, DISPADDR1 );
44 interlaced = (vidcfg & VIDCFG_I ? 1 : 0);
45 bEnabled = (dispmode & DISPMODE_DE) && (vidcfg & VIDCFG_VO ) ? 1 : 0;
46 vid_size = (vid_ppl * vid_lpf) << (interlaced ? 3 : 2);
49 if( interlaced ) vid_vres <<= 1;
52 case MODE_RGB16: vid_hres <<= 1; break;
53 case MODE_RGB24: vid_hres *= 3; break;
54 case MODE_RGB32: vid_hres <<= 2; break;
57 video_update_size( vid_hres, vid_vres, vid_col );
61 /* Assume bit depths match for now... */
62 memcpy( video_data, frame_start, vid_size );
64 memset( video_data, 0, vid_size );
67 asic_event( EVENT_SCANLINE1 );
68 asic_event( EVENT_SCANLINE2 );
69 asic_event( EVENT_RETRACE );
72 void mmio_region_PVR2_write( uint32_t reg, uint32_t val )
74 if( reg >= 0x200 && reg < 0x600 ) { /* Fog table */
75 MMIO_WRITE( PVR2, reg, val );
76 /* I don't want to hear about these */
80 INFO( "PVR2 write to %08X <= %08X [%s: %s]", reg, val,
81 MMIO_REGID(PVR2,reg), MMIO_REGDESC(PVR2,reg) );
84 case DISPSIZE: bChanged = 1;
85 case DISPMODE: bChanged = 1;
86 case DISPADDR1: bChanged = 1;
87 case DISPADDR2: bChanged = 1;
88 case VIDCFG: bChanged = 1;
92 MMIO_WRITE( PVR2, reg, val );
95 MMIO_REGION_READ_FN( PVR2, reg )
99 return sh4r.icount&0x20 ? 0x2000 : 1;
101 return MMIO_READ( PVR2, reg );
.