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lxdream.org :: lxdream/src/pvr2/pvr2.h
lxdream 0.9.1
released Jun 29
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filename src/pvr2/pvr2.h
changeset 1294:52be323fcab4
prev1282:9f445c5e252b
author nkeynes
date Wed Sep 19 08:42:18 2012 +1000 (9 years ago)
permissions -rw-r--r--
last change Invalidate render buffers when vram32 region is written from DMA / store
queue. Patch from Guinux, thanks!
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     1 /**
     2  * $Id$
     3  *
     4  * PVR2 (video chip) functions and macros.
     5  *
     6  * Copyright (c) 2005 Nathan Keynes.
     7  *
     8  * This program is free software; you can redistribute it and/or modify
     9  * it under the terms of the GNU General Public License as published by
    10  * the Free Software Foundation; either version 2 of the License, or
    11  * (at your option) any later version.
    12  *
    13  * This program is distributed in the hope that it will be useful,
    14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    16  * GNU General Public License for more details.
    17  */
    19 #ifndef lxdream_pvr2_H
    20 #define lxdream_pvr2_H 1
    22 #include <stdio.h>
    23 #include "lxdream.h"
    24 #include "display.h"
    26 #ifdef __cplusplus
    27 extern "C" {
    28 #endif
    30 typedef unsigned int pvraddr_t;
    31 typedef unsigned int pvr64addr_t;
    33 #define DISPMODE_ENABLE      0x00000001 /* Display enable */
    34 #define DISPMODE_LINEDOUBLE  0x00000002 /* scanline double */
    35 #define DISPMODE_COLFMT      0x0000000C /* Colour mode */
    36 #define DISPMODE_CLOCKDIV    0x08000000 /* Clock divide-by-2 */
    38 #define DISPSIZE_MODULO 0x3FF00000 /* line skip +1 (32-bit words)*/
    39 #define DISPSIZE_LPF    0x000FFC00 /* lines per field */
    40 #define DISPSIZE_PPL    0x000003FF /* pixel words (32 bit) per line */
    42 #define DISPCFG_VP 0x00000001 /* V-sync polarity */
    43 #define DISPCFG_HP 0x00000002 /* H-sync polarity */
    44 #define DISPCFG_I  0x00000010 /* Interlace enable */
    45 #define DISPCFG_BS 0x000000C0 /* Broadcast standard */
    46 #define DISPCFG_VO 0x00000100 /* Video output enable */
    48 #define DISPSYNC_LINE_MASK  0x000003FF
    49 #define DISPSYNC_EVEN_FIELD 0x00000000
    50 #define DISPSYNC_ODD_FIELD  0x00000400
    51 #define DISPSYNC_ACTIVE     0x00000800
    52 #define DISPSYNC_HSYNC      0x00001000
    53 #define DISPSYNC_VSYNC      0x00002000
    55 #define BS_NTSC 0x00000000
    56 #define BS_PAL  0x00000040
    57 #define BS_PALM 0x00000080 /* ? */
    58 #define BS_PALN 0x000000C0 /* ? */
    60 #define SCALER_HSCALE 0x00010000
    62 #define PVR2_RAM_BASE 0x05000000
    63 #define PVR2_RAM_BASE_INT 0x04000000
    64 #define PVR2_RAM_SIZE (8 * 1024 * 1024)
    65 #define PVR2_RAM_PAGES (PVR2_RAM_SIZE>>12)
    66 #define PVR2_RAM_MASK 0x7FFFFF
    68 #define RENDER_ZONLY  0
    69 #define RENDER_NORMAL 1     /* Render non-modified polygons */
    70 #define RENDER_CHEAPMOD 2   /* Render cheap-modified polygons */
    71 #define RENDER_FULLMOD 3    /* Render the fully-modified version of the polygons */
    73 /**
    74  * Advance to the next frame
    75  */
    76 void pvr2_next_frame( void );
    78 /**
    79  * Draw the current frame on the output window.
    80  */
    81 void pvr2_draw_frame();
    82 void pvr2_set_base_address( uint32_t );
    83 int pvr2_get_frame_count( void );
    84 gboolean pvr2_save_next_scene( const gchar *filename );
    86 #define PVR2_CMD_END_OF_LIST 0x00
    87 #define PVR2_CMD_USER_CLIP   0x20
    88 #define PVR2_CMD_POLY_OPAQUE 0x80
    89 #define PVR2_CMD_MOD_OPAQUE  0x81
    90 #define PVR2_CMD_POLY_TRANS  0x82
    91 #define PVR2_CMD_MOD_TRANS   0x83
    92 #define PVR2_CMD_POLY_PUNCHOUT 0x84
    93 #define PVR2_CMD_VERTEX      0xE0
    94 #define PVR2_CMD_VERTEX_LAST 0xF0
    96 #define PVR2_VOLUME_NORMAL 0x00000000
    97 #define PVR2_VOLUME_REGION1 0x20000000
    98 #define PVR2_VOLUME_REGION0 0x40000000
   100 #define PVR2_POLY_TEXTURED 0x00000008
   101 #define PVR2_POLY_SPECULAR 0x00000004
   102 #define PVR2_POLY_SHADED   0x00000002
   103 #define PVR2_POLY_UV_16BIT 0x00000001
   105 #define PVR2_POLY_MODE_CLAMP_RGB 0x00200000
   106 #define PVR2_POLY_MODE_ALPHA    0x00100000
   107 #define PVR2_POLY_MODE_TEXALPHA 0x00080000
   108 #define PVR2_POLY_MODE_FLIP_S   0x00040000
   109 #define PVR2_POLY_MODE_FLIP_T   0x00020000
   110 #define PVR2_POLY_MODE_CLAMP_S  0x00010000
   111 #define PVR2_POLY_MODE_CLAMP_T  0x00008000
   113 #define PVR2_POLY_FOG_LOOKUP    0x00000000
   114 #define PVR2_POLY_FOG_VERTEX    0x00400000
   115 #define PVR2_POLY_FOG_DISABLED  0x00800000
   116 #define PVR2_POLY_FOG_LOOKUP2   0x00C00000
   119 #define PVR2_TEX_FORMAT_ARGB1555 0x00000000
   120 #define PVR2_TEX_FORMAT_RGB565   0x08000000
   121 #define PVR2_TEX_FORMAT_ARGB4444 0x10000000
   122 #define PVR2_TEX_FORMAT_YUV422   0x18000000
   123 #define PVR2_TEX_FORMAT_BUMPMAP  0x20000000
   124 #define PVR2_TEX_FORMAT_IDX4     0x28000000
   125 #define PVR2_TEX_FORMAT_IDX8     0x30000000
   127 #define PVR2_TEX_MIPMAP      0x80000000
   128 #define PVR2_TEX_COMPRESSED  0x40000000
   129 #define PVR2_TEX_FORMAT_MASK 0x38000000
   130 #define PVR2_TEX_UNTWIDDLED  0x04000000
   131 #define PVR2_TEX_STRIDE      0x02000000
   132 #define PVR2_TEX_IS_PALETTE(mode) ( (mode & PVR2_TEX_FORMAT_MASK) == PVR2_TEX_FORMAT_IDX4 || (mode&PVR2_TEX_FORMAT_MASK) == PVR2_TEX_FORMAT_IDX8 )
   135 #define PVR2_TEX_ADDR(x) ( ((x)&0x01FFFFF)<<3 );
   136 #define PVR2_TEX_IS_MIPMAPPED(x) ( ((x) & 0x84000000) == 0x80000000 )
   137 #define PVR2_TEX_IS_COMPRESSED(x) ( (x) & PVR2_TEX_COMPRESSED )
   138 #define PVR2_TEX_IS_TWIDDLED(x) (((x) & PVR2_TEX_UNTWIDDLED) == 0)
   139 #define PVR2_TEX_IS_STRIDE(x) (((x) & 0x06000000) == 0x06000000)
   141 /****************************** Frame Buffer *****************************/
   143 extern unsigned char pvr2_main_ram[];
   145 /**
   146  * Write a block of data to an address in the DMA range (0x10000000 -
   147  * 0x13FFFFFF), ie TA, YUV, or texture ram.
   148  */
   149 void pvr2_dma_write( sh4addr_t dest, unsigned char *src, uint32_t length );
   151 /**
   152  * Write to the linear memory address space (aka 32-bit address space).
   153  */
   154 void pvr2_vram32_write( sh4addr_t dest, unsigned char *src, uint32_t length );
   156 /**
   157  * Write to the interleaved memory address space (aka 64-bit address space).
   158  */
   159 void pvr2_vram64_write( sh4addr_t dest, unsigned char *src, uint32_t length );
   161 /**
   162  * Write to the interleaved memory address space (aka 64-bit address space),
   163  * using a line length and stride.
   164  */
   165 void pvr2_vram64_write_stride( sh4addr_t dest, unsigned char *src, uint32_t line_bytes,
   166                                uint32_t line_stride_bytes, uint32_t line_count );
   168 /**
   169  * Read from the interleaved memory address space (aka 64-bit address space)
   170  */
   171 void pvr2_vram64_read( unsigned char *dest, sh4addr_t src, uint32_t length );
   173 /**
   174  * Read a twiddled image from interleaved memory address space (aka 64-bit address
   175  * space), writing the image to the destination buffer in detwiddled format.
   176  * Width and height must be powers of 2
   177  * This version reads 4-bit pixels.
   178  */
   179 void pvr2_vram64_read_twiddled_4( unsigned char *dest, sh4addr_t src, uint32_t width, uint32_t height );
   182 /**
   183  * Read a twiddled image from interleaved memory address space (aka 64-bit address
   184  * space), writing the image to the destination buffer in detwiddled format.
   185  * Width and height must be powers of 2
   186  * This version reads 8-bit pixels.
   187  */
   188 void pvr2_vram64_read_twiddled_8( unsigned char *dest, sh4addr_t src, uint32_t width, uint32_t height );
   190 /**
   191  * Read a twiddled image from interleaved memory address space (aka 64-bit address
   192  * space), writing the image to the destination buffer in detwiddled format.
   193  * Width and height must be powers of 2, and src must be 16-bit aligned.
   194  * This version reads 16-bit pixels.
   195  */
   196 void pvr2_vram64_read_twiddled_16( unsigned char *dest, sh4addr_t src, uint32_t width, uint32_t height );
   198 /**
   199  * Read an image from the interleaved memory address space (aka 64-bit address space)
   200  * where the source and destination line sizes may differ. Note that both byte
   201  * counts must be a multiple of 4, and the src address must be 32-bit aligned.
   202  */
   203 void pvr2_vram64_read_stride( unsigned char *dest, uint32_t dest_line_bytes, sh4addr_t srcaddr,
   204                               uint32_t src_line_bytes, uint32_t line_count );
   205 /**
   206  * Dump a portion of vram to a stream from the interleaved memory address
   207  * space.
   208  */
   209 void pvr2_vram64_dump( sh4addr_t addr, uint32_t length, FILE *f );
   211 /**
   212  * Flush the indicated render buffer back to PVR. Caller is responsible for
   213  * tracking whether there is actually anything in the buffer.
   214  *
   215  * @param buffer A render buffer indicating the address to store to, and the
   216  * format the data needs to be in.
   217  * @param backBuffer TRUE to flush the back buffer, FALSE for
   218  * the front buffer.
   219  */
   220 void pvr2_render_buffer_copy_to_sh4( render_buffer_t buffer );
   222 /**
   223  * Invalidate any caching on the supplied SH4 address
   224  */
   225 gboolean pvr2_render_buffer_invalidate( sh4addr_t addr, gboolean isWrite );
   228 /**************************** Tile Accelerator ***************************/
   229 /**
   230  * Process the data in the supplied buffer as an array of TA command lists.
   231  * Any excess bytes are held pending until a complete list is sent
   232  */
   233 void pvr2_ta_write( unsigned char *buf, uint32_t length );
   235 void FASTCALL pvr2_ta_write_burst( sh4addr_t addr, unsigned char *buf );
   237 /**
   238  * Find the first polygon or sprite context in the supplied buffer of TA
   239  * data.
   240  * @return A pointer to the context, or NULL if it cannot be found
   241  */
   242 uint32_t *pvr2_ta_find_polygon_context( uint32_t *buf, uint32_t length );
   244 /**
   245  * (Re)initialize the tile accelerator in preparation for the next scene.
   246  * Normally called immediately before commencing polygon transmission.
   247  */
   248 void pvr2_ta_init( void );
   250 void pvr2_ta_reset( void );
   252 void pvr2_ta_save_state( FILE *f );
   254 int pvr2_ta_load_state( FILE *f );
   256 /****************************** YUV Converter ****************************/
   258 /**
   259  * Process a block of YUV data.
   260  */
   261 void pvr2_yuv_write( unsigned char *buf, uint32_t length );
   263 /**
   264  * Initialize the YUV converter.
   265  */
   266 void pvr2_yuv_init( uint32_t target_addr );
   268 void pvr2_yuv_set_config( uint32_t config );
   270 void pvr2_yuv_save_state( FILE *f );
   272 int pvr2_yuv_load_state( FILE *f );
   274 /********************************* Renderer ******************************/
   276 /**
   277  * Render the current scene stored in PVR ram to the GL back buffer.
   278  */
   279 void pvr2_scene_render( render_buffer_t buffer );
   281 /**
   282  * Perform the initial once-off GL setup, usually immediately after the GL
   283  * context is first bound.
   284  */
   285 void pvr2_setup_gl_context();
   287 void pvr2_shutdown_gl_context();
   289 void render_backplane( uint32_t *polygon, uint32_t width, uint32_t height, uint32_t mode );
   291 void render_autosort_tile( pvraddr_t tile_entry, int render_mode );
   293 struct polygon_struct;
   294 void gl_render_triangle( struct polygon_struct *poly, int index );
   296 void gl_render_tilelist( pvraddr_t tile_entry, gboolean set_depth );
   298 render_buffer_t pvr2_create_render_buffer( sh4addr_t addr, int width, int height, GLuint tex_id );
   300 void pvr2_finish_render_buffer( render_buffer_t buffer );
   302 void pvr2_destroy_render_buffer( render_buffer_t buffer );
   304 /**
   305  * Destroy all open render buffers
   306  */
   307 void pvr2_destroy_render_buffers( void );
   309 /**
   310  * Preserve render buffers in main memory
   311  */
   312 void pvr2_preserve_render_buffers( void );
   314 /**
   315  * Restore render buffers from a previous call to pvr2_preserve_render_buffers()
   316  */
   317 void pvr2_restore_render_buffers( void );
   319 /**
   320  * Structure to hold a complete unpacked vertex (excluding modifier
   321  * volume parameters - generate separate vertexes in that case).
   322  */
   323 struct vertex_unpacked {
   324     float x,y,z;
   325     float u,v;            /* Texture coordinates */
   326     float rgba[4];        /* Fragment colour (RGBA order) */
   327     float offset_rgba[4]; /* Offset color (RGBA order) */
   328 };
   330 /****************************** Texture Cache ****************************/
   332 /**
   333  * Initialize the texture cache.
   334  */
   335 void texcache_init( void );
   337 /**
   338  * Initialize the GL side of the texture cache (texture ids and such).
   339  */
   340 void texcache_gl_init( );
   342 /**
   343  * Flush all textures and delete. The cache will be non-functional until
   344  * the next call to texcache_gl_init(). This would typically be done if
   345  * switching GL targets.
   346  */
   347 void texcache_gl_shutdown( void );
   349 /**
   350  * Flush (ie free) all textures.
   351  */
   352 void texcache_flush( void );
   354 /**
   355  * Flush all palette-based textures (if any)
   356  */
   357 void texcache_invalidate_palette(void);
   359 /**
   360  * Evict all textures contained in the page identified by a texture address.
   361  */
   362 void texcache_invalidate_page( uint32_t texture_addr );
   364 /**
   365  * Set the global texture parameters for the scene (possibly invalidating
   366  * some existing textures)
   367  */
   368 void texcache_begin_scene( uint32_t palette_mode, uint32_t stride_width );
   370 /**
   371  * Return a texture ID for the texture specified at the supplied address
   372  * and given parameters (the same sequence of bytes could in theory have
   373  * multiple interpretations). We use the texture address as the primary
   374  * index, but allow for multiple instances at each address. The texture
   375  * will be bound to the GL_TEXTURE_2D target before being returned.
   376  *
   377  * If the texture has already been bound, return the ID to which it was
   378  * bound. Otherwise obtain an unused texture ID and set it up appropriately.
   379  */
   380 GLuint texcache_get_texture( uint32_t poly2_word, uint32_t texture_word );
   382 render_buffer_t texcache_get_render_buffer( uint32_t texture_addr, int mode, int width, int height );
   384 void pvr2_check_palette_changed(void);
   386 int pvr2_render_save_scene( const gchar *filename );
   388 /**
   389  * Queue a gun position event to occur at the specified position. Unless
   390  * cancelled, when the display reaches the position:
   391  *   GUNPOS is updated with the position, and
   392  *   EVENT_MAPLE_DMA is fired.
   393  */
   394 void pvr2_queue_gun_event( int xpos, int ypos );
   396 /************************* Rendering support macros **************************/
   397 #define POLY1_VOLUME_MODE(poly1) ((poly1)&0xE0000000)
   398 #define POLY1_DEPTH_MODE(poly1) ( pvr2_poly_depthmode[(poly1)>>29] )
   399 #define POLY1_DEPTH_WRITE(poly1) (((poly1)&0x04000000) == 0 )
   400 #define POLY1_CULL_MODE(poly1) (((poly1)>>27)&0x03)
   401 #define POLY1_CULL_ENABLE(poly1) (((poly1)>>28)&0x01)
   402 #define POLY1_TEXTURED(poly1) (((poly1)&0x02000000))
   403 #define POLY1_SPECULAR(poly1) (((poly1)&0x01000000))
   404 #define POLY1_GOURAUD_SHADED(poly1) ((poly1)&0x00800000)
   405 #define POLY1_SHADE_MODEL(poly1) (((poly1)&0x00800000) ? GL_SMOOTH : GL_FLAT)
   406 #define POLY1_UV16(poly1)   (((poly1)&0x00400000))
   407 #define POLY1_SINGLE_TILE(poly1) (((poly1)&0x00200000))
   409 #define POLY2_SRC_BLEND(poly2) ( pvr2_poly_srcblend[(poly2) >> 29] )
   410 #define POLY2_DEST_BLEND(poly2) ( pvr2_poly_dstblend[((poly2)>>26)&0x07] )
   411 #define POLY2_SRC_BLEND_TARGET(poly2)    ((poly2)&0x02000000)
   412 #define POLY2_DEST_BLEND_TARGET(poly2)   ((poly2)&0x01000000)
   413 #define POLY2_FOG_MODE(poly2)            ((poly2)&0x00C00000)
   414 #define POLY2_COLOUR_CLAMP_ENABLE(poly2) ((poly2)&0x00200000)
   415 #define POLY2_ALPHA_ENABLE(poly2)        ((poly2)&0x00100000)
   416 #define POLY2_TEX_ALPHA_ENABLE(poly2)   (((poly2)&0x00080000) == 0 )
   417 #define POLY2_TEX_MIRROR_U(poly2)        ((poly2)&0x00040000)
   418 #define POLY2_TEX_MIRROR_V(poly2)        ((poly2)&0x00020000)
   419 #define POLY2_TEX_CLAMP_U(poly2)         ((poly2)&0x00010000)
   420 #define POLY2_TEX_CLAMP_V(poly2)         ((poly2)&0x00008000)
   421 #define POLY2_TEX_WIDTH(poly2) ( 1<< ((((poly2) >> 3) & 0x07 ) + 3) )
   422 #define POLY2_TEX_HEIGHT(poly2) ( 1<< (((poly2) & 0x07 ) + 3) )
   423 #define POLY2_TEX_BLEND(poly2) (((poly2) >> 6)&0x03)
   424 extern int pvr2_poly_depthmode[8];
   425 extern int pvr2_poly_srcblend[8];
   426 extern int pvr2_poly_dstblend[8];
   427 extern int pvr2_render_colour_format[8];
   429 #define CULL_NONE 0
   430 #define CULL_SMALL 1
   431 #define CULL_CCW 2
   432 #define CULL_CW 3
   434 #define SEGMENT_END         0x80000000
   435 #define SEGMENT_ZCLEAR      0x40000000
   436 #define SEGMENT_SORT_TRANS  0x20000000
   437 #define SEGMENT_START       0x10000000
   438 #define SEGMENT_X(c)        (((c) >> 2) & 0x3F)
   439 #define SEGMENT_Y(c)        (((c) >> 8) & 0x3F)
   440 #define NO_POINTER          0x80000000
   441 #define IS_TILE_PTR(p)      ( ((p)&NO_POINTER) == 0 )
   442 #define IS_LAST_SEGMENT(s)  (((s)->control) & SEGMENT_END)
   444 struct tile_segment {
   445     uint32_t control;
   446     pvraddr_t opaque_ptr;
   447     pvraddr_t opaquemod_ptr;
   448     pvraddr_t trans_ptr;
   449     pvraddr_t transmod_ptr;
   450     pvraddr_t punchout_ptr;
   451 };
   454 struct tile_bounds {
   455     int32_t x1, y1, x2, y2;
   456 };
   458 #ifdef __cplusplus
   459 }
   460 #endif
   462 #endif /* !lxdream_pvr2_H */
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