filename | src/pvr2/pvr2.h |
changeset | 325:5717ae5d4746 |
prev | 322:354407942957 |
next | 327:00d55a462af3 |
author | nkeynes |
date | Thu Jan 25 10:16:32 2007 +0000 (14 years ago) |
permissions | -rw-r--r-- |
last change | Move PVR2 dma handling (0x10000000-0x13FFFFFF) into pvr2mem.c, minor register cleanups in asic.c |
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1 /**
2 * $Id: pvr2.h,v 1.28 2007-01-25 10:16:32 nkeynes Exp $
3 *
4 * PVR2 (video chip) functions and macros.
5 *
6 * Copyright (c) 2005 Nathan Keynes.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
19 #include "dream.h"
20 #include "mem.h"
21 #include "display.h"
22 #include "pvr2/pvr2mmio.h"
23 #include <GL/gl.h>
25 typedef unsigned int pvraddr_t;
26 typedef unsigned int pvr64addr_t;
28 #define DISPMODE_DE 0x00000001 /* Display enable */
29 #define DISPMODE_SD 0x00000002 /* Scan double */
30 #define DISPMODE_COL 0x0000000C /* Colour mode */
31 #define DISPMODE_CD 0x08000000 /* Clock double */
33 #define COLFMT_RGB15 0x00000000
34 #define COLFMT_RGB16 0x00000004
35 #define COLFMT_RGB24 0x00000008
36 #define COLFMT_RGB32 0x0000000C
38 #define DISPSIZE_MODULO 0x3FF00000 /* line skip +1 (32-bit words)*/
39 #define DISPSIZE_LPF 0x000FFC00 /* lines per field */
40 #define DISPSIZE_PPL 0x000003FF /* pixel words (32 bit) per line */
42 #define DISPCFG_VP 0x00000001 /* V-sync polarity */
43 #define DISPCFG_HP 0x00000002 /* H-sync polarity */
44 #define DISPCFG_I 0x00000010 /* Interlace enable */
45 #define DISPCFG_BS 0x000000C0 /* Broadcast standard */
46 #define DISPCFG_VO 0x00000100 /* Video output enable */
48 #define BS_NTSC 0x00000000
49 #define BS_PAL 0x00000040
50 #define BS_PALM 0x00000080 /* ? */
51 #define BS_PALN 0x000000C0 /* ? */
53 #define PVR2_RAM_BASE 0x05000000
54 #define PVR2_RAM_BASE_INT 0x04000000
55 #define PVR2_RAM_SIZE (8 * 1024 * 1024)
56 #define PVR2_RAM_PAGES (PVR2_RAM_SIZE>>12)
57 #define PVR2_RAM_MASK 0x7FFFFF
59 #define RENDER_ZONLY 0
60 #define RENDER_NORMAL 1 /* Render non-modified polygons */
61 #define RENDER_CHEAPMOD 2 /* Render cheap-modified polygons */
62 #define RENDER_FULLMOD 3 /* Render the fully-modified version of the polygons */
64 void pvr2_next_frame( void );
65 void pvr2_set_base_address( uint32_t );
66 int pvr2_get_frame_count( void );
67 gboolean pvr2_save_next_scene( const gchar *filename );
69 #define PVR2_CMD_END_OF_LIST 0x00
70 #define PVR2_CMD_USER_CLIP 0x20
71 #define PVR2_CMD_POLY_OPAQUE 0x80
72 #define PVR2_CMD_MOD_OPAQUE 0x81
73 #define PVR2_CMD_POLY_TRANS 0x82
74 #define PVR2_CMD_MOD_TRANS 0x83
75 #define PVR2_CMD_POLY_PUNCHOUT 0x84
76 #define PVR2_CMD_VERTEX 0xE0
77 #define PVR2_CMD_VERTEX_LAST 0xF0
79 #define PVR2_POLY_TEXTURED 0x00000008
80 #define PVR2_POLY_SPECULAR 0x00000004
81 #define PVR2_POLY_SHADED 0x00000002
82 #define PVR2_POLY_UV_16BIT 0x00000001
84 #define PVR2_POLY_MODE_CLAMP_RGB 0x00200000
85 #define PVR2_POLY_MODE_ALPHA 0x00100000
86 #define PVR2_POLY_MODE_TEXALPHA 0x00080000
87 #define PVR2_POLY_MODE_FLIP_S 0x00040000
88 #define PVR2_POLY_MODE_FLIP_T 0x00020000
89 #define PVR2_POLY_MODE_CLAMP_S 0x00010000
90 #define PVR2_POLY_MODE_CLAMP_T 0x00008000
92 #define PVR2_TEX_FORMAT_ARGB1555 0x00000000
93 #define PVR2_TEX_FORMAT_RGB565 0x08000000
94 #define PVR2_TEX_FORMAT_ARGB4444 0x10000000
95 #define PVR2_TEX_FORMAT_YUV422 0x18000000
96 #define PVR2_TEX_FORMAT_BUMPMAP 0x20000000
97 #define PVR2_TEX_FORMAT_IDX4 0x28000000
98 #define PVR2_TEX_FORMAT_IDX8 0x30000000
100 #define PVR2_TEX_MIPMAP 0x80000000
101 #define PVR2_TEX_COMPRESSED 0x40000000
102 #define PVR2_TEX_FORMAT_MASK 0x38000000
103 #define PVR2_TEX_UNTWIDDLED 0x04000000
104 #define PVR2_TEX_STRIDE 0x02000000
106 #define PVR2_TEX_ADDR(x) ( ((x)&0x01FFFFF)<<3 );
107 #define PVR2_TEX_IS_MIPMAPPED(x) ( (x) & PVR2_TEX_MIPMAP )
108 #define PVR2_TEX_IS_COMPRESSED(x) ( (x) & PVR2_TEX_COMPRESSED )
109 #define PVR2_TEX_IS_TWIDDLED(x) (((x) & PVR2_TEX_UNTWIDDLED) == 0)
110 #define PVR2_TEX_IS_STRIDE(x) (((x) & 0x06000000) == 0x06000000)
112 /****************************** Frame Buffer *****************************/
114 /**
115 * Write a block of data to an address in the DMA range (0x10000000 -
116 * 0x13FFFFFF), ie TA, YUV, or texture ram.
117 */
118 void pvr2_dma_write( sh4addr_t dest, char *src, uint32_t length );
120 /**
121 * Write to the interleaved memory address space (aka 64-bit address space).
122 */
123 void pvr2_vram64_write( sh4addr_t dest, char *src, uint32_t length );
125 /**
126 * Write to the interleaved memory address space (aka 64-bit address space),
127 * using a line length and stride.
128 */
129 void pvr2_vram64_write_stride( sh4addr_t dest, char *src, uint32_t line_bytes,
130 uint32_t line_stride_bytes, uint32_t line_count );
132 /**
133 * Read from the interleaved memory address space (aka 64-bit address space)
134 */
135 void pvr2_vram64_read( char *dest, sh4addr_t src, uint32_t length );
137 /**
138 * Read a twiddled image from interleaved memory address space (aka 64-bit address
139 * space), writing the image to the destination buffer in detwiddled format.
140 * Width and height must be powers of 2
141 * This version reads 4-bit pixels.
142 */
143 void pvr2_vram64_read_twiddled_4( char *dest, sh4addr_t src, uint32_t width, uint32_t height );
146 /**
147 * Read a twiddled image from interleaved memory address space (aka 64-bit address
148 * space), writing the image to the destination buffer in detwiddled format.
149 * Width and height must be powers of 2
150 * This version reads 8-bit pixels.
151 */
152 void pvr2_vram64_read_twiddled_8( char *dest, sh4addr_t src, uint32_t width, uint32_t height );
154 /**
155 * Read a twiddled image from interleaved memory address space (aka 64-bit address
156 * space), writing the image to the destination buffer in detwiddled format.
157 * Width and height must be powers of 2, and src must be 16-bit aligned.
158 * This version reads 16-bit pixels.
159 */
160 void pvr2_vram64_read_twiddled_16( char *dest, sh4addr_t src, uint32_t width, uint32_t height );
162 /**
163 * Read an image from the interleaved memory address space (aka 64-bit address space)
164 * where the source and destination line sizes may differ. Note that both byte
165 * counts must be a multiple of 4, and the src address must be 32-bit aligned.
166 */
167 void pvr2_vram64_read_stride( char *dest, uint32_t dest_line_bytes, sh4addr_t srcaddr,
168 uint32_t src_line_bytes, uint32_t line_count );
169 /**
170 * Dump a portion of vram to a stream from the interleaved memory address
171 * space.
172 */
173 void pvr2_vram64_dump( sh4addr_t addr, uint32_t length, FILE *f );
176 /**
177 * Describes a rendering buffer that's actually held in GL, for when we need
178 * to fetch the bits back to vram.
179 */
180 typedef struct pvr2_render_buffer {
181 sh4addr_t render_addr; /* The actual address rendered to in pvr ram */
182 uint32_t size; /* Length of rendering region in bytes */
183 int width, height;
184 int colour_format;
185 } *pvr2_render_buffer_t;
187 /**
188 * Flush the indicated render buffer back to PVR. Caller is responsible for
189 * tracking whether there is actually anything in the buffer.
190 *
191 * @param buffer A render buffer indicating the address to store to, and the
192 * format the data needs to be in.
193 * @param backBuffer TRUE to flush the back buffer, FALSE for
194 * the front buffer.
195 */
196 void pvr2_render_buffer_copy_to_sh4( pvr2_render_buffer_t buffer,
197 gboolean backBuffer );
199 /**
200 * Copy data from PVR ram into the GL render buffer.
201 *
202 * @param buffer A render buffer indicating the address to read from, and the
203 * format the data is in.
204 * @param backBuffer TRUE to write the back buffer, FALSE for
205 * the front buffer.
206 */
207 void pvr2_render_buffer_copy_from_sh4( pvr2_render_buffer_t buffer,
208 gboolean backBuffer );
211 /**
212 * Invalidate any caching on the supplied SH4 address
213 */
214 gboolean pvr2_render_buffer_invalidate( sh4addr_t addr );
217 /**************************** Tile Accelerator ***************************/
218 /**
219 * Process the data in the supplied buffer as an array of TA command lists.
220 * Any excess bytes are held pending until a complete list is sent
221 */
222 void pvr2_ta_write( char *buf, uint32_t length );
225 /**
226 * (Re)initialize the tile accelerator in preparation for the next scene.
227 * Normally called immediately before commencing polygon transmission.
228 */
229 void pvr2_ta_init( void );
232 /****************************** YUV Converter ****************************/
234 /**
235 * Process a block of YUV data.
236 */
237 void pvr2_yuv_write( char *buf, uint32_t length );
239 /**
240 * Initialize the YUV converter.
241 */
242 void pvr2_yuv_init( uint32_t target_addr );
244 void pvr2_yuv_set_config( uint32_t config );
246 /********************************* Renderer ******************************/
248 /**
249 * Initialize the rendering pipeline.
250 * @return TRUE on success, FALSE on failure.
251 */
252 gboolean pvr2_render_init( void );
254 /**
255 * Render the current scene stored in PVR ram to the GL back buffer.
256 */
257 void pvr2_render_scene( void );
259 /**
260 * Display the scene rendered to the supplied address.
261 * @return TRUE if there was an available render that was displayed,
262 * otherwise FALSE (and no action was taken)
263 */
264 gboolean pvr2_render_display_frame( uint32_t address );
267 void render_backplane( uint32_t *polygon, uint32_t width, uint32_t height, uint32_t mode );
269 void render_set_context( uint32_t *context, int render_mode );
271 void pvr2_render_tilebuffer( int width, int height, int clipx1, int clipy1,
272 int clipx2, int clipy2 );
274 float pvr2_render_find_maximum_z();
275 /**
276 * Structure to hold a complete unpacked vertex (excluding modifier
277 * volume parameters - generate separate vertexes in that case).
278 */
279 struct vertex_unpacked {
280 float x,y,z;
281 float u,v; /* Texture coordinates */
282 float rgba[4]; /* Fragment colour (RGBA order) */
283 float offset_rgba[4]; /* Offset color (RGBA order) */
284 };
286 void render_unpacked_vertex_array( uint32_t poly1, struct vertex_unpacked *vertexes[],
287 int num_vertexes );
289 void render_vertex_array( uint32_t poly1, uint32_t *vertexes[], int num_vertexes,
290 int vertex_size, int render_mode );
292 /****************************** Texture Cache ****************************/
294 /**
295 * Initialize the texture cache.
296 */
297 void texcache_init( void );
299 /**
300 * Initialize the GL side of the texture cache (texture ids and such).
301 */
302 void texcache_gl_init( void );
304 /**
305 * Flush all textures and delete. The cache will be non-functional until
306 * the next call to texcache_init(). This would typically be done if
307 * switching GL targets.
308 */
309 void texcache_shutdown( void );
311 /**
312 * Evict all textures contained in the page identified by a texture address.
313 */
314 void texcache_invalidate_page( uint32_t texture_addr );
316 /**
317 * Return a texture ID for the texture specified at the supplied address
318 * and given parameters (the same sequence of bytes could in theory have
319 * multiple interpretations). We use the texture address as the primary
320 * index, but allow for multiple instances at each address. The texture
321 * will be bound to the GL_TEXTURE_2D target before being returned.
322 *
323 * If the texture has already been bound, return the ID to which it was
324 * bound. Otherwise obtain an unused texture ID and set it up appropriately.
325 */
326 GLuint texcache_get_texture( uint32_t texture_addr, int width, int height,
327 int mode );
329 /************************* Rendering support macros **************************/
330 #define POLY1_DEPTH_MODE(poly1) ( pvr2_poly_depthmode[(poly1)>>29] )
331 #define POLY1_DEPTH_ENABLE(poly1) (((poly1)&0x04000000) == 0 )
332 #define POLY1_CULL_MODE(poly1) (((poly1)>>27)&0x03)
333 #define POLY1_TEXTURED(poly1) (((poly1)&0x02000000))
334 #define POLY1_SPECULAR(poly1) (((poly1)&0x01000000))
335 #define POLY1_GOURAUD_SHADED(poly1) ((poly1)&0x00800000)
336 #define POLY1_SHADE_MODEL(poly1) (((poly1)&0x00800000) ? GL_SMOOTH : GL_FLAT)
337 #define POLY1_UV16(poly1) (((poly1)&0x00400000))
338 #define POLY1_SINGLE_TILE(poly1) (((poly1)&0x00200000))
340 #define POLY2_SRC_BLEND(poly2) ( pvr2_poly_srcblend[(poly2) >> 29] )
341 #define POLY2_DEST_BLEND(poly2) ( pvr2_poly_dstblend[((poly2)>>26)&0x07] )
342 #define POLY2_SRC_BLEND_TARGET(poly2) ((poly2)&0x02000000)
343 #define POLY2_DEST_BLEND_TARGET(poly2) ((poly2)&0x01000000)
344 #define POLY2_COLOUR_CLAMP_ENABLE(poly2) ((poly2)&0x00200000)
345 #define POLY2_ALPHA_ENABLE(poly2) ((poly2)&0x00100000)
346 #define POLY2_TEX_ALPHA_ENABLE(poly2) (((poly2)&0x00080000) == 0 )
347 #define POLY2_TEX_CLAMP_U(poly2) ((poly2)&0x00010000)
348 #define POLY2_TEX_CLAMP_V(poly2) ((poly2)&0x00008000)
349 #define POLY2_TEX_WIDTH(poly2) ( 1<< ((((poly2) >> 3) & 0x07 ) + 3) )
350 #define POLY2_TEX_HEIGHT(poly2) ( 1<< (((poly2) & 0x07 ) + 3) )
351 #define POLY2_TEX_BLEND(poly2) ( pvr2_poly_texblend[((poly2) >> 6)&0x03] )
352 extern int pvr2_poly_depthmode[8];
353 extern int pvr2_poly_srcblend[8];
354 extern int pvr2_poly_dstblend[8];
355 extern int pvr2_poly_texblend[4];
356 extern int pvr2_render_colour_format[8];
358 float halftofloat(uint16_t half);
.