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filename src/sh4/sh4mem.c
changeset 828:b42865f00fb5
prev740:dd11269ee48b
next905:4c17ebd9ef5e
author nkeynes
date Wed Oct 29 23:36:31 2008 +0000 (15 years ago)
permissions -rw-r--r--
last change Enable the FIPR SSE3 code for now, and add a comment on the sh4r.fr alignment
view annotate diff log raw 
     1 /**

     2  * $Id$

     3  * sh4mem.c is responsible for the SH4's access to memory (including memory

     4  * mapped I/O), using the page maps created in mem.c

     5  *

     6  * Copyright (c) 2005 Nathan Keynes.

     7  *

     8  * This program is free software; you can redistribute it and/or modify

     9  * it under the terms of the GNU General Public License as published by

    10  * the Free Software Foundation; either version 2 of the License, or

    11  * (at your option) any later version.

    12  *

    13  * This program is distributed in the hope that it will be useful,

    14  * but WITHOUT ANY WARRANTY; without even the implied warranty of

    15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

    16  * GNU General Public License for more details.

    17  */

    18 

    19 #define MODULE sh4_module

    20 

    21 #include <string.h>

    22 #include <zlib.h>

    23 #include "dream.h"

    24 #include "mem.h"

    25 #include "mmio.h"

    26 #include "dreamcast.h"

    27 #include "sh4/sh4core.h"

    28 #include "sh4/sh4mmio.h"

    29 #include "sh4/xltcache.h"

    30 #include "pvr2/pvr2.h"

    31 #include "asic.h"

    32 

    33 #define OC_BASE 0x1C000000

    34 #define OC_TOP  0x20000000

    35 

    36 #define TRANSLATE_VIDEO_64BIT_ADDRESS(a)  ( (((a)&0x00FFFFF8)>>1)|(((a)&0x00000004)<<20)|((a)&0x03)|0x05000000 )

    37 

    38 #ifdef ENABLE_WATCH

    39 #define CHECK_READ_WATCH( addr, size ) \

    40     if( mem_is_watched(addr,size,WATCH_READ) != NULL ) { \

    41         WARN( "Watch triggered at %08X by %d byte read", addr, size ); \

    42         sh4_core_exit(CORE_EXIT_HALT); \

    43     }

    44 #define CHECK_WRITE_WATCH( addr, size, val )                  \

    45     if( mem_is_watched(addr,size,WATCH_WRITE) != NULL ) { \

    46         WARN( "Watch triggered at %08X by %d byte write <= %0*X", addr, size, size*2, val ); \

    47         sh4_core_exit(CORE_EXIT_HALT); \

    48     }

    49 #else

    50 #define CHECK_READ_WATCH( addr, size )

    51 #define CHECK_WRITE_WATCH( addr, size, val )

    52 #endif

    53 

    54 #ifdef ENABLE_TRACE_IO

    55 #define TRACE_IO( str, p, r, ... ) if(io_rgn[(uint32_t)p]->trace_flag && !MMIO_NOTRACE_BYNUM((uint32_t)p,r)) \

    56     TRACE( str " [%s.%s: %s]", __VA_ARGS__,			       \

    57             MMIO_NAME_BYNUM((uint32_t)p), MMIO_REGID_BYNUM((uint32_t)p, r), \

    58             MMIO_REGDESC_BYNUM((uint32_t)p, r) )

    59 #define TRACE_P4IO( str, io, r, ... ) if(io->trace_flag && !MMIO_NOTRACE_IOBYNUM(io,r)) \

    60     TRACE( str " [%s.%s: %s]", __VA_ARGS__, \

    61             io->id, MMIO_REGID_IOBYNUM(io, r), \

    62             MMIO_REGDESC_IOBYNUM(io, r) )

    63 #else

    64 #define TRACE_IO( str, p, r, ... )

    65 #define TRACE_P4IO( str, io, r, ... )

    66 #endif

    67 

    68 extern struct mem_region mem_rgn[];

    69 extern struct mmio_region *P4_io[];

    70 

    71 int32_t sh4_read_p4( sh4addr_t addr )

    72 {

    73     struct mmio_region *io = P4_io[(addr&0x1FFFFFFF)>>19];

    74     if( !io ) {

    75         switch( addr & 0x1F000000 ) {

    76         case 0x00000000: case 0x01000000: case 0x02000000: case 0x03000000: 

    77             /* Store queue - readable? */

    78             return 0;

    79             break;

    80         case 0x10000000: return mmu_icache_addr_read( addr );

    81         case 0x11000000: return mmu_icache_data_read( addr );

    82         case 0x12000000: return mmu_itlb_addr_read( addr );

    83         case 0x13000000: return mmu_itlb_data_read( addr );

    84         case 0x14000000: return mmu_ocache_addr_read( addr );

    85         case 0x15000000: return mmu_ocache_data_read( addr );

    86         case 0x16000000: return mmu_utlb_addr_read( addr );

    87         case 0x17000000: return mmu_utlb_data_read( addr );

    88         default:

    89             WARN( "Attempted read from unknown or invalid P4 region: %08X", addr );

    90             return 0;

    91         }

    92     } else {

    93         int32_t val = io->io_read( addr&0xFFF );

    94         TRACE_P4IO( "Long read %08X <= %08X", io, (addr&0xFFF), val, addr );

    95         return val;

    96     }    

    97 }

    98 

    99 void sh4_write_p4( sh4addr_t addr, int32_t val )

   100 {

   101     struct mmio_region *io = P4_io[(addr&0x1FFFFFFF)>>19];

   102     if( !io ) {

   103         switch( addr & 0x1F000000 ) {

   104         case 0x00000000: case 0x01000000: case 0x02000000: case 0x03000000: 

   105             /* Store queue */

   106             SH4_WRITE_STORE_QUEUE( addr, val );

   107             break;

   108         case 0x10000000: mmu_icache_addr_write( addr, val ); break;

   109         case 0x11000000: mmu_icache_data_write( addr, val ); break;

   110         case 0x12000000: mmu_itlb_addr_write( addr, val ); break;

   111         case 0x13000000: mmu_itlb_data_write( addr, val ); break;

   112         case 0x14000000: mmu_ocache_addr_write( addr, val ); break;

   113         case 0x15000000: mmu_ocache_data_write( addr, val ); break;

   114         case 0x16000000: mmu_utlb_addr_write( addr, val ); break;

   115         case 0x17000000: mmu_utlb_data_write( addr, val ); break;

   116         default:

   117             if( (addr & 0xFFFF0000 ) == 0xFF940000 ||

   118                 (addr & 0xFFFF0000 ) == 0xFF900000 ) {

   119                 // SDRAM configuration, ignore for now

   120             } else {

   121                 WARN( "Attempted write to unknown P4 region: %08X", addr );

   122             }

   123         }

   124     } else {

   125         TRACE_P4IO( "Long write %08X => %08X", io, (addr&0xFFF), val, addr );

   126         io->io_write( addr&0xFFF, val );

   127     }

   128 }

   129 

   130 int32_t sh4_read_phys_word( sh4addr_t addr )

   131 {

   132     sh4ptr_t page;

   133     if( addr >= 0xE0000000 ) /* P4 Area, handled specially */

   134         return SIGNEXT16(sh4_read_p4( addr ));

   135 

   136     if( (addr&0x1F800000) == 0x04000000 ) {

   137         addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);

   138     }

   139 

   140     page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];

   141     if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */

   142         if( page == NULL ) {

   143             WARN( "Attempted word read to missing page: %08X",

   144                     addr );

   145             return 0;

   146         }

   147         return SIGNEXT16(io_rgn[(uintptr_t)page]->io_read(addr&0xFFF));

   148     } else {

   149         return SIGNEXT16(*(int16_t *)(page+(addr&0xFFF)));

   150     }

   151 }

   152 

   153 /**

   154  * Convenience function to read a quad-word (implemented as two long reads).

   155  */

   156 int64_t sh4_read_quad( sh4addr_t addr )

   157 {

   158     return ((int64_t)((uint32_t)sh4_read_long(addr))) |

   159     (((int64_t)((uint32_t)sh4_read_long(addr+4))) << 32);

   160 }

   161 

   162 int32_t sh4_read_long( sh4addr_t addr )

   163 {

   164     sh4ptr_t page;

   165 

   166     CHECK_READ_WATCH(addr,4);

   167 

   168     if( addr >= 0xE0000000 ) { /* P4 Area, handled specially */

   169         return ZEROEXT32(sh4_read_p4( addr ));

   170     } else if( (addr&0x1C000000) == 0x0C000000 ) {

   171         return ZEROEXT32(*(int32_t *)(sh4_main_ram + (addr&0x00FFFFFF)));

   172     } else if( (addr&0x1F800000) == 0x04000000 ) {

   173         addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);

   174         pvr2_render_buffer_invalidate(addr, FALSE);

   175     } else if( (addr&0x1F800000) == 0x05000000 ) {

   176         pvr2_render_buffer_invalidate(addr, FALSE);

   177     }

   178 

   179     page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];

   180     if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */

   181         int32_t val;

   182         if( page == NULL ) {

   183             WARN( "Attempted long read to missing page: %08X", addr );

   184             return 0;

   185         }

   186         val = io_rgn[(uintptr_t)page]->io_read(addr&0xFFF);

   187         TRACE_IO( "Long read %08X <= %08X", page, (addr&0xFFF), val, addr );

   188         return ZEROEXT32(val);

   189     } else {

   190         return ZEROEXT32(*(int32_t *)(page+(addr&0xFFF)));

   191     }

   192 }

   193 

   194 int32_t sh4_read_word( sh4addr_t addr )

   195 {

   196     sh4ptr_t page;

   197 

   198     CHECK_READ_WATCH(addr,2);

   199 

   200     if( addr >= 0xE0000000 ) { /* P4 Area, handled specially */

   201         return ZEROEXT32(SIGNEXT16(sh4_read_p4( addr )));

   202     } else if( (addr&0x1C000000) == 0x0C000000 ) {

   203         return ZEROEXT32(SIGNEXT16(*(int16_t *)(sh4_main_ram + (addr&0x00FFFFFF))));

   204     } else if( (addr&0x1F800000) == 0x04000000 ) {

   205         addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);

   206         pvr2_render_buffer_invalidate(addr, FALSE);

   207     } else if( (addr&0x1F800000) == 0x05000000 ) {

   208         pvr2_render_buffer_invalidate(addr, FALSE);

   209     }

   210 

   211     page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];

   212     if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */

   213         int32_t val;

   214         if( page == NULL ) {

   215             WARN( "Attempted word read to missing page: %08X", addr );

   216             return 0;

   217         }

   218         val = SIGNEXT16(io_rgn[(uintptr_t)page]->io_read(addr&0xFFF));

   219         TRACE_IO( "Word read %04X <= %08X", page, (addr&0xFFF), val&0xFFFF, addr );

   220         return ZEROEXT32(val);

   221     } else {

   222         return ZEROEXT32(SIGNEXT16(*(int16_t *)(page+(addr&0xFFF))));

   223     }

   224 }

   225 

   226 int32_t sh4_read_byte( sh4addr_t addr )

   227 {

   228     sh4ptr_t page;

   229 

   230     CHECK_READ_WATCH(addr,1);

   231 

   232     if( addr >= 0xE0000000 ) { /* P4 Area, handled specially */

   233         return ZEROEXT32(SIGNEXT8(sh4_read_p4( addr )));

   234     } else if( (addr&0x1C000000) == 0x0C000000 ) {

   235         return ZEROEXT32(SIGNEXT8(*(int8_t *)(sh4_main_ram + (addr&0x00FFFFFF))));

   236     } else if( (addr&0x1F800000) == 0x04000000 ) {

   237         addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);

   238         pvr2_render_buffer_invalidate(addr, FALSE);

   239     } else if( (addr&0x1F800000) == 0x05000000 ) {

   240         pvr2_render_buffer_invalidate(addr, FALSE);

   241     }

   242 

   243 

   244     page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];

   245     if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */

   246         int32_t val;

   247         if( page == NULL ) {

   248             WARN( "Attempted byte read to missing page: %08X", addr );

   249             return 0;

   250         }

   251         val = SIGNEXT8(io_rgn[(uintptr_t)page]->io_read(addr&0xFFF));

   252         TRACE_IO( "Byte read %02X <= %08X", page, (addr&0xFFF), val&0xFF, addr );

   253         return ZEROEXT32(val);

   254     } else {

   255         return ZEROEXT32(SIGNEXT8(*(int8_t *)(page+(addr&0xFFF))));

   256     }

   257 }

   258 

   259 /**

   260  * Convenience function to write a quad-word (implemented as two long writes).

   261  */

   262 void sh4_write_quad( sh4addr_t addr, uint64_t val )

   263 {

   264     sh4_write_long( addr, (uint32_t)val );

   265     sh4_write_long( addr+4, (uint32_t)(val>>32) );

   266 }

   267 

   268 void sh4_write_long( sh4addr_t addr, uint32_t val )

   269 {

   270     sh4ptr_t page;

   271 

   272     CHECK_WRITE_WATCH(addr,4,val);

   273 

   274     if( addr >= 0xE0000000 ) {

   275         sh4_write_p4( addr, val );

   276         return;

   277     } else if( (addr&0x1C000000) == 0x0C000000 ) {

   278         *(uint32_t *)(sh4_main_ram + (addr&0x00FFFFFF)) = val;

   279         xlat_invalidate_long(addr);

   280         return;

   281     } else if( (addr&0x1F800000) == 0x04000000 || 

   282             (addr&0x1F800000) == 0x11000000 ) {

   283         texcache_invalidate_page(addr& 0x7FFFFF);

   284         addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);

   285         pvr2_render_buffer_invalidate(addr, TRUE);

   286     } else if( (addr&0x1F800000) == 0x05000000 ) {

   287         pvr2_render_buffer_invalidate(addr, TRUE);

   288     }

   289 

   290     if( (addr&0x1FFFFFFF) < 0x200000 ) {

   291         WARN( "Attempted write to read-only memory: %08X => %08X", val, addr);

   292         sh4_stop();

   293         return;

   294     }

   295     if( (addr&0x1F800000) == 0x00800000 )

   296         asic_g2_write_word();

   297 

   298     page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];

   299     if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */

   300         if( page == NULL ) {

   301             if( (addr & 0x1F000000) >= 0x04000000 &&

   302                     (addr & 0x1F000000) < 0x07000000 )

   303                 return;

   304             WARN( "Long write to missing page: %08X => %08X", val, addr );

   305             return;

   306         }

   307         TRACE_IO( "Long write %08X => %08X", page, (addr&0xFFF), val, addr );

   308         io_rgn[(uintptr_t)page]->io_write(addr&0xFFF, val);

   309     } else {

   310         *(uint32_t *)(page+(addr&0xFFF)) = val;

   311     }

   312 }

   313 

   314 void sh4_write_word( sh4addr_t addr, uint32_t val )

   315 {

   316     sh4ptr_t page;

   317 

   318     CHECK_WRITE_WATCH(addr,2,val);

   319 

   320     if( addr >= 0xE0000000 ) {

   321         sh4_write_p4( addr, (int16_t)val );

   322         return;

   323     } else if( (addr&0x1C000000) == 0x0C000000 ) {

   324         *(uint16_t *)(sh4_main_ram + (addr&0x00FFFFFF)) = val;

   325         xlat_invalidate_word(addr);

   326         return;

   327     } else if( (addr&0x1F800000) == 0x04000000 ||

   328             (addr&0x1F800000) == 0x11000000 ) {

   329         texcache_invalidate_page(addr& 0x7FFFFF);

   330         addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);

   331         pvr2_render_buffer_invalidate(addr, TRUE);

   332     } else if( (addr&0x1F800000) == 0x05000000 ) {

   333         pvr2_render_buffer_invalidate(addr, TRUE);

   334     }

   335 

   336     if( (addr&0x1FFFFFFF) < 0x200000 ) {

   337         WARN( "Attempted write to read-only memory: %08X => %08X", val, addr);

   338         sh4_stop();

   339         return;

   340     }

   341     page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];

   342     if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */

   343         if( page == NULL ) {

   344             WARN( "Attempted word write to missing page: %08X", addr );

   345             return;

   346         }

   347         TRACE_IO( "Word write %04X => %08X", page, (addr&0xFFF), val&0xFFFF, addr );

   348         io_rgn[(uintptr_t)page]->io_write(addr&0xFFF, val);

   349     } else {

   350         *(uint16_t *)(page+(addr&0xFFF)) = val;

   351     }

   352 }

   353 

   354 void sh4_write_byte( sh4addr_t addr, uint32_t val )

   355 {

   356     sh4ptr_t page;

   357 

   358     CHECK_WRITE_WATCH(addr,1,val);

   359 

   360     if( addr >= 0xE0000000 ) {

   361         sh4_write_p4( addr, (int8_t)val );

   362         return;

   363     } else if( (addr&0x1C000000) == 0x0C000000 ) {

   364         *(uint8_t *)(sh4_main_ram + (addr&0x00FFFFFF)) = val;

   365         xlat_invalidate_word(addr);

   366         return;

   367     } else if( (addr&0x1F800000) == 0x04000000 ||

   368             (addr&0x1F800000) == 0x11000000 ) {

   369         texcache_invalidate_page(addr& 0x7FFFFF);

   370         addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);

   371         pvr2_render_buffer_invalidate(addr, TRUE);

   372     } else if( (addr&0x1F800000) == 0x05000000 ) {

   373         pvr2_render_buffer_invalidate(addr, TRUE);

   374     }

   375 

   376     if( (addr&0x1FFFFFFF) < 0x200000 ) {

   377         WARN( "Attempted write to read-only memory: %08X => %08X", val, addr);

   378         sh4_stop();

   379         return;

   380     }

   381     page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];

   382     if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */

   383         if( page == NULL ) {

   384             WARN( "Attempted byte write to missing page: %08X", addr );

   385             return;

   386         }

   387         TRACE_IO( "Byte write %02X => %08X", page, (addr&0xFFF), val&0xFF, addr );

   388         io_rgn[(uintptr_t)page]->io_write( (addr&0xFFF), val);

   389     } else {

   390         *(uint8_t *)(page+(addr&0xFFF)) = val;

   391     }

   392 }

   393 

   394 

   395 

   396 /* FIXME: Handle all the many special cases when the range doesn't fall cleanly

   397  * into the same memory block

   398  */

   399 void mem_copy_from_sh4( sh4ptr_t dest, sh4addr_t srcaddr, size_t count ) {

   400     if( srcaddr >= 0x04000000 && srcaddr < 0x05000000 ) {

   401         pvr2_vram64_read( dest, srcaddr, count );

   402     } else {

   403         sh4ptr_t src = mem_get_region(srcaddr);

   404         if( src == NULL ) {

   405             WARN( "Attempted block read from unknown address %08X", srcaddr );

   406         } else {

   407             memcpy( dest, src, count );

   408         }

   409     }

   410 }

   411 

   412 void mem_copy_to_sh4( sh4addr_t destaddr, sh4ptr_t src, size_t count ) {

   413     if( destaddr >= 0x10000000 && destaddr < 0x14000000 ) {

   414         pvr2_dma_write( destaddr, src, count );

   415         return;

   416     } else if( (destaddr & 0x1F800000) == 0x05000000 ) {

   417         pvr2_render_buffer_invalidate( destaddr, TRUE );

   418     } else if( (destaddr & 0x1F800000) == 0x04000000 ) {

   419         pvr2_vram64_write( destaddr, src, count );

   420         return;

   421     }

   422     sh4ptr_t dest = mem_get_region(destaddr);

   423     if( dest == NULL )

   424         WARN( "Attempted block write to unknown address %08X", destaddr );

   425     else {

   426         xlat_invalidate_block( destaddr, count );

   427         memcpy( dest, src, count );

   428     }

   429 }

   430 

   431 sh4ptr_t sh4_get_region_by_vma( sh4addr_t vma )

   432 {

   433     sh4addr_t addr = mmu_vma_to_phys_read(vma);

   434     if( addr == MMU_VMA_ERROR ) {

   435         return NULL;

   436     }

   437 

   438     sh4ptr_t page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];

   439     if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */

   440         return NULL;

   441     } else {

   442         return page+(addr&0xFFF);

   443     }

   444 }

   445
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