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filename src/sh4/sh4mem.c
changeset 504:61afb3921c4a
prev502:c4ecae2b1b5e
next527:14c9489f647e
author nkeynes
date Thu Nov 08 12:01:57 2007 +0000 (16 years ago)
permissions -rw-r--r--
last change Fix ptr->int conversions for 64bit
view annotate diff log raw 
     1 /**

     2  * $Id: sh4mem.c,v 1.31 2007-11-08 12:01:57 nkeynes Exp $

     3  * sh4mem.c is responsible for the SH4's access to memory (including memory

     4  * mapped I/O), using the page maps created in mem.c

     5  *

     6  * Copyright (c) 2005 Nathan Keynes.

     7  *

     8  * This program is free software; you can redistribute it and/or modify

     9  * it under the terms of the GNU General Public License as published by

    10  * the Free Software Foundation; either version 2 of the License, or

    11  * (at your option) any later version.

    12  *

    13  * This program is distributed in the hope that it will be useful,

    14  * but WITHOUT ANY WARRANTY; without even the implied warranty of

    15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

    16  * GNU General Public License for more details.

    17  */

    18 

    19 #define MODULE sh4_module

    20 

    21 #include <string.h>

    22 #include <zlib.h>

    23 #include "dream.h"

    24 #include "mem.h"

    25 #include "mmio.h"

    26 #include "dreamcast.h"

    27 #include "sh4/sh4core.h"

    28 #include "sh4/sh4mmio.h"

    29 #include "sh4/xltcache.h"

    30 #include "pvr2/pvr2.h"

    31 #include "asic.h"

    32 

    33 #define OC_BASE 0x1C000000

    34 #define OC_TOP  0x20000000

    35 

    36 #define TRANSLATE_VIDEO_64BIT_ADDRESS(a)  ( (((a)&0x00FFFFF8)>>1)|(((a)&0x00000004)<<20)|((a)&0x03)|0x05000000 )

    37 

    38 #ifdef ENABLE_WATCH

    39 #define CHECK_READ_WATCH( addr, size ) \

    40     if( mem_is_watched(addr,size,WATCH_READ) != NULL ) { \

    41         WARN( "Watch triggered at %08X by %d byte read", addr, size ); \

    42         dreamcast_stop(); \

    43     }

    44 #define CHECK_WRITE_WATCH( addr, size, val )                  \

    45     if( mem_is_watched(addr,size,WATCH_WRITE) != NULL ) { \

    46         WARN( "Watch triggered at %08X by %d byte write <= %0*X", addr, size, size*2, val ); \

    47         dreamcast_stop(); \

    48     }

    49 #else

    50 #define CHECK_READ_WATCH( addr, size )

    51 #define CHECK_WRITE_WATCH( addr, size, val )

    52 #endif

    53 

    54 #ifdef ENABLE_TRACE_IO

    55 #define TRACE_IO( str, p, r, ... ) if(io_rgn[(uint32_t)p]->trace_flag && !MMIO_NOTRACE_BYNUM((uint32_t)p,r)) \

    56     TRACE( str " [%s.%s: %s]", __VA_ARGS__,			       \

    57     MMIO_NAME_BYNUM((uint32_t)p), MMIO_REGID_BYNUM((uint32_t)p, r), \

    58     MMIO_REGDESC_BYNUM((uint32_t)p, r) )

    59 #define TRACE_P4IO( str, io, r, ... ) if(io->trace_flag && !MMIO_NOTRACE_IOBYNUM(io,r)) \

    60 TRACE( str " [%s.%s: %s]", __VA_ARGS__, \

    61     io->id, MMIO_REGID_IOBYNUM(io, r), \

    62     MMIO_REGDESC_IOBYNUM(io, r) )

    63 #else

    64 #define TRACE_IO( str, p, r, ... )

    65 #define TRACE_P4IO( str, io, r, ... )

    66 #endif

    67 

    68 extern struct mem_region mem_rgn[];

    69 extern struct mmio_region *P4_io[];

    70 sh4ptr_t sh4_main_ram;

    71 

    72 int32_t sh4_read_p4( uint32_t addr )

    73 {

    74     struct mmio_region *io = P4_io[(addr&0x1FFFFFFF)>>19];

    75     if( !io ) {

    76         if( (addr & 0xFF000000) != 0xF4000000 ) {

    77 	    /* OC address cache isn't implemented, but don't complain about it.

    78 	     * Complain about anything else though */

    79             WARN( "Attempted read from unknown P4 region: %08X", addr );

    80         }

    81         return 0;

    82     } else {

    83 	int32_t val = io->io_read( addr&0xFFF );

    84 	TRACE_P4IO( "Long read %08X <= %08X", io, (addr&0xFFF), val, addr );

    85         return val;

    86     }    

    87 }

    88 

    89 void sh4_write_p4( uint32_t addr, int32_t val )

    90 {

    91     struct mmio_region *io = P4_io[(addr&0x1FFFFFFF)>>19];

    92     if( !io ) {

    93         if( (addr & 0xFC000000) == 0xE0000000 ) {

    94             /* Store queue */

    95             SH4_WRITE_STORE_QUEUE( addr, val );

    96         } else if( (addr & 0xFF000000) != 0xF4000000 ) {

    97 	    /* OC address cache isn't implemented, but don't complain about it.

    98 	     * Complain about anything else though */

    99             WARN( "Attempted write to unknown P4 region: %08X", addr );

   100         }

   101     } else {

   102 	TRACE_P4IO( "Long write %08X => %08X", io, (addr&0xFFF), val, addr );

   103         io->io_write( addr&0xFFF, val );

   104     }

   105 }

   106 

   107 int32_t sh4_read_phys_word( uint32_t addr )

   108 {

   109     sh4ptr_t page;

   110     if( addr >= 0xE0000000 ) /* P4 Area, handled specially */

   111         return SIGNEXT16(sh4_read_p4( addr ));

   112     

   113     if( (addr&0x1F800000) == 0x04000000 ) {

   114         addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);

   115     }

   116 

   117     page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];

   118     if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */

   119         if( page == NULL ) {

   120             WARN( "Attempted word read to missing page: %08X",

   121                    addr );

   122             return 0;

   123         }

   124         return SIGNEXT16(io_rgn[(uintptr_t)page]->io_read(addr&0xFFF));

   125     } else {

   126         return SIGNEXT16(*(int16_t *)(page+(addr&0xFFF)));

   127     }

   128 }

   129 

   130 int32_t sh4_read_long( uint32_t addr )

   131 {

   132     sh4ptr_t page;

   133     

   134     CHECK_READ_WATCH(addr,4);

   135 

   136     if( addr >= 0xE0000000 ) { /* P4 Area, handled specially */

   137         return sh4_read_p4( addr );

   138     } else if( (addr&0x1C000000) == 0x0C000000 ) {

   139 	return *(int32_t *)(sh4_main_ram + (addr&0x00FFFFFF));

   140     } else if( (addr&0x1F800000) == 0x04000000 ) {

   141         addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);

   142 	pvr2_render_buffer_invalidate(addr, FALSE);

   143     } else if( (addr&0x1F800000) == 0x05000000 ) {

   144 	pvr2_render_buffer_invalidate(addr, FALSE);

   145     }

   146 

   147     page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];

   148     if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */

   149         int32_t val;

   150         if( page == NULL ) {

   151             WARN( "Attempted long read to missing page: %08X", addr );

   152             return 0;

   153         }

   154         val = io_rgn[(uintptr_t)page]->io_read(addr&0xFFF);

   155         TRACE_IO( "Long read %08X <= %08X", page, (addr&0xFFF), val, addr );

   156         return val;

   157     } else {

   158         return *(int32_t *)(page+(addr&0xFFF));

   159     }

   160 }

   161 

   162 int32_t sh4_read_word( uint32_t addr )

   163 {

   164     sh4ptr_t page;

   165 

   166     CHECK_READ_WATCH(addr,2);

   167 

   168     if( addr >= 0xE0000000 ) { /* P4 Area, handled specially */

   169         return SIGNEXT16(sh4_read_p4( addr ));

   170     } else if( (addr&0x1C000000) == 0x0C000000 ) {

   171 	return SIGNEXT16(*(int16_t *)(sh4_main_ram + (addr&0x00FFFFFF)));

   172     } else if( (addr&0x1F800000) == 0x04000000 ) {

   173         addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);

   174 	pvr2_render_buffer_invalidate(addr, FALSE);

   175     } else if( (addr&0x1F800000) == 0x05000000 ) {

   176 	pvr2_render_buffer_invalidate(addr, FALSE);

   177     }

   178     

   179     page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];

   180     if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */

   181         int32_t val;

   182         if( page == NULL ) {

   183 	    WARN( "Attempted word read to missing page: %08X", addr );

   184             return 0;

   185         }

   186         val = SIGNEXT16(io_rgn[(uintptr_t)page]->io_read(addr&0xFFF));

   187         TRACE_IO( "Word read %04X <= %08X", page, (addr&0xFFF), val&0xFFFF, addr );

   188         return val;

   189     } else {

   190         return SIGNEXT16(*(int16_t *)(page+(addr&0xFFF)));

   191     }

   192 }

   193 

   194 int32_t sh4_read_byte( uint32_t addr )

   195 {

   196     sh4ptr_t page;

   197 

   198     CHECK_READ_WATCH(addr,1);

   199 

   200     if( addr >= 0xE0000000 ) { /* P4 Area, handled specially */

   201         return SIGNEXT8(sh4_read_p4( addr ));

   202     } else if( (addr&0x1C000000) == 0x0C000000 ) {

   203 	return SIGNEXT8(*(int8_t *)(sh4_main_ram + (addr&0x00FFFFFF)));

   204     } else if( (addr&0x1F800000) == 0x04000000 ) {

   205         addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);

   206     	pvr2_render_buffer_invalidate(addr, FALSE);

   207     } else if( (addr&0x1F800000) == 0x05000000 ) {

   208 	pvr2_render_buffer_invalidate(addr, FALSE);

   209     }

   210 

   211     

   212     page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];

   213     if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */

   214         int32_t val;

   215         if( page == NULL ) {

   216             WARN( "Attempted byte read to missing page: %08X", addr );

   217             return 0;

   218         }

   219         val = SIGNEXT8(io_rgn[(uintptr_t)page]->io_read(addr&0xFFF));

   220         TRACE_IO( "Byte read %02X <= %08X", page, (addr&0xFFF), val&0xFF, addr );

   221         return val;

   222     } else {

   223         return SIGNEXT8(*(int8_t *)(page+(addr&0xFFF)));

   224     }

   225 }

   226 

   227 void sh4_write_long( uint32_t addr, uint32_t val )

   228 {

   229     sh4ptr_t page;

   230 

   231     CHECK_WRITE_WATCH(addr,4,val);

   232 

   233     if( addr >= 0xE0000000 ) {

   234         sh4_write_p4( addr, val );

   235         return;

   236     } else if( (addr&0x1C000000) == 0x0C000000 ) {

   237 	*(uint32_t *)(sh4_main_ram + (addr&0x00FFFFFF)) = val;

   238 	xlat_invalidate_long(addr);

   239 	return;

   240     } else if( (addr&0x1F800000) == 0x04000000 || 

   241 	       (addr&0x1F800000) == 0x11000000 ) {

   242 	texcache_invalidate_page(addr& 0x7FFFFF);

   243         addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);

   244 	pvr2_render_buffer_invalidate(addr, TRUE);

   245     } else if( (addr&0x1F800000) == 0x05000000 ) {

   246 	pvr2_render_buffer_invalidate(addr, TRUE);

   247     }

   248 

   249     if( (addr&0x1FFFFFFF) < 0x200000 ) {

   250         WARN( "Attempted write to read-only memory: %08X => %08X", val, addr);

   251         sh4_stop();

   252         return;

   253     }

   254     if( (addr&0x1F800000) == 0x00800000 )

   255 	asic_g2_write_word();

   256 

   257     page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];

   258     if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */

   259         if( page == NULL ) {

   260 	    if( (addr & 0x1F000000) >= 0x04000000 &&

   261 		(addr & 0x1F000000) < 0x07000000 )

   262 		return;

   263             WARN( "Long write to missing page: %08X => %08X", val, addr );

   264             return;

   265         }

   266         TRACE_IO( "Long write %08X => %08X", page, (addr&0xFFF), val, addr );

   267         io_rgn[(uintptr_t)page]->io_write(addr&0xFFF, val);

   268     } else {

   269         *(uint32_t *)(page+(addr&0xFFF)) = val;

   270     }

   271 }

   272 

   273 void sh4_write_word( uint32_t addr, uint32_t val )

   274 {

   275     sh4ptr_t page;

   276 

   277     CHECK_WRITE_WATCH(addr,2,val);

   278 

   279     if( addr >= 0xE0000000 ) {

   280         sh4_write_p4( addr, (int16_t)val );

   281         return;

   282     } else if( (addr&0x1C000000) == 0x0C000000 ) {

   283 	*(uint16_t *)(sh4_main_ram + (addr&0x00FFFFFF)) = val;

   284 	xlat_invalidate_word(addr);

   285 	return;

   286     } else if( (addr&0x1F800000) == 0x04000000 ||

   287 	(addr&0x1F800000) == 0x11000000 ) {

   288 	texcache_invalidate_page(addr& 0x7FFFFF);

   289         addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);

   290 	pvr2_render_buffer_invalidate(addr, TRUE);

   291     } else if( (addr&0x1F800000) == 0x05000000 ) {

   292 	pvr2_render_buffer_invalidate(addr, TRUE);

   293     }

   294 

   295     if( (addr&0x1FFFFFFF) < 0x200000 ) {

   296         WARN( "Attempted write to read-only memory: %08X => %08X", val, addr);

   297         sh4_stop();

   298         return;

   299     }

   300     page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];

   301     if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */

   302         if( page == NULL ) {

   303             WARN( "Attempted word write to missing page: %08X", addr );

   304             return;

   305         }

   306         TRACE_IO( "Word write %04X => %08X", page, (addr&0xFFF), val&0xFFFF, addr );

   307         io_rgn[(uintptr_t)page]->io_write(addr&0xFFF, val);

   308     } else {

   309         *(uint16_t *)(page+(addr&0xFFF)) = val;

   310     }

   311 }

   312 

   313 void sh4_write_byte( uint32_t addr, uint32_t val )

   314 {

   315     sh4ptr_t page;

   316     

   317     CHECK_WRITE_WATCH(addr,1,val);

   318 

   319     if( addr >= 0xE0000000 ) {

   320         sh4_write_p4( addr, (int8_t)val );

   321         return;

   322     } else if( (addr&0x1C000000) == 0x0C000000 ) {

   323 	*(uint8_t *)(sh4_main_ram + (addr&0x00FFFFFF)) = val;

   324 	xlat_invalidate_word(addr);

   325 	return;

   326     } else if( (addr&0x1F800000) == 0x04000000 ||

   327 	       (addr&0x1F800000) == 0x11000000 ) {

   328 	texcache_invalidate_page(addr& 0x7FFFFF);

   329         addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);

   330 	pvr2_render_buffer_invalidate(addr, TRUE);

   331     } else if( (addr&0x1F800000) == 0x05000000 ) {

   332 	pvr2_render_buffer_invalidate(addr, TRUE);

   333     }

   334     

   335     if( (addr&0x1FFFFFFF) < 0x200000 ) {

   336         WARN( "Attempted write to read-only memory: %08X => %08X", val, addr);

   337         sh4_stop();

   338         return;

   339     }

   340     page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];

   341     if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */

   342         if( page == NULL ) {

   343             WARN( "Attempted byte write to missing page: %08X", addr );

   344             return;

   345         }

   346         TRACE_IO( "Byte write %02X => %08X", page, (addr&0xFFF), val&0xFF, addr );

   347         io_rgn[(uintptr_t)page]->io_write( (addr&0xFFF), val);

   348     } else {

   349         *(uint8_t *)(page+(addr&0xFFF)) = val;

   350     }

   351 }

   352 

   353 

   354 

   355 /* FIXME: Handle all the many special cases when the range doesn't fall cleanly

   356  * into the same memory block

   357  */

   358 void mem_copy_from_sh4( sh4ptr_t dest, uint32_t srcaddr, size_t count ) {

   359     if( srcaddr >= 0x04000000 && srcaddr < 0x05000000 ) {

   360 	pvr2_vram64_read( dest, srcaddr, count );

   361     } else {

   362 	sh4ptr_t src = mem_get_region(srcaddr);

   363 	if( src == NULL ) {

   364 	    WARN( "Attempted block read from unknown address %08X", srcaddr );

   365 	} else {

   366 	    memcpy( dest, src, count );

   367 	}

   368     }

   369 }

   370 

   371 void mem_copy_to_sh4( uint32_t destaddr, sh4ptr_t src, size_t count ) {

   372     if( destaddr >= 0x10000000 && destaddr < 0x14000000 ) {

   373 	pvr2_dma_write( destaddr, src, count );

   374 	return;

   375     } else if( (destaddr & 0x1F800000) == 0x05000000 ) {

   376 	pvr2_render_buffer_invalidate( destaddr, TRUE );

   377     } else if( (destaddr & 0x1F800000) == 0x04000000 ) {

   378 	pvr2_vram64_write( destaddr, src, count );

   379 	return;

   380     }

   381     sh4ptr_t dest = mem_get_region(destaddr);

   382     if( dest == NULL )

   383 	WARN( "Attempted block write to unknown address %08X", destaddr );

   384     else {

   385 	xlat_invalidate_block( destaddr, count );

   386 	memcpy( dest, src, count );

   387     }

   388 }

   389 

   390 void sh4_flush_store_queue( uint32_t addr )

   391 {

   392     /* Store queue operation */

   393     int queue = (addr&0x20)>>2;

   394     sh4ptr_t src = (sh4ptr_t)&sh4r.store_queue[queue];

   395     uint32_t hi = (MMIO_READ( MMU, (queue == 0 ? QACR0 : QACR1) ) & 0x1C) << 24;

   396     uint32_t target = (addr&0x03FFFFE0) | hi;

   397     mem_copy_to_sh4( target, src, 32 );

   398 }
.