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lxdream.org :: lxdream/src/sh4/mmu.h
lxdream 0.9.1
released Jun 29
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filename src/sh4/mmu.h
changeset 1217:677b1d85f1b4
prev1067:d3c00ffccfcd
author nkeynes
date Mon Feb 13 20:00:27 2012 +1000 (8 years ago)
permissions -rw-r--r--
last change Fix MMU on non-translated platforms
- reintroduce old VMA translation functions (slightly modified)
- modify shadow processing to work on post-translated memory ops
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     1 /**
     2  * $Id$
     3  *
     4  * MMU/TLB definitions.
     5  *
     6  * Copyright (c) 2005 Nathan Keynes.
     7  *
     8  * This program is free software; you can redistribute it and/or modify
     9  * it under the terms of the GNU General Public License as published by
    10  * the Free Software Foundation; either version 2 of the License, or
    11  * (at your option) any later version.
    12  *
    13  * This program is distributed in the hope that it will be useful,
    14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    16  * GNU General Public License for more details.
    17  */
    20 #ifndef lxdream_sh4_mmu_H
    21 #define lxdream_sh4_mmu_H 1
    23 #include "lxdream.h"
    25 #ifdef __cplusplus
    26 extern "C" {
    27 #endif
    29 #define VMA_TO_EXT_ADDR(vma) ((vma)&0x1FFFFFFF)
    31 /************************** UTLB/ITLB Definitions ***************************/
    32 /* mmucr register bits */
    33 #define MMUCR_AT   0x00000001 /* Address Translation enabled */
    34 #define MMUCR_TI   0x00000004 /* TLB invalidate (always read as 0) */
    35 #define MMUCR_SV   0x00000100 /* Single Virtual mode=1 / multiple virtual=0 */
    36 #define MMUCR_SQMD 0x00000200 /* Store queue mode bit (0=user, 1=priv only) */
    37 #define MMUCR_URC  0x0000FC00 /* UTLB access counter */
    38 #define MMUCR_URB  0x00FC0000 /* UTLB entry boundary */
    39 #define MMUCR_LRUI 0xFC000000 /* Least recently used ITLB */
    40 #define MMUCR_MASK 0xFCFCFF05
    41 #define MMUCR_RMASK 0xFCFCFF01 /* Read mask */
    43 #define IS_TLB_ENABLED() (MMIO_READ(MMU, MMUCR)&MMUCR_AT)
    44 #define IS_SV_ENABLED() (MMIO_READ(MMU,MMUCR)&MMUCR_SV)
    46 #define ITLB_ENTRY_COUNT 4
    47 #define UTLB_ENTRY_COUNT 64
    49 /* Entry address */
    50 #define TLB_VALID     0x00000100
    51 #define TLB_USERMODE  0x00000040
    52 #define TLB_WRITABLE  0x00000020
    53 #define TLB_USERWRITABLE (TLB_WRITABLE|TLB_USERMODE)
    54 #define TLB_SIZE_MASK 0x00000090
    55 #define TLB_SIZE_1K   0x00000000
    56 #define TLB_SIZE_4K   0x00000010
    57 #define TLB_SIZE_64K  0x00000080
    58 #define TLB_SIZE_1M   0x00000090
    59 #define TLB_CACHEABLE 0x00000008
    60 #define TLB_DIRTY     0x00000004
    61 #define TLB_SHARE     0x00000002
    62 #define TLB_WRITETHRU 0x00000001
    64 #define MASK_1K  0xFFFFFC00
    65 #define MASK_4K  0xFFFFF000
    66 #define MASK_64K 0xFFFF0000
    67 #define MASK_1M  0xFFF00000
    69 struct itlb_entry {
    70     sh4addr_t vpn; // Virtual Page Number
    71     uint32_t asid; // Process ID
    72     uint32_t mask;
    73     sh4addr_t ppn; // Physical Page Number
    74     uint32_t flags;
    75 };
    77 struct utlb_entry {
    78     sh4addr_t vpn; // Virtual Page Number
    79     uint32_t mask; // Page size mask
    80     uint32_t asid; // Process ID
    81     sh4addr_t ppn; // Physical Page Number
    82     uint32_t flags;
    83     uint32_t pcmcia; // extra pcmcia data - not used in this implementation
    84 };
    86 #define TLB_FUNC_SIZE 48
    88 struct utlb_page_entry {
    89     struct mem_region_fn fn;
    90     struct mem_region_fn *user_fn;
    91     mem_region_fn_t target;
    92     unsigned char code[TLB_FUNC_SIZE*9];
    93 };
    95 struct utlb_1k_entry {
    96     struct mem_region_fn fn;
    97     struct mem_region_fn user_fn;
    98     struct mem_region_fn *subpages[4];
    99     struct mem_region_fn *user_subpages[4];
   100     unsigned char code[TLB_FUNC_SIZE*18];
   101 };
   103 struct utlb_default_regions {
   104     mem_region_fn_t tlb_miss;
   105     mem_region_fn_t tlb_prot;
   106     mem_region_fn_t tlb_multihit;
   107 };
   109 /** Set the MMU's target external address space
   110  * @return the previous address space.
   111  */
   112 mem_region_fn_t *mmu_set_ext_address_space( mem_region_fn_t *space );
   114 /* Address translation functions */
   115 sh4addr_t FASTCALL mmu_vma_to_phys_disasm( sh4vma_t vma );
   116 mem_region_fn_t FASTCALL mmu_get_region_for_vma_read( sh4vma_t *addr );
   117 mem_region_fn_t FASTCALL mmu_get_region_for_vma_write( sh4vma_t *addr );
   118 mem_region_fn_t FASTCALL mmu_get_region_for_vma_prefetch( sh4vma_t *addr );
   120 /* Translator provided helpers */
   121 void mmu_utlb_init_vtable( struct utlb_entry *ent, struct utlb_page_entry *page, gboolean writable ); 
   122 void mmu_utlb_1k_init_vtable( struct utlb_1k_entry *ent ); 
   123 void mmu_utlb_init_storequeue_vtable( struct utlb_entry *ent, struct utlb_page_entry *page );
   125 extern uint32_t mmu_urc;
   126 extern uint32_t mmu_urb;
   128 /** Primary SH4 address space (privileged and user access)
   129  * Page map (4KB) of the entire 32-bit address space
   130  * Note: only callable from the SH4 cores as it depends on the caller setting
   131  * up an appropriate exception environment. 
   132  **/
   133 extern struct mem_region_fn **sh4_address_space;
   134 extern struct mem_region_fn **sh4_user_address_space;
   136 /************ Storequeue/cache functions ***********/
   137 void FASTCALL ccn_storequeue_write_long( sh4addr_t addr, uint32_t val );
   138 int32_t FASTCALL ccn_storequeue_read_long( sh4addr_t addr );
   140 /** Default storequeue prefetch when TLB is disabled */
   141 void FASTCALL ccn_storequeue_prefetch( sh4addr_t addr ); 
   143 /** TLB-enabled variant of the storequeue prefetch */
   144 void FASTCALL ccn_storequeue_prefetch_tlb( sh4addr_t addr );
   146 /** Non-storequeue prefetch */
   147 void FASTCALL ccn_prefetch( sh4addr_t addr );
   149 /** Non-cached prefetch (ie, no-op) */
   150 void FASTCALL ccn_uncached_prefetch( sh4addr_t addr );
   153 extern struct mem_region_fn mem_region_address_error;
   154 extern struct mem_region_fn mem_region_tlb_miss;
   155 extern struct mem_region_fn mem_region_tlb_multihit;
   156 extern struct mem_region_fn mem_region_tlb_protected;
   158 extern struct mem_region_fn p4_region_storequeue; 
   159 extern struct mem_region_fn p4_region_storequeue_multihit; 
   160 extern struct mem_region_fn p4_region_storequeue_miss; 
   161 extern struct mem_region_fn p4_region_storequeue_protected; 
   162 extern struct mem_region_fn p4_region_storequeue_sqmd; 
   163 extern struct mem_region_fn p4_region_storequeue_sqmd_miss; 
   164 extern struct mem_region_fn p4_region_storequeue_sqmd_multihit; 
   165 extern struct mem_region_fn p4_region_storequeue_sqmd_protected; 
   167 #ifdef __cplusplus
   168 }
   169 #endif
   170 #endif /* !lxdream_sh4_mmu_H */
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