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lxdream.org :: lxdream/src/sh4/sh4.h
lxdream 0.9.1
released Jun 29
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filename src/sh4/sh4.h
changeset 1189:1540105786c8
prev1187:266e7a1bae90
next1218:be02e87f9f87
author nkeynes
date Mon Feb 13 20:00:27 2012 +1000 (8 years ago)
permissions -rw-r--r--
last change Fix MMU on non-translated platforms
- reintroduce old VMA translation functions (slightly modified)
- modify shadow processing to work on post-translated memory ops
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     1 /**
     2  * $Id$
     3  * 
     4  * This file defines the public functions and definitions exported by the SH4
     5  * modules.
     6  *
     7  * Copyright (c) 2005 Nathan Keynes.
     8  *
     9  * This program is free software; you can redistribute it and/or modify
    10  * it under the terms of the GNU General Public License as published by
    11  * the Free Software Foundation; either version 2 of the License, or
    12  * (at your option) any later version.
    13  *
    14  * This program is distributed in the hope that it will be useful,
    15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    17  * GNU General Public License for more details.
    18  */
    20 #ifndef lxdream_sh4_H
    21 #define lxdream_sh4_H 1
    23 #include "lxdream.h"
    24 #include "mem.h"
    26 #ifdef __cplusplus
    27 extern "C" {
    28 #endif
    31 /**
    32  * SH4 is running normally 
    33  */
    34 #define SH4_STATE_RUNNING 1
    35 /**
    36  * SH4 is not executing instructions but all peripheral modules are still
    37  * running
    38  */
    39 #define SH4_STATE_SLEEP 2
    40 /**
    41  * SH4 is not executing instructions, DMAC is halted, but all other peripheral
    42  * modules are still running
    43  */
    44 #define SH4_STATE_DEEP_SLEEP 3
    45 /**
    46  * SH4 is not executing instructions and all peripheral modules are also
    47  * stopped. As close as you can get to powered-off without actually being
    48  * off.
    49  */
    50 #define SH4_STATE_STANDBY 4
    52 /**
    53  * sh4r.event_types flag indicating a pending IRQ
    54  */
    55 #define PENDING_IRQ 1
    57 /**
    58  * sh4r.event_types flag indicating a pending event (from the event queue)
    59  */
    60 #define PENDING_EVENT 2
    62 /**
    63  * SH4 register structure
    64  */
    65 struct sh4_registers {
    66     uint32_t r[16];
    67     uint32_t sr, pr, pc;
    68     union {
    69         int32_t i;
    70         float f;
    71     } fpul;
    72     uint32_t t, m, q, s; /* really boolean - 0 or 1 */
    73     float fr[2][16]; /* Must be aligned on 16-byte boundary */
    74     uint32_t fpscr;
    75     uint32_t pad; /* Pad up to 64-bit boundaries */
    76     uint64_t mac;
    77     uint32_t gbr, ssr, spc, sgr, dbr, vbr;
    79     uint32_t r_bank[8]; /* hidden banked registers */
    80     int32_t store_queue[16]; /* technically 2 banks of 32 bytes */
    82     uint32_t new_pc; /* Not a real register, but used to handle delay slots */
    83     uint32_t event_pending; /* slice cycle time of the next pending event, or FFFFFFFF
    84                              when no events are pending */
    85     uint32_t event_types; /* bit 0 = IRQ pending, bit 1 = general event pending */
    86     int in_delay_slot; /* flag to indicate the current instruction is in
    87      * a delay slot (certain rules apply) */
    88     uint32_t slice_cycle; /* Current nanosecond within the timeslice */
    89     uint32_t bus_cycle; /* Nanosecond within the timeslice that the bus will be free */
    90     int sh4_state; /* Current power-on state (one of the SH4_STATE_* values ) */
    92     /* Not saved */
    93     int xlat_sh4_mode; /* Collection of execution mode flags (derived) from fpscr, sr, etc */
    94 };
    96 extern struct sh4_registers sh4r;
    98 extern const struct cpu_desc_struct sh4_cpu_desc;
   100 typedef enum {
   101     SH4_INTERPRET,
   102     SH4_TRANSLATE,
   103     SH4_SHADOW
   104 } sh4core_t;
   106 /**
   107  * Switch between translation and emulation execution modes. Note that this
   108  * should only be used while the system is stopped. If the system was built
   109  * without translation support, this method has no effect.
   110  *
   111  * @param use TRUE for translation mode, FALSE for emulation mode.
   112  */
   113 void sh4_set_core( sh4core_t core );
   115 /**
   116  * Test if system is currently using the translation engine.
   117  */
   118 gboolean sh4_translate_is_enabled();
   120 /**
   121  * Explicitly set the SH4 PC to the supplied value - this will be the next
   122  * instruction executed. This should only be called while the system is stopped.
   123  */
   124 void sh4_set_pc( int pc );
   126 /**
   127  * Set the time of the next pending event within the current timeslice.
   128  */
   129 void sh4_set_event_pending( uint32_t cycles );
   131 /**
   132  * Handle an event that's due (note caller is responsible for ensuring that the
   133  * event is in fact due).
   134  */
   135 void sh4_handle_pending_events();
   137 /**
   138  * Execute (using the emulator) a single instruction (in other words, perform a
   139  * single-step operation). 
   140  */
   141 gboolean sh4_execute_instruction( void );
   143 /* SH4 breakpoints */
   144 void sh4_set_breakpoint( uint32_t pc, breakpoint_type_t type );
   145 gboolean sh4_clear_breakpoint( uint32_t pc, breakpoint_type_t type );
   146 int sh4_get_breakpoint( uint32_t pc );
   148 /** Dump current SH4 core state (for crashdump purposes) */
   149 void sh4_crashdump();
   151 /** Dump a translated block with SH4 and target assembly side by side. */
   152 void sh4_translate_dump_block( uint32_t pc );
   154 #ifdef __cplusplus
   155 }
   156 #endif
   157 #endif /* !lxdream_sh4_H */
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