1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
27 /* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
34 #include "xlat/disasm/dis-asm.h"
35 #include "xlat/disasm/sysdep.h"
36 #include "xlat/xlatdasm.h"
43 #ifndef UNIXWARE_COMPAT
44 /* Set non-zero for broken, compatible instructions. Set to zero for
45 non-broken opcodes. */
46 #define UNIXWARE_COMPAT 1
49 static int fetch_data (struct disassemble_info *, bfd_byte *);
50 static void ckprefix (void);
51 static const char *prefix_name (int, int);
52 static int print_insn (bfd_vma, disassemble_info *);
53 static void dofloat (int);
54 static void OP_ST (int, int);
55 static void OP_STi (int, int);
56 static int putop (const char *, int);
57 static void oappend (const char *);
58 static void append_seg (void);
59 static void OP_indirE (int, int);
60 static void OP_E (int, int);
61 static void OP_G (int, int);
62 static bfd_vma get64 (void);
63 static bfd_signed_vma get32 (void);
64 static bfd_signed_vma get32s (void);
65 static int get16 (void);
66 static void set_op (bfd_vma, int);
67 static void OP_REG (int, int);
68 static void OP_IMREG (int, int);
69 static void OP_I (int, int);
70 static void OP_I64 (int, int);
71 static void OP_sI (int, int);
72 static void OP_J (int, int);
73 static void OP_SEG (int, int);
74 static void OP_DIR (int, int);
75 static void OP_OFF (int, int);
76 static void OP_OFF64 (int, int);
77 static void ptr_reg (int, int);
78 static void OP_ESreg (int, int);
79 static void OP_DSreg (int, int);
80 static void OP_C (int, int);
81 static void OP_D (int, int);
82 static void OP_T (int, int);
83 static void OP_Rd (int, int);
84 static void OP_MMX (int, int);
85 static void OP_XMM (int, int);
86 static void OP_EM (int, int);
87 static void OP_EX (int, int);
88 static void OP_MS (int, int);
89 static void OP_XS (int, int);
90 static void OP_M (int, int);
91 static void OP_0fae (int, int);
92 static void OP_0f07 (int, int);
93 static void NOP_Fixup (int, int);
94 static void OP_3DNowSuffix (int, int);
95 static void OP_SIMD_Suffix (int, int);
96 static void SIMD_Fixup (int, int);
97 static void PNI_Fixup (int, int);
98 static void INVLPG_Fixup (int, int);
99 static void BadOp (void);
102 /* Points to first byte not fetched. */
103 bfd_byte *max_fetched;
104 bfd_byte the_buffer[MAXLEN];
110 /* The opcode for the fwait instruction, which we treat as a prefix
112 #define FWAIT_OPCODE (0x9b)
114 /* Set to 1 for 64bit mode disassembly. */
115 static int mode_64bit;
117 /* Flags for the prefixes for the current instruction. See below. */
120 /* REX prefix the current instruction. See below. */
122 /* Bits of REX we've already used. */
128 /* Mark parts used in the REX prefix. When we are testing for
129 empty prefix (for 8bit register REX extension), just mask it
130 out. Otherwise test for REX bit is excuse for existence of REX
131 only in case value is nonzero. */
132 #define USED_REX(value) \
135 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
140 /* Flags for prefixes which we somehow handled when printing the
141 current instruction. */
142 static int used_prefixes;
144 /* Flags stored in PREFIXES. */
145 #define PREFIX_REPZ 1
146 #define PREFIX_REPNZ 2
147 #define PREFIX_LOCK 4
149 #define PREFIX_SS 0x10
150 #define PREFIX_DS 0x20
151 #define PREFIX_ES 0x40
152 #define PREFIX_FS 0x80
153 #define PREFIX_GS 0x100
154 #define PREFIX_DATA 0x200
155 #define PREFIX_ADDR 0x400
156 #define PREFIX_FWAIT 0x800
158 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
159 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
161 #define FETCH_DATA(info, addr) \
162 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
163 ? 1 : fetch_data ((info), (addr)))
166 fetch_data (struct disassemble_info *info, bfd_byte *addr)
169 struct dis_private *priv = (struct dis_private *) info->private_data;
170 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
172 status = (*info->read_memory_func) (start,
174 addr - priv->max_fetched,
178 /* If we did manage to read at least one byte, then
179 print_insn_i386 will do something sensible. Otherwise, print
180 an error. We do that here because this is where we know
182 if (priv->max_fetched == priv->the_buffer)
183 (*info->memory_error_func) (status, start, info);
184 longjmp (priv->bailout, 1);
187 priv->max_fetched = addr;
193 #define Eb OP_E, b_mode
194 #define Ev OP_E, v_mode
195 #define Ed OP_E, d_mode
196 #define Eq OP_E, q_mode
197 #define Edq OP_E, dq_mode
198 #define Edqw OP_E, dqw_mode
199 #define indirEv OP_indirE, v_mode
200 #define indirEp OP_indirE, f_mode
201 #define Ew OP_E, w_mode
202 #define Ma OP_E, v_mode
203 #define M OP_M, 0 /* lea, lgdt, etc. */
204 #define Mp OP_M, f_mode /* 32 or 48 bit memory operand for LDS, LES etc */
205 #define Gb OP_G, b_mode
206 #define Gv OP_G, v_mode
207 #define Gd OP_G, d_mode
208 #define Gdq OP_G, dq_mode
209 #define Gw OP_G, w_mode
210 #define Rd OP_Rd, d_mode
211 #define Rm OP_Rd, m_mode
212 #define Ib OP_I, b_mode
213 #define sIb OP_sI, b_mode /* sign extened byte */
214 #define Iv OP_I, v_mode
215 #define Iq OP_I, q_mode
216 #define Iv64 OP_I64, v_mode
217 #define Iw OP_I, w_mode
218 #define I1 OP_I, const_1_mode
219 #define Jb OP_J, b_mode
220 #define Jv OP_J, v_mode
221 #define Cm OP_C, m_mode
222 #define Dm OP_D, m_mode
223 #define Td OP_T, d_mode
225 #define RMeAX OP_REG, eAX_reg
226 #define RMeBX OP_REG, eBX_reg
227 #define RMeCX OP_REG, eCX_reg
228 #define RMeDX OP_REG, eDX_reg
229 #define RMeSP OP_REG, eSP_reg
230 #define RMeBP OP_REG, eBP_reg
231 #define RMeSI OP_REG, eSI_reg
232 #define RMeDI OP_REG, eDI_reg
233 #define RMrAX OP_REG, rAX_reg
234 #define RMrBX OP_REG, rBX_reg
235 #define RMrCX OP_REG, rCX_reg
236 #define RMrDX OP_REG, rDX_reg
237 #define RMrSP OP_REG, rSP_reg
238 #define RMrBP OP_REG, rBP_reg
239 #define RMrSI OP_REG, rSI_reg
240 #define RMrDI OP_REG, rDI_reg
241 #define RMAL OP_REG, al_reg
242 #define RMAL OP_REG, al_reg
243 #define RMCL OP_REG, cl_reg
244 #define RMDL OP_REG, dl_reg
245 #define RMBL OP_REG, bl_reg
246 #define RMAH OP_REG, ah_reg
247 #define RMCH OP_REG, ch_reg
248 #define RMDH OP_REG, dh_reg
249 #define RMBH OP_REG, bh_reg
250 #define RMAX OP_REG, ax_reg
251 #define RMDX OP_REG, dx_reg
253 #define eAX OP_IMREG, eAX_reg
254 #define eBX OP_IMREG, eBX_reg
255 #define eCX OP_IMREG, eCX_reg
256 #define eDX OP_IMREG, eDX_reg
257 #define eSP OP_IMREG, eSP_reg
258 #define eBP OP_IMREG, eBP_reg
259 #define eSI OP_IMREG, eSI_reg
260 #define eDI OP_IMREG, eDI_reg
261 #define AL OP_IMREG, al_reg
262 #define AL OP_IMREG, al_reg
263 #define CL OP_IMREG, cl_reg
264 #define DL OP_IMREG, dl_reg
265 #define BL OP_IMREG, bl_reg
266 #define AH OP_IMREG, ah_reg
267 #define CH OP_IMREG, ch_reg
268 #define DH OP_IMREG, dh_reg
269 #define BH OP_IMREG, bh_reg
270 #define AX OP_IMREG, ax_reg
271 #define DX OP_IMREG, dx_reg
272 #define indirDX OP_IMREG, indir_dx_reg
274 #define Sw OP_SEG, w_mode
276 #define Ob OP_OFF, b_mode
277 #define Ob64 OP_OFF64, b_mode
278 #define Ov OP_OFF, v_mode
279 #define Ov64 OP_OFF64, v_mode
280 #define Xb OP_DSreg, eSI_reg
281 #define Xv OP_DSreg, eSI_reg
282 #define Yb OP_ESreg, eDI_reg
283 #define Yv OP_ESreg, eDI_reg
284 #define DSBX OP_DSreg, eBX_reg
286 #define es OP_REG, es_reg
287 #define ss OP_REG, ss_reg
288 #define cs OP_REG, cs_reg
289 #define ds OP_REG, ds_reg
290 #define fs OP_REG, fs_reg
291 #define gs OP_REG, gs_reg
295 #define EM OP_EM, v_mode
296 #define EX OP_EX, v_mode
297 #define MS OP_MS, v_mode
298 #define XS OP_XS, v_mode
299 #define OPSUF OP_3DNowSuffix, 0
300 #define OPSIMD OP_SIMD_Suffix, 0
302 #define cond_jump_flag NULL, cond_jump_mode
303 #define loop_jcxz_flag NULL, loop_jcxz_mode
305 /* bits in sizeflag */
306 #define SUFFIX_ALWAYS 4
310 #define b_mode 1 /* byte operand */
311 #define v_mode 2 /* operand size depends on prefixes */
312 #define w_mode 3 /* word operand */
313 #define d_mode 4 /* double word operand */
314 #define q_mode 5 /* quad word operand */
315 #define t_mode 6 /* ten-byte operand */
316 #define x_mode 7 /* 16-byte XMM operand */
317 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
318 #define cond_jump_mode 9
319 #define loop_jcxz_mode 10
320 #define dq_mode 11 /* operand size depends on REX prefixes. */
321 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
322 #define f_mode 13 /* 4- or 6-byte pointer operand */
323 #define const_1_mode 14
368 #define indir_dx_reg 150
372 #define USE_PREFIX_USER_TABLE 3
373 #define X86_64_SPECIAL 4
375 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
377 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0
378 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0
379 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0
380 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0
381 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0
382 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0
383 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0
384 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0
385 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0
386 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0
387 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0
388 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0
389 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0
390 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0
391 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0
392 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0
393 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0
394 #define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0
395 #define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0
396 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0
397 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
398 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
399 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
400 #define GRPPADLCK1 NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0
401 #define GRPPADLCK2 NULL, NULL, USE_GROUPS, NULL, 24, NULL, 0
403 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
404 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
405 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0
406 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0
407 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0
408 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0
409 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0
410 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0
411 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0
412 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0
413 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0
414 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0
415 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0
416 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0
417 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0
418 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0
419 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0
420 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0
421 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0
422 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0
423 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0
424 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0
425 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0
426 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0
427 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0
428 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0
429 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0
430 #define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0
431 #define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0
432 #define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0
433 #define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0
434 #define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0
435 #define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0
437 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
439 typedef void (*op_rtn) (int bytemode, int sizeflag);
451 /* Upper case letters in the instruction names here are macros.
452 'A' => print 'b' if no register operands or suffix_always is true
453 'B' => print 'b' if suffix_always is true
454 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
456 'E' => print 'e' if 32-bit form of jcxz
457 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
458 'H' => print ",pt" or ",pn" branch hint
459 'I' => honor following macro letter even in Intel mode (implemented only
460 . for some of the macro letters)
462 'L' => print 'l' if suffix_always is true
463 'N' => print 'n' if instruction has no wait "prefix"
464 'O' => print 'd', or 'o'
465 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
466 . or suffix_always is true. print 'q' if rex prefix is present.
467 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
469 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
470 'S' => print 'w', 'l' or 'q' if suffix_always is true
471 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
472 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
473 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
474 'X' => print 's', 'd' depending on data16 prefix (for XMM)
475 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
477 Many of the above letters print nothing in Intel mode. See "putop"
480 Braces '{' and '}', and vertical bars '|', indicate alternative
481 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
482 modes. In cases where there are only two alternatives, the X86_64
483 instruction is reserved, and "(bad)" is printed.
486 static const struct dis386 dis386[] = {
488 { "addB", Eb, Gb, XX },
489 { "addS", Ev, Gv, XX },
490 { "addB", Gb, Eb, XX },
491 { "addS", Gv, Ev, XX },
492 { "addB", AL, Ib, XX },
493 { "addS", eAX, Iv, XX },
494 { "push{T|}", es, XX, XX },
495 { "pop{T|}", es, XX, XX },
497 { "orB", Eb, Gb, XX },
498 { "orS", Ev, Gv, XX },
499 { "orB", Gb, Eb, XX },
500 { "orS", Gv, Ev, XX },
501 { "orB", AL, Ib, XX },
502 { "orS", eAX, Iv, XX },
503 { "push{T|}", cs, XX, XX },
504 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
506 { "adcB", Eb, Gb, XX },
507 { "adcS", Ev, Gv, XX },
508 { "adcB", Gb, Eb, XX },
509 { "adcS", Gv, Ev, XX },
510 { "adcB", AL, Ib, XX },
511 { "adcS", eAX, Iv, XX },
512 { "push{T|}", ss, XX, XX },
513 { "popT|}", ss, XX, XX },
515 { "sbbB", Eb, Gb, XX },
516 { "sbbS", Ev, Gv, XX },
517 { "sbbB", Gb, Eb, XX },
518 { "sbbS", Gv, Ev, XX },
519 { "sbbB", AL, Ib, XX },
520 { "sbbS", eAX, Iv, XX },
521 { "push{T|}", ds, XX, XX },
522 { "pop{T|}", ds, XX, XX },
524 { "andB", Eb, Gb, XX },
525 { "andS", Ev, Gv, XX },
526 { "andB", Gb, Eb, XX },
527 { "andS", Gv, Ev, XX },
528 { "andB", AL, Ib, XX },
529 { "andS", eAX, Iv, XX },
530 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
531 { "daa{|}", XX, XX, XX },
533 { "subB", Eb, Gb, XX },
534 { "subS", Ev, Gv, XX },
535 { "subB", Gb, Eb, XX },
536 { "subS", Gv, Ev, XX },
537 { "subB", AL, Ib, XX },
538 { "subS", eAX, Iv, XX },
539 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
540 { "das{|}", XX, XX, XX },
542 { "xorB", Eb, Gb, XX },
543 { "xorS", Ev, Gv, XX },
544 { "xorB", Gb, Eb, XX },
545 { "xorS", Gv, Ev, XX },
546 { "xorB", AL, Ib, XX },
547 { "xorS", eAX, Iv, XX },
548 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
549 { "aaa{|}", XX, XX, XX },
551 { "cmpB", Eb, Gb, XX },
552 { "cmpS", Ev, Gv, XX },
553 { "cmpB", Gb, Eb, XX },
554 { "cmpS", Gv, Ev, XX },
555 { "cmpB", AL, Ib, XX },
556 { "cmpS", eAX, Iv, XX },
557 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
558 { "aas{|}", XX, XX, XX },
560 { "inc{S|}", RMeAX, XX, XX },
561 { "inc{S|}", RMeCX, XX, XX },
562 { "inc{S|}", RMeDX, XX, XX },
563 { "inc{S|}", RMeBX, XX, XX },
564 { "inc{S|}", RMeSP, XX, XX },
565 { "inc{S|}", RMeBP, XX, XX },
566 { "inc{S|}", RMeSI, XX, XX },
567 { "inc{S|}", RMeDI, XX, XX },
569 { "dec{S|}", RMeAX, XX, XX },
570 { "dec{S|}", RMeCX, XX, XX },
571 { "dec{S|}", RMeDX, XX, XX },
572 { "dec{S|}", RMeBX, XX, XX },
573 { "dec{S|}", RMeSP, XX, XX },
574 { "dec{S|}", RMeBP, XX, XX },
575 { "dec{S|}", RMeSI, XX, XX },
576 { "dec{S|}", RMeDI, XX, XX },
578 { "pushS", RMrAX, XX, XX },
579 { "pushS", RMrCX, XX, XX },
580 { "pushS", RMrDX, XX, XX },
581 { "pushS", RMrBX, XX, XX },
582 { "pushS", RMrSP, XX, XX },
583 { "pushS", RMrBP, XX, XX },
584 { "pushS", RMrSI, XX, XX },
585 { "pushS", RMrDI, XX, XX },
587 { "popS", RMrAX, XX, XX },
588 { "popS", RMrCX, XX, XX },
589 { "popS", RMrDX, XX, XX },
590 { "popS", RMrBX, XX, XX },
591 { "popS", RMrSP, XX, XX },
592 { "popS", RMrBP, XX, XX },
593 { "popS", RMrSI, XX, XX },
594 { "popS", RMrDI, XX, XX },
596 { "pusha{P|}", XX, XX, XX },
597 { "popa{P|}", XX, XX, XX },
598 { "bound{S|}", Gv, Ma, XX },
600 { "(bad)", XX, XX, XX }, /* seg fs */
601 { "(bad)", XX, XX, XX }, /* seg gs */
602 { "(bad)", XX, XX, XX }, /* op size prefix */
603 { "(bad)", XX, XX, XX }, /* adr size prefix */
605 { "pushT", Iq, XX, XX },
606 { "imulS", Gv, Ev, Iv },
607 { "pushT", sIb, XX, XX },
608 { "imulS", Gv, Ev, sIb },
609 { "ins{b||b|}", Yb, indirDX, XX },
610 { "ins{R||R|}", Yv, indirDX, XX },
611 { "outs{b||b|}", indirDX, Xb, XX },
612 { "outs{R||R|}", indirDX, Xv, XX },
614 { "joH", Jb, XX, cond_jump_flag },
615 { "jnoH", Jb, XX, cond_jump_flag },
616 { "jbH", Jb, XX, cond_jump_flag },
617 { "jaeH", Jb, XX, cond_jump_flag },
618 { "jeH", Jb, XX, cond_jump_flag },
619 { "jneH", Jb, XX, cond_jump_flag },
620 { "jbeH", Jb, XX, cond_jump_flag },
621 { "jaH", Jb, XX, cond_jump_flag },
623 { "jsH", Jb, XX, cond_jump_flag },
624 { "jnsH", Jb, XX, cond_jump_flag },
625 { "jpH", Jb, XX, cond_jump_flag },
626 { "jnpH", Jb, XX, cond_jump_flag },
627 { "jlH", Jb, XX, cond_jump_flag },
628 { "jgeH", Jb, XX, cond_jump_flag },
629 { "jleH", Jb, XX, cond_jump_flag },
630 { "jgH", Jb, XX, cond_jump_flag },
634 { "(bad)", XX, XX, XX },
636 { "testB", Eb, Gb, XX },
637 { "testS", Ev, Gv, XX },
638 { "xchgB", Eb, Gb, XX },
639 { "xchgS", Ev, Gv, XX },
641 { "movB", Eb, Gb, XX },
642 { "movS", Ev, Gv, XX },
643 { "movB", Gb, Eb, XX },
644 { "movS", Gv, Ev, XX },
645 { "movQ", Ev, Sw, XX },
646 { "leaS", Gv, M, XX },
647 { "movQ", Sw, Ev, XX },
648 { "popU", Ev, XX, XX },
650 { "nop", NOP_Fixup, 0, XX, XX },
651 { "xchgS", RMeCX, eAX, XX },
652 { "xchgS", RMeDX, eAX, XX },
653 { "xchgS", RMeBX, eAX, XX },
654 { "xchgS", RMeSP, eAX, XX },
655 { "xchgS", RMeBP, eAX, XX },
656 { "xchgS", RMeSI, eAX, XX },
657 { "xchgS", RMeDI, eAX, XX },
659 { "cW{tR||tR|}", XX, XX, XX },
660 { "cR{tO||tO|}", XX, XX, XX },
661 { "Jcall{T|}", Ap, XX, XX },
662 { "(bad)", XX, XX, XX }, /* fwait */
663 { "pushfT", XX, XX, XX },
664 { "popfT", XX, XX, XX },
665 { "sahf{|}", XX, XX, XX },
666 { "lahf{|}", XX, XX, XX },
668 { "movB", AL, Ob64, XX },
669 { "movS", eAX, Ov64, XX },
670 { "movB", Ob64, AL, XX },
671 { "movS", Ov64, eAX, XX },
672 { "movs{b||b|}", Yb, Xb, XX },
673 { "movs{R||R|}", Yv, Xv, XX },
674 { "cmps{b||b|}", Xb, Yb, XX },
675 { "cmps{R||R|}", Xv, Yv, XX },
677 { "testB", AL, Ib, XX },
678 { "testS", eAX, Iv, XX },
679 { "stosB", Yb, AL, XX },
680 { "stosS", Yv, eAX, XX },
681 { "lodsB", AL, Xb, XX },
682 { "lodsS", eAX, Xv, XX },
683 { "scasB", AL, Yb, XX },
684 { "scasS", eAX, Yv, XX },
686 { "movB", RMAL, Ib, XX },
687 { "movB", RMCL, Ib, XX },
688 { "movB", RMDL, Ib, XX },
689 { "movB", RMBL, Ib, XX },
690 { "movB", RMAH, Ib, XX },
691 { "movB", RMCH, Ib, XX },
692 { "movB", RMDH, Ib, XX },
693 { "movB", RMBH, Ib, XX },
695 { "movS", RMeAX, Iv64, XX },
696 { "movS", RMeCX, Iv64, XX },
697 { "movS", RMeDX, Iv64, XX },
698 { "movS", RMeBX, Iv64, XX },
699 { "movS", RMeSP, Iv64, XX },
700 { "movS", RMeBP, Iv64, XX },
701 { "movS", RMeSI, Iv64, XX },
702 { "movS", RMeDI, Iv64, XX },
706 { "retT", Iw, XX, XX },
707 { "retT", XX, XX, XX },
708 { "les{S|}", Gv, Mp, XX },
709 { "ldsS", Gv, Mp, XX },
710 { "movA", Eb, Ib, XX },
711 { "movQ", Ev, Iv, XX },
713 { "enterT", Iw, Ib, XX },
714 { "leaveT", XX, XX, XX },
715 { "lretP", Iw, XX, XX },
716 { "lretP", XX, XX, XX },
717 { "int3", XX, XX, XX },
718 { "int", Ib, XX, XX },
719 { "into{|}", XX, XX, XX },
720 { "iretP", XX, XX, XX },
726 { "aam{|}", sIb, XX, XX },
727 { "aad{|}", sIb, XX, XX },
728 { "(bad)", XX, XX, XX },
729 { "xlat", DSBX, XX, XX },
740 { "loopneFH", Jb, XX, loop_jcxz_flag },
741 { "loopeFH", Jb, XX, loop_jcxz_flag },
742 { "loopFH", Jb, XX, loop_jcxz_flag },
743 { "jEcxzH", Jb, XX, loop_jcxz_flag },
744 { "inB", AL, Ib, XX },
745 { "inS", eAX, Ib, XX },
746 { "outB", Ib, AL, XX },
747 { "outS", Ib, eAX, XX },
749 { "callT", Jv, XX, XX },
750 { "jmpT", Jv, XX, XX },
751 { "Jjmp{T|}", Ap, XX, XX },
752 { "jmp", Jb, XX, XX },
753 { "inB", AL, indirDX, XX },
754 { "inS", eAX, indirDX, XX },
755 { "outB", indirDX, AL, XX },
756 { "outS", indirDX, eAX, XX },
758 { "(bad)", XX, XX, XX }, /* lock prefix */
759 { "icebp", XX, XX, XX },
760 { "(bad)", XX, XX, XX }, /* repne */
761 { "(bad)", XX, XX, XX }, /* repz */
762 { "hlt", XX, XX, XX },
763 { "cmc", XX, XX, XX },
767 { "clc", XX, XX, XX },
768 { "stc", XX, XX, XX },
769 { "cli", XX, XX, XX },
770 { "sti", XX, XX, XX },
771 { "cld", XX, XX, XX },
772 { "std", XX, XX, XX },
777 static const struct dis386 dis386_twobyte[] = {
781 { "larS", Gv, Ew, XX },
782 { "lslS", Gv, Ew, XX },
783 { "(bad)", XX, XX, XX },
784 { "syscall", XX, XX, XX },
785 { "clts", XX, XX, XX },
786 { "sysretP", XX, XX, XX },
788 { "invd", XX, XX, XX },
789 { "wbinvd", XX, XX, XX },
790 { "(bad)", XX, XX, XX },
791 { "ud2a", XX, XX, XX },
792 { "(bad)", XX, XX, XX },
794 { "femms", XX, XX, XX },
795 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */
800 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
801 { "unpcklpX", XM, EX, XX },
802 { "unpckhpX", XM, EX, XX },
804 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
807 { "(bad)", XX, XX, XX },
808 { "(bad)", XX, XX, XX },
809 { "(bad)", XX, XX, XX },
810 { "(bad)", XX, XX, XX },
811 { "(bad)", XX, XX, XX },
812 { "(bad)", XX, XX, XX },
813 { "(bad)", XX, XX, XX },
815 { "movL", Rm, Cm, XX },
816 { "movL", Rm, Dm, XX },
817 { "movL", Cm, Rm, XX },
818 { "movL", Dm, Rm, XX },
819 { "movL", Rd, Td, XX },
820 { "(bad)", XX, XX, XX },
821 { "movL", Td, Rd, XX },
822 { "(bad)", XX, XX, XX },
824 { "movapX", XM, EX, XX },
825 { "movapX", EX, XM, XX },
827 { "movntpX", Ev, XM, XX },
830 { "ucomisX", XM,EX, XX },
831 { "comisX", XM,EX, XX },
833 { "wrmsr", XX, XX, XX },
834 { "rdtsc", XX, XX, XX },
835 { "rdmsr", XX, XX, XX },
836 { "rdpmc", XX, XX, XX },
837 { "sysenter", XX, XX, XX },
838 { "sysexit", XX, XX, XX },
839 { "(bad)", XX, XX, XX },
840 { "(bad)", XX, XX, XX },
842 { "(bad)", XX, XX, XX },
843 { "(bad)", XX, XX, XX },
844 { "(bad)", XX, XX, XX },
845 { "(bad)", XX, XX, XX },
846 { "(bad)", XX, XX, XX },
847 { "(bad)", XX, XX, XX },
848 { "(bad)", XX, XX, XX },
849 { "(bad)", XX, XX, XX },
851 { "cmovo", Gv, Ev, XX },
852 { "cmovno", Gv, Ev, XX },
853 { "cmovb", Gv, Ev, XX },
854 { "cmovae", Gv, Ev, XX },
855 { "cmove", Gv, Ev, XX },
856 { "cmovne", Gv, Ev, XX },
857 { "cmovbe", Gv, Ev, XX },
858 { "cmova", Gv, Ev, XX },
860 { "cmovs", Gv, Ev, XX },
861 { "cmovns", Gv, Ev, XX },
862 { "cmovp", Gv, Ev, XX },
863 { "cmovnp", Gv, Ev, XX },
864 { "cmovl", Gv, Ev, XX },
865 { "cmovge", Gv, Ev, XX },
866 { "cmovle", Gv, Ev, XX },
867 { "cmovg", Gv, Ev, XX },
869 { "movmskpX", Gdq, XS, XX },
873 { "andpX", XM, EX, XX },
874 { "andnpX", XM, EX, XX },
875 { "orpX", XM, EX, XX },
876 { "xorpX", XM, EX, XX },
887 { "punpcklbw", MX, EM, XX },
888 { "punpcklwd", MX, EM, XX },
889 { "punpckldq", MX, EM, XX },
890 { "packsswb", MX, EM, XX },
891 { "pcmpgtb", MX, EM, XX },
892 { "pcmpgtw", MX, EM, XX },
893 { "pcmpgtd", MX, EM, XX },
894 { "packuswb", MX, EM, XX },
896 { "punpckhbw", MX, EM, XX },
897 { "punpckhwd", MX, EM, XX },
898 { "punpckhdq", MX, EM, XX },
899 { "packssdw", MX, EM, XX },
902 { "movd", MX, Edq, XX },
909 { "pcmpeqb", MX, EM, XX },
910 { "pcmpeqw", MX, EM, XX },
911 { "pcmpeqd", MX, EM, XX },
912 { "emms", XX, XX, XX },
914 { "(bad)", XX, XX, XX },
915 { "(bad)", XX, XX, XX },
916 { "(bad)", XX, XX, XX },
917 { "(bad)", XX, XX, XX },
923 { "joH", Jv, XX, cond_jump_flag },
924 { "jnoH", Jv, XX, cond_jump_flag },
925 { "jbH", Jv, XX, cond_jump_flag },
926 { "jaeH", Jv, XX, cond_jump_flag },
927 { "jeH", Jv, XX, cond_jump_flag },
928 { "jneH", Jv, XX, cond_jump_flag },
929 { "jbeH", Jv, XX, cond_jump_flag },
930 { "jaH", Jv, XX, cond_jump_flag },
932 { "jsH", Jv, XX, cond_jump_flag },
933 { "jnsH", Jv, XX, cond_jump_flag },
934 { "jpH", Jv, XX, cond_jump_flag },
935 { "jnpH", Jv, XX, cond_jump_flag },
936 { "jlH", Jv, XX, cond_jump_flag },
937 { "jgeH", Jv, XX, cond_jump_flag },
938 { "jleH", Jv, XX, cond_jump_flag },
939 { "jgH", Jv, XX, cond_jump_flag },
941 { "seto", Eb, XX, XX },
942 { "setno", Eb, XX, XX },
943 { "setb", Eb, XX, XX },
944 { "setae", Eb, XX, XX },
945 { "sete", Eb, XX, XX },
946 { "setne", Eb, XX, XX },
947 { "setbe", Eb, XX, XX },
948 { "seta", Eb, XX, XX },
950 { "sets", Eb, XX, XX },
951 { "setns", Eb, XX, XX },
952 { "setp", Eb, XX, XX },
953 { "setnp", Eb, XX, XX },
954 { "setl", Eb, XX, XX },
955 { "setge", Eb, XX, XX },
956 { "setle", Eb, XX, XX },
957 { "setg", Eb, XX, XX },
959 { "pushT", fs, XX, XX },
960 { "popT", fs, XX, XX },
961 { "cpuid", XX, XX, XX },
962 { "btS", Ev, Gv, XX },
963 { "shldS", Ev, Gv, Ib },
964 { "shldS", Ev, Gv, CL },
968 { "pushT", gs, XX, XX },
969 { "popT", gs, XX, XX },
970 { "rsm", XX, XX, XX },
971 { "btsS", Ev, Gv, XX },
972 { "shrdS", Ev, Gv, Ib },
973 { "shrdS", Ev, Gv, CL },
975 { "imulS", Gv, Ev, XX },
977 { "cmpxchgB", Eb, Gb, XX },
978 { "cmpxchgS", Ev, Gv, XX },
979 { "lssS", Gv, Mp, XX },
980 { "btrS", Ev, Gv, XX },
981 { "lfsS", Gv, Mp, XX },
982 { "lgsS", Gv, Mp, XX },
983 { "movz{bR|x|bR|x}", Gv, Eb, XX },
984 { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */
986 { "(bad)", XX, XX, XX },
987 { "ud2b", XX, XX, XX },
989 { "btcS", Ev, Gv, XX },
990 { "bsfS", Gv, Ev, XX },
991 { "bsrS", Gv, Ev, XX },
992 { "movs{bR|x|bR|x}", Gv, Eb, XX },
993 { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */
995 { "xaddB", Eb, Gb, XX },
996 { "xaddS", Ev, Gv, XX },
998 { "movntiS", Ev, Gv, XX },
999 { "pinsrw", MX, Edqw, Ib },
1000 { "pextrw", Gdq, MS, Ib },
1001 { "shufpX", XM, EX, Ib },
1004 { "bswap", RMeAX, XX, XX },
1005 { "bswap", RMeCX, XX, XX },
1006 { "bswap", RMeDX, XX, XX },
1007 { "bswap", RMeBX, XX, XX },
1008 { "bswap", RMeSP, XX, XX },
1009 { "bswap", RMeBP, XX, XX },
1010 { "bswap", RMeSI, XX, XX },
1011 { "bswap", RMeDI, XX, XX },
1014 { "psrlw", MX, EM, XX },
1015 { "psrld", MX, EM, XX },
1016 { "psrlq", MX, EM, XX },
1017 { "paddq", MX, EM, XX },
1018 { "pmullw", MX, EM, XX },
1020 { "pmovmskb", Gdq, MS, XX },
1022 { "psubusb", MX, EM, XX },
1023 { "psubusw", MX, EM, XX },
1024 { "pminub", MX, EM, XX },
1025 { "pand", MX, EM, XX },
1026 { "paddusb", MX, EM, XX },
1027 { "paddusw", MX, EM, XX },
1028 { "pmaxub", MX, EM, XX },
1029 { "pandn", MX, EM, XX },
1031 { "pavgb", MX, EM, XX },
1032 { "psraw", MX, EM, XX },
1033 { "psrad", MX, EM, XX },
1034 { "pavgw", MX, EM, XX },
1035 { "pmulhuw", MX, EM, XX },
1036 { "pmulhw", MX, EM, XX },
1040 { "psubsb", MX, EM, XX },
1041 { "psubsw", MX, EM, XX },
1042 { "pminsw", MX, EM, XX },
1043 { "por", MX, EM, XX },
1044 { "paddsb", MX, EM, XX },
1045 { "paddsw", MX, EM, XX },
1046 { "pmaxsw", MX, EM, XX },
1047 { "pxor", MX, EM, XX },
1050 { "psllw", MX, EM, XX },
1051 { "pslld", MX, EM, XX },
1052 { "psllq", MX, EM, XX },
1053 { "pmuludq", MX, EM, XX },
1054 { "pmaddwd", MX, EM, XX },
1055 { "psadbw", MX, EM, XX },
1058 { "psubb", MX, EM, XX },
1059 { "psubw", MX, EM, XX },
1060 { "psubd", MX, EM, XX },
1061 { "psubq", MX, EM, XX },
1062 { "paddb", MX, EM, XX },
1063 { "paddw", MX, EM, XX },
1064 { "paddd", MX, EM, XX },
1065 { "(bad)", XX, XX, XX }
1068 static const unsigned char onebyte_has_modrm[256] = {
1069 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1070 /* ------------------------------- */
1071 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1072 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1073 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1074 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1075 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1076 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1077 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1078 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1079 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1080 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1081 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1082 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1083 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1084 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1085 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1086 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1087 /* ------------------------------- */
1088 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1091 static const unsigned char twobyte_has_modrm[256] = {
1092 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1093 /* ------------------------------- */
1094 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1095 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
1096 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1097 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1098 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1099 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1100 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1101 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,1,1,1,1, /* 7f */
1102 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1103 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1104 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1105 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
1106 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1107 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1108 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1109 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1110 /* ------------------------------- */
1111 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1114 static const unsigned char twobyte_uses_SSE_prefix[256] = {
1115 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1116 /* ------------------------------- */
1117 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1118 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1119 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
1120 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1121 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1122 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1123 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1124 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1, /* 7f */
1125 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1126 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1127 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1128 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1129 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1130 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1131 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1132 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1133 /* ------------------------------- */
1134 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1137 static char obuf[100];
1139 static char scratchbuf[100];
1140 static unsigned char *start_codep;
1141 static unsigned char *insn_codep;
1142 static unsigned char *codep;
1143 static disassemble_info *the_info;
1147 static unsigned char need_modrm;
1149 /* If we are accessing mod/rm/reg without need_modrm set, then the
1150 values are stale. Hitting this abort likely indicates that you
1151 need to update onebyte_has_modrm or twobyte_has_modrm. */
1152 #define MODRM_CHECK if (!need_modrm) abort ()
1154 static const char **names64;
1155 static const char **names32;
1156 static const char **names16;
1157 static const char **names8;
1158 static const char **names8rex;
1159 static const char **names_seg;
1160 static const char **index16;
1162 static const char *intel_names64[] = {
1163 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1164 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1166 static const char *intel_names32[] = {
1167 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1168 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1170 static const char *intel_names16[] = {
1171 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1172 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1174 static const char *intel_names8[] = {
1175 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1177 static const char *intel_names8rex[] = {
1178 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1179 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1181 static const char *intel_names_seg[] = {
1182 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1184 static const char *intel_index16[] = {
1185 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1188 static const char *att_names64[] = {
1189 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1190 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1192 static const char *att_names32[] = {
1193 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1194 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1196 static const char *att_names16[] = {
1197 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1198 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1200 static const char *att_names8[] = {
1201 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1203 static const char *att_names8rex[] = {
1204 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1205 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1207 static const char *att_names_seg[] = {
1208 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1210 static const char *att_index16[] = {
1211 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1214 static const struct dis386 grps[][8] = {
1217 { "addA", Eb, Ib, XX },
1218 { "orA", Eb, Ib, XX },
1219 { "adcA", Eb, Ib, XX },
1220 { "sbbA", Eb, Ib, XX },
1221 { "andA", Eb, Ib, XX },
1222 { "subA", Eb, Ib, XX },
1223 { "xorA", Eb, Ib, XX },
1224 { "cmpA", Eb, Ib, XX }
1228 { "addQ", Ev, Iv, XX },
1229 { "orQ", Ev, Iv, XX },
1230 { "adcQ", Ev, Iv, XX },
1231 { "sbbQ", Ev, Iv, XX },
1232 { "andQ", Ev, Iv, XX },
1233 { "subQ", Ev, Iv, XX },
1234 { "xorQ", Ev, Iv, XX },
1235 { "cmpQ", Ev, Iv, XX }
1239 { "addQ", Ev, sIb, XX },
1240 { "orQ", Ev, sIb, XX },
1241 { "adcQ", Ev, sIb, XX },
1242 { "sbbQ", Ev, sIb, XX },
1243 { "andQ", Ev, sIb, XX },
1244 { "subQ", Ev, sIb, XX },
1245 { "xorQ", Ev, sIb, XX },
1246 { "cmpQ", Ev, sIb, XX }
1250 { "rolA", Eb, Ib, XX },
1251 { "rorA", Eb, Ib, XX },
1252 { "rclA", Eb, Ib, XX },
1253 { "rcrA", Eb, Ib, XX },
1254 { "shlA", Eb, Ib, XX },
1255 { "shrA", Eb, Ib, XX },
1256 { "(bad)", XX, XX, XX },
1257 { "sarA", Eb, Ib, XX },
1261 { "rolQ", Ev, Ib, XX },
1262 { "rorQ", Ev, Ib, XX },
1263 { "rclQ", Ev, Ib, XX },
1264 { "rcrQ", Ev, Ib, XX },
1265 { "shlQ", Ev, Ib, XX },
1266 { "shrQ", Ev, Ib, XX },
1267 { "(bad)", XX, XX, XX },
1268 { "sarQ", Ev, Ib, XX },
1272 { "rolA", Eb, I1, XX },
1273 { "rorA", Eb, I1, XX },
1274 { "rclA", Eb, I1, XX },
1275 { "rcrA", Eb, I1, XX },
1276 { "shlA", Eb, I1, XX },
1277 { "shrA", Eb, I1, XX },
1278 { "(bad)", XX, XX, XX },
1279 { "sarA", Eb, I1, XX },
1283 { "rolQ", Ev, I1, XX },
1284 { "rorQ", Ev, I1, XX },
1285 { "rclQ", Ev, I1, XX },
1286 { "rcrQ", Ev, I1, XX },
1287 { "shlQ", Ev, I1, XX },
1288 { "shrQ", Ev, I1, XX },
1289 { "(bad)", XX, XX, XX},
1290 { "sarQ", Ev, I1, XX },
1294 { "rolA", Eb, CL, XX },
1295 { "rorA", Eb, CL, XX },
1296 { "rclA", Eb, CL, XX },
1297 { "rcrA", Eb, CL, XX },
1298 { "shlA", Eb, CL, XX },
1299 { "shrA", Eb, CL, XX },
1300 { "(bad)", XX, XX, XX },
1301 { "sarA", Eb, CL, XX },
1305 { "rolQ", Ev, CL, XX },
1306 { "rorQ", Ev, CL, XX },
1307 { "rclQ", Ev, CL, XX },
1308 { "rcrQ", Ev, CL, XX },
1309 { "shlQ", Ev, CL, XX },
1310 { "shrQ", Ev, CL, XX },
1311 { "(bad)", XX, XX, XX },
1312 { "sarQ", Ev, CL, XX }
1316 { "testA", Eb, Ib, XX },
1317 { "(bad)", Eb, XX, XX },
1318 { "notA", Eb, XX, XX },
1319 { "negA", Eb, XX, XX },
1320 { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */
1321 { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */
1322 { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */
1323 { "idivA", Eb, XX, XX } /* and idiv for consistency. */
1327 { "testQ", Ev, Iv, XX },
1328 { "(bad)", XX, XX, XX },
1329 { "notQ", Ev, XX, XX },
1330 { "negQ", Ev, XX, XX },
1331 { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */
1332 { "imulQ", Ev, XX, XX },
1333 { "divQ", Ev, XX, XX },
1334 { "idivQ", Ev, XX, XX },
1338 { "incA", Eb, XX, XX },
1339 { "decA", Eb, XX, XX },
1340 { "(bad)", XX, XX, XX },
1341 { "(bad)", XX, XX, XX },
1342 { "(bad)", XX, XX, XX },
1343 { "(bad)", XX, XX, XX },
1344 { "(bad)", XX, XX, XX },
1345 { "(bad)", XX, XX, XX },
1349 { "incQ", Ev, XX, XX },
1350 { "decQ", Ev, XX, XX },
1351 { "callT", indirEv, XX, XX },
1352 { "JcallT", indirEp, XX, XX },
1353 { "jmpT", indirEv, XX, XX },
1354 { "JjmpT", indirEp, XX, XX },
1355 { "pushU", Ev, XX, XX },
1356 { "(bad)", XX, XX, XX },
1360 { "sldtQ", Ev, XX, XX },
1361 { "strQ", Ev, XX, XX },
1362 { "lldt", Ew, XX, XX },
1363 { "ltr", Ew, XX, XX },
1364 { "verr", Ew, XX, XX },
1365 { "verw", Ew, XX, XX },
1366 { "(bad)", XX, XX, XX },
1367 { "(bad)", XX, XX, XX }
1371 { "sgdtIQ", M, XX, XX },
1372 { "sidtIQ", PNI_Fixup, 0, XX, XX },
1373 { "lgdt{Q|Q||}", M, XX, XX },
1374 { "lidt{Q|Q||}", M, XX, XX },
1375 { "smswQ", Ev, XX, XX },
1376 { "(bad)", XX, XX, XX },
1377 { "lmsw", Ew, XX, XX },
1378 { "invlpg", INVLPG_Fixup, w_mode, XX, XX },
1382 { "(bad)", XX, XX, XX },
1383 { "(bad)", XX, XX, XX },
1384 { "(bad)", XX, XX, XX },
1385 { "(bad)", XX, XX, XX },
1386 { "btQ", Ev, Ib, XX },
1387 { "btsQ", Ev, Ib, XX },
1388 { "btrQ", Ev, Ib, XX },
1389 { "btcQ", Ev, Ib, XX },
1393 { "(bad)", XX, XX, XX },
1394 { "cmpxchg8b", Eq, XX, XX },
1395 { "(bad)", XX, XX, XX },
1396 { "(bad)", XX, XX, XX },
1397 { "(bad)", XX, XX, XX },
1398 { "(bad)", XX, XX, XX },
1399 { "(bad)", XX, XX, XX },
1400 { "(bad)", XX, XX, XX },
1404 { "(bad)", XX, XX, XX },
1405 { "(bad)", XX, XX, XX },
1406 { "psrlw", MS, Ib, XX },
1407 { "(bad)", XX, XX, XX },
1408 { "psraw", MS, Ib, XX },
1409 { "(bad)", XX, XX, XX },
1410 { "psllw", MS, Ib, XX },
1411 { "(bad)", XX, XX, XX },
1415 { "(bad)", XX, XX, XX },
1416 { "(bad)", XX, XX, XX },
1417 { "psrld", MS, Ib, XX },
1418 { "(bad)", XX, XX, XX },
1419 { "psrad", MS, Ib, XX },
1420 { "(bad)", XX, XX, XX },
1421 { "pslld", MS, Ib, XX },
1422 { "(bad)", XX, XX, XX },
1426 { "(bad)", XX, XX, XX },
1427 { "(bad)", XX, XX, XX },
1428 { "psrlq", MS, Ib, XX },
1429 { "psrldq", MS, Ib, XX },
1430 { "(bad)", XX, XX, XX },
1431 { "(bad)", XX, XX, XX },
1432 { "psllq", MS, Ib, XX },
1433 { "pslldq", MS, Ib, XX },
1437 { "fxsave", Ev, XX, XX },
1438 { "fxrstor", Ev, XX, XX },
1439 { "ldmxcsr", Ev, XX, XX },
1440 { "stmxcsr", Ev, XX, XX },
1441 { "(bad)", XX, XX, XX },
1442 { "lfence", OP_0fae, 0, XX, XX },
1443 { "mfence", OP_0fae, 0, XX, XX },
1444 { "clflush", OP_0fae, 0, XX, XX },
1448 { "prefetchnta", Ev, XX, XX },
1449 { "prefetcht0", Ev, XX, XX },
1450 { "prefetcht1", Ev, XX, XX },
1451 { "prefetcht2", Ev, XX, XX },
1452 { "(bad)", XX, XX, XX },
1453 { "(bad)", XX, XX, XX },
1454 { "(bad)", XX, XX, XX },
1455 { "(bad)", XX, XX, XX },
1459 { "prefetch", Eb, XX, XX },
1460 { "prefetchw", Eb, XX, XX },
1461 { "(bad)", XX, XX, XX },
1462 { "(bad)", XX, XX, XX },
1463 { "(bad)", XX, XX, XX },
1464 { "(bad)", XX, XX, XX },
1465 { "(bad)", XX, XX, XX },
1466 { "(bad)", XX, XX, XX },
1470 { "xstorerng", OP_0f07, 0, XX, XX },
1471 { "xcryptecb", OP_0f07, 0, XX, XX },
1472 { "xcryptcbc", OP_0f07, 0, XX, XX },
1473 { "(bad)", OP_0f07, 0, XX, XX },
1474 { "xcryptcfb", OP_0f07, 0, XX, XX },
1475 { "xcryptofb", OP_0f07, 0, XX, XX },
1476 { "(bad)", OP_0f07, 0, XX, XX },
1477 { "(bad)", OP_0f07, 0, XX, XX },
1481 { "montmul", OP_0f07, 0, XX, XX },
1482 { "xsha1", OP_0f07, 0, XX, XX },
1483 { "xsha256", OP_0f07, 0, XX, XX },
1484 { "(bad)", OP_0f07, 0, XX, XX },
1485 { "(bad)", OP_0f07, 0, XX, XX },
1486 { "(bad)", OP_0f07, 0, XX, XX },
1487 { "(bad)", OP_0f07, 0, XX, XX },
1488 { "(bad)", OP_0f07, 0, XX, XX },
1492 static const struct dis386 prefix_user_table[][4] = {
1495 { "addps", XM, EX, XX },
1496 { "addss", XM, EX, XX },
1497 { "addpd", XM, EX, XX },
1498 { "addsd", XM, EX, XX },
1502 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */
1503 { "", XM, EX, OPSIMD },
1504 { "", XM, EX, OPSIMD },
1505 { "", XM, EX, OPSIMD },
1509 { "cvtpi2ps", XM, EM, XX },
1510 { "cvtsi2ssY", XM, Ev, XX },
1511 { "cvtpi2pd", XM, EM, XX },
1512 { "cvtsi2sdY", XM, Ev, XX },
1516 { "cvtps2pi", MX, EX, XX },
1517 { "cvtss2siY", Gv, EX, XX },
1518 { "cvtpd2pi", MX, EX, XX },
1519 { "cvtsd2siY", Gv, EX, XX },
1523 { "cvttps2pi", MX, EX, XX },
1524 { "cvttss2siY", Gv, EX, XX },
1525 { "cvttpd2pi", MX, EX, XX },
1526 { "cvttsd2siY", Gv, EX, XX },
1530 { "divps", XM, EX, XX },
1531 { "divss", XM, EX, XX },
1532 { "divpd", XM, EX, XX },
1533 { "divsd", XM, EX, XX },
1537 { "maxps", XM, EX, XX },
1538 { "maxss", XM, EX, XX },
1539 { "maxpd", XM, EX, XX },
1540 { "maxsd", XM, EX, XX },
1544 { "minps", XM, EX, XX },
1545 { "minss", XM, EX, XX },
1546 { "minpd", XM, EX, XX },
1547 { "minsd", XM, EX, XX },
1551 { "movups", XM, EX, XX },
1552 { "movss", XM, EX, XX },
1553 { "movupd", XM, EX, XX },
1554 { "movsd", XM, EX, XX },
1558 { "movups", EX, XM, XX },
1559 { "movss", EX, XM, XX },
1560 { "movupd", EX, XM, XX },
1561 { "movsd", EX, XM, XX },
1565 { "mulps", XM, EX, XX },
1566 { "mulss", XM, EX, XX },
1567 { "mulpd", XM, EX, XX },
1568 { "mulsd", XM, EX, XX },
1572 { "rcpps", XM, EX, XX },
1573 { "rcpss", XM, EX, XX },
1574 { "(bad)", XM, EX, XX },
1575 { "(bad)", XM, EX, XX },
1579 { "rsqrtps", XM, EX, XX },
1580 { "rsqrtss", XM, EX, XX },
1581 { "(bad)", XM, EX, XX },
1582 { "(bad)", XM, EX, XX },
1586 { "sqrtps", XM, EX, XX },
1587 { "sqrtss", XM, EX, XX },
1588 { "sqrtpd", XM, EX, XX },
1589 { "sqrtsd", XM, EX, XX },
1593 { "subps", XM, EX, XX },
1594 { "subss", XM, EX, XX },
1595 { "subpd", XM, EX, XX },
1596 { "subsd", XM, EX, XX },
1600 { "(bad)", XM, EX, XX },
1601 { "cvtdq2pd", XM, EX, XX },
1602 { "cvttpd2dq", XM, EX, XX },
1603 { "cvtpd2dq", XM, EX, XX },
1607 { "cvtdq2ps", XM, EX, XX },
1608 { "cvttps2dq",XM, EX, XX },
1609 { "cvtps2dq",XM, EX, XX },
1610 { "(bad)", XM, EX, XX },
1614 { "cvtps2pd", XM, EX, XX },
1615 { "cvtss2sd", XM, EX, XX },
1616 { "cvtpd2ps", XM, EX, XX },
1617 { "cvtsd2ss", XM, EX, XX },
1621 { "maskmovq", MX, MS, XX },
1622 { "(bad)", XM, EX, XX },
1623 { "maskmovdqu", XM, EX, XX },
1624 { "(bad)", XM, EX, XX },
1628 { "movq", MX, EM, XX },
1629 { "movdqu", XM, EX, XX },
1630 { "movdqa", XM, EX, XX },
1631 { "(bad)", XM, EX, XX },
1635 { "movq", EM, MX, XX },
1636 { "movdqu", EX, XM, XX },
1637 { "movdqa", EX, XM, XX },
1638 { "(bad)", EX, XM, XX },
1642 { "(bad)", EX, XM, XX },
1643 { "movq2dq", XM, MS, XX },
1644 { "movq", EX, XM, XX },
1645 { "movdq2q", MX, XS, XX },
1649 { "pshufw", MX, EM, Ib },
1650 { "pshufhw", XM, EX, Ib },
1651 { "pshufd", XM, EX, Ib },
1652 { "pshuflw", XM, EX, Ib },
1656 { "movd", Edq, MX, XX },
1657 { "movq", XM, EX, XX },
1658 { "movd", Edq, XM, XX },
1659 { "(bad)", Ed, XM, XX },
1663 { "(bad)", MX, EX, XX },
1664 { "(bad)", XM, EX, XX },
1665 { "punpckhqdq", XM, EX, XX },
1666 { "(bad)", XM, EX, XX },
1670 { "movntq", EM, MX, XX },
1671 { "(bad)", EM, XM, XX },
1672 { "movntdq", EM, XM, XX },
1673 { "(bad)", EM, XM, XX },
1677 { "(bad)", MX, EX, XX },
1678 { "(bad)", XM, EX, XX },
1679 { "punpcklqdq", XM, EX, XX },
1680 { "(bad)", XM, EX, XX },
1684 { "(bad)", MX, EX, XX },
1685 { "(bad)", XM, EX, XX },
1686 { "addsubpd", XM, EX, XX },
1687 { "addsubps", XM, EX, XX },
1691 { "(bad)", MX, EX, XX },
1692 { "(bad)", XM, EX, XX },
1693 { "haddpd", XM, EX, XX },
1694 { "haddps", XM, EX, XX },
1698 { "(bad)", MX, EX, XX },
1699 { "(bad)", XM, EX, XX },
1700 { "hsubpd", XM, EX, XX },
1701 { "hsubps", XM, EX, XX },
1705 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1706 { "movsldup", XM, EX, XX },
1707 { "movlpd", XM, EX, XX },
1708 { "movddup", XM, EX, XX },
1712 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
1713 { "movshdup", XM, EX, XX },
1714 { "movhpd", XM, EX, XX },
1715 { "(bad)", XM, EX, XX },
1719 { "(bad)", XM, EX, XX },
1720 { "(bad)", XM, EX, XX },
1721 { "(bad)", XM, EX, XX },
1722 { "lddqu", XM, M, XX },
1726 static const struct dis386 x86_64_table[][2] = {
1728 { "arpl", Ew, Gw, XX },
1729 { "movs{||lq|xd}", Gv, Ed, XX },
1733 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1745 FETCH_DATA (the_info, codep + 1);
1749 /* REX prefixes family. */
1772 prefixes |= PREFIX_REPZ;
1775 prefixes |= PREFIX_REPNZ;
1778 prefixes |= PREFIX_LOCK;
1781 prefixes |= PREFIX_CS;
1784 prefixes |= PREFIX_SS;
1787 prefixes |= PREFIX_DS;
1790 prefixes |= PREFIX_ES;
1793 prefixes |= PREFIX_FS;
1796 prefixes |= PREFIX_GS;
1799 prefixes |= PREFIX_DATA;
1802 prefixes |= PREFIX_ADDR;
1805 /* fwait is really an instruction. If there are prefixes
1806 before the fwait, they belong to the fwait, *not* to the
1807 following instruction. */
1810 prefixes |= PREFIX_FWAIT;
1814 prefixes = PREFIX_FWAIT;
1819 /* Rex is ignored when followed by another prefix. */
1822 oappend (prefix_name (rex, 0));
1830 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
1834 prefix_name (int pref, int sizeflag)
1838 /* REX prefixes family. */
1890 return (sizeflag & DFLAG) ? "data16" : "data32";
1893 return (sizeflag & AFLAG) ? "addr32" : "addr64";
1895 return ((sizeflag & AFLAG) && !mode_64bit) ? "addr16" : "addr32";
1903 static char op1out[100], op2out[100], op3out[100];
1904 static int op_ad, op_index[3];
1905 static int two_source_ops;
1906 static bfd_vma op_address[3];
1907 static bfd_vma op_riprel[3];
1908 static bfd_vma start_pc;
1911 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1912 * (see topic "Redundant prefixes" in the "Differences from 8086"
1913 * section of the "Virtual 8086 Mode" chapter.)
1914 * 'pc' should be the address of this instruction, it will
1915 * be used to print the target address if this is a relative jump or call
1916 * The function returns the length of this instruction in bytes.
1919 static char intel_syntax;
1920 static char open_char;
1921 static char close_char;
1922 static char separator_char;
1923 static char scale_char;
1925 /* Here for backwards compatibility. When gdb stops using
1926 print_insn_i386_att and print_insn_i386_intel these functions can
1927 disappear, and print_insn_i386 be merged into print_insn. */
1929 print_insn_i386_att (bfd_vma pc, disassemble_info *info)
1933 return print_insn (pc, info);
1937 print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
1941 return print_insn (pc, info);
1945 print_insn_i386 (bfd_vma pc, disassemble_info *info)
1949 return print_insn (pc, info);
1953 print_insn (bfd_vma pc, disassemble_info *info)
1955 const struct dis386 *dp;
1957 char *first, *second, *third;
1959 unsigned char uses_SSE_prefix, uses_LOCK_prefix;
1962 struct dis_private priv;
1964 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax
1965 || info->mach == bfd_mach_x86_64);
1967 if (intel_syntax == (char) -1)
1968 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
1969 || info->mach == bfd_mach_x86_64_intel_syntax);
1971 if (info->mach == bfd_mach_i386_i386
1972 || info->mach == bfd_mach_x86_64
1973 || info->mach == bfd_mach_i386_i386_intel_syntax
1974 || info->mach == bfd_mach_x86_64_intel_syntax)
1975 priv.orig_sizeflag = AFLAG | DFLAG;
1976 else if (info->mach == bfd_mach_i386_i8086)
1977 priv.orig_sizeflag = 0;
1981 for (p = info->disassembler_options; p != NULL; )
1983 if (strncmp (p, "x86-64", 6) == 0)
1986 priv.orig_sizeflag = AFLAG | DFLAG;
1988 else if (strncmp (p, "i386", 4) == 0)
1991 priv.orig_sizeflag = AFLAG | DFLAG;
1993 else if (strncmp (p, "i8086", 5) == 0)
1996 priv.orig_sizeflag = 0;
1998 else if (strncmp (p, "intel", 5) == 0)
2002 else if (strncmp (p, "att", 3) == 0)
2006 else if (strncmp (p, "addr", 4) == 0)
2008 if (p[4] == '1' && p[5] == '6')
2009 priv.orig_sizeflag &= ~AFLAG;
2010 else if (p[4] == '3' && p[5] == '2')
2011 priv.orig_sizeflag |= AFLAG;
2013 else if (strncmp (p, "data", 4) == 0)
2015 if (p[4] == '1' && p[5] == '6')
2016 priv.orig_sizeflag &= ~DFLAG;
2017 else if (p[4] == '3' && p[5] == '2')
2018 priv.orig_sizeflag |= DFLAG;
2020 else if (strncmp (p, "suffix", 6) == 0)
2021 priv.orig_sizeflag |= SUFFIX_ALWAYS;
2023 p = strchr (p, ',');
2030 names64 = intel_names64;
2031 names32 = intel_names32;
2032 names16 = intel_names16;
2033 names8 = intel_names8;
2034 names8rex = intel_names8rex;
2035 names_seg = intel_names_seg;
2036 index16 = intel_index16;
2039 separator_char = '+';
2044 names64 = att_names64;
2045 names32 = att_names32;
2046 names16 = att_names16;
2047 names8 = att_names8;
2048 names8rex = att_names8rex;
2049 names_seg = att_names_seg;
2050 index16 = att_index16;
2053 separator_char = ',';
2057 /* The output looks better if we put 7 bytes on a line, since that
2058 puts most long word instructions on a single line. */
2059 info->bytes_per_line = 7;
2061 info->private_data = &priv;
2062 priv.max_fetched = priv.the_buffer;
2063 priv.insn_start = pc;
2070 op_index[0] = op_index[1] = op_index[2] = -1;
2074 start_codep = priv.the_buffer;
2075 codep = priv.the_buffer;
2077 if (setjmp (priv.bailout) != 0)
2081 /* Getting here means we tried for data but didn't get it. That
2082 means we have an incomplete instruction of some sort. Just
2083 print the first byte as a prefix or a .byte pseudo-op. */
2084 if (codep > priv.the_buffer)
2086 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2088 (*info->fprintf_func) (info->stream, "%s", name);
2091 /* Just print the first byte as a .byte instruction. */
2092 (*info->fprintf_func) (info->stream, ".byte 0x%x",
2093 (unsigned int) priv.the_buffer[0]);
2106 sizeflag = priv.orig_sizeflag;
2108 FETCH_DATA (info, codep + 1);
2109 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
2111 if ((prefixes & PREFIX_FWAIT)
2112 && ((*codep < 0xd8) || (*codep > 0xdf)))
2116 /* fwait not followed by floating point instruction. Print the
2117 first prefix, which is probably fwait itself. */
2118 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2120 name = INTERNAL_DISASSEMBLER_ERROR;
2121 (*info->fprintf_func) (info->stream, "%s", name);
2127 FETCH_DATA (info, codep + 2);
2128 dp = &dis386_twobyte[*++codep];
2129 need_modrm = twobyte_has_modrm[*codep];
2130 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
2131 uses_LOCK_prefix = (*codep & ~0x02) == 0x20;
2135 dp = &dis386[*codep];
2136 need_modrm = onebyte_has_modrm[*codep];
2137 uses_SSE_prefix = 0;
2138 uses_LOCK_prefix = 0;
2142 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
2145 used_prefixes |= PREFIX_REPZ;
2147 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
2150 used_prefixes |= PREFIX_REPNZ;
2152 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
2155 used_prefixes |= PREFIX_LOCK;
2158 if (prefixes & PREFIX_ADDR)
2161 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
2163 if ((sizeflag & AFLAG) || mode_64bit)
2164 oappend ("addr32 ");
2166 oappend ("addr16 ");
2167 used_prefixes |= PREFIX_ADDR;
2171 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
2174 if (dp->bytemode3 == cond_jump_mode
2175 && dp->bytemode1 == v_mode
2178 if (sizeflag & DFLAG)
2179 oappend ("data32 ");
2181 oappend ("data16 ");
2182 used_prefixes |= PREFIX_DATA;
2188 FETCH_DATA (info, codep + 1);
2189 mod = (*codep >> 6) & 3;
2190 reg = (*codep >> 3) & 7;
2194 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
2201 if (dp->name == NULL)
2203 switch (dp->bytemode1)
2206 dp = &grps[dp->bytemode2][reg];
2209 case USE_PREFIX_USER_TABLE:
2211 used_prefixes |= (prefixes & PREFIX_REPZ);
2212 if (prefixes & PREFIX_REPZ)
2216 used_prefixes |= (prefixes & PREFIX_DATA);
2217 if (prefixes & PREFIX_DATA)
2221 used_prefixes |= (prefixes & PREFIX_REPNZ);
2222 if (prefixes & PREFIX_REPNZ)
2226 dp = &prefix_user_table[dp->bytemode2][index];
2229 case X86_64_SPECIAL:
2230 dp = &x86_64_table[dp->bytemode2][mode_64bit];
2234 oappend (INTERNAL_DISASSEMBLER_ERROR);
2239 if (putop (dp->name, sizeflag) == 0)
2244 (*dp->op1) (dp->bytemode1, sizeflag);
2249 (*dp->op2) (dp->bytemode2, sizeflag);
2254 (*dp->op3) (dp->bytemode3, sizeflag);
2258 /* See if any prefixes were not used. If so, print the first one
2259 separately. If we don't do this, we'll wind up printing an
2260 instruction stream which does not precisely correspond to the
2261 bytes we are disassembling. */
2262 if ((prefixes & ~used_prefixes) != 0)
2266 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2268 name = INTERNAL_DISASSEMBLER_ERROR;
2269 (*info->fprintf_func) (info->stream, "%s", name);
2272 if (rex & ~rex_used)
2275 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
2277 name = INTERNAL_DISASSEMBLER_ERROR;
2278 (*info->fprintf_func) (info->stream, "%s ", name);
2281 obufp = obuf + strlen (obuf);
2282 for (i = strlen (obuf); i < 6; i++)
2285 (*info->fprintf_func) (info->stream, "%s", obuf);
2287 /* The enter and bound instructions are printed with operands in the same
2288 order as the intel book; everything else is printed in reverse order. */
2289 if (intel_syntax || two_source_ops)
2294 op_ad = op_index[0];
2295 op_index[0] = op_index[2];
2296 op_index[2] = op_ad;
2307 if (op_index[0] != -1 && !op_riprel[0])
2308 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
2310 (*info->fprintf_func) (info->stream, "%s", first);
2316 (*info->fprintf_func) (info->stream, ",");
2317 if (op_index[1] != -1 && !op_riprel[1])
2318 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
2320 (*info->fprintf_func) (info->stream, "%s", second);
2326 (*info->fprintf_func) (info->stream, ",");
2327 if (op_index[2] != -1 && !op_riprel[2])
2328 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
2330 (*info->fprintf_func) (info->stream, "%s", third);
2332 for (i = 0; i < 3; i++)
2333 if (op_index[i] != -1 && op_riprel[i])
2335 (*info->fprintf_func) (info->stream, " # ");
2336 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
2337 + op_address[op_index[i]]), info);
2339 return codep - priv.the_buffer;
2342 static const char *float_mem[] = {
2417 static const unsigned char float_mem_mode[] = {
2493 #define STi OP_STi, 0
2495 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
2496 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
2497 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
2498 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
2499 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
2500 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
2501 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
2502 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
2503 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
2505 static const struct dis386 float_reg[][8] = {
2508 { "fadd", ST, STi, XX },
2509 { "fmul", ST, STi, XX },
2510 { "fcom", STi, XX, XX },
2511 { "fcomp", STi, XX, XX },
2512 { "fsub", ST, STi, XX },
2513 { "fsubr", ST, STi, XX },
2514 { "fdiv", ST, STi, XX },
2515 { "fdivr", ST, STi, XX },
2519 { "fld", STi, XX, XX },
2520 { "fxch", STi, XX, XX },
2522 { "(bad)", XX, XX, XX },
2530 { "fcmovb", ST, STi, XX },
2531 { "fcmove", ST, STi, XX },
2532 { "fcmovbe",ST, STi, XX },
2533 { "fcmovu", ST, STi, XX },
2534 { "(bad)", XX, XX, XX },
2536 { "(bad)", XX, XX, XX },
2537 { "(bad)", XX, XX, XX },
2541 { "fcmovnb",ST, STi, XX },
2542 { "fcmovne",ST, STi, XX },
2543 { "fcmovnbe",ST, STi, XX },
2544 { "fcmovnu",ST, STi, XX },
2546 { "fucomi", ST, STi, XX },
2547 { "fcomi", ST, STi, XX },
2548 { "(bad)", XX, XX, XX },
2552 { "fadd", STi, ST, XX },
2553 { "fmul", STi, ST, XX },
2554 { "(bad)", XX, XX, XX },
2555 { "(bad)", XX, XX, XX },
2557 { "fsub", STi, ST, XX },
2558 { "fsubr", STi, ST, XX },
2559 { "fdiv", STi, ST, XX },
2560 { "fdivr", STi, ST, XX },
2562 { "fsubr", STi, ST, XX },
2563 { "fsub", STi, ST, XX },
2564 { "fdivr", STi, ST, XX },
2565 { "fdiv", STi, ST, XX },
2570 { "ffree", STi, XX, XX },
2571 { "(bad)", XX, XX, XX },
2572 { "fst", STi, XX, XX },
2573 { "fstp", STi, XX, XX },
2574 { "fucom", STi, XX, XX },
2575 { "fucomp", STi, XX, XX },
2576 { "(bad)", XX, XX, XX },
2577 { "(bad)", XX, XX, XX },
2581 { "faddp", STi, ST, XX },
2582 { "fmulp", STi, ST, XX },
2583 { "(bad)", XX, XX, XX },
2586 { "fsubp", STi, ST, XX },
2587 { "fsubrp", STi, ST, XX },
2588 { "fdivp", STi, ST, XX },
2589 { "fdivrp", STi, ST, XX },
2591 { "fsubrp", STi, ST, XX },
2592 { "fsubp", STi, ST, XX },
2593 { "fdivrp", STi, ST, XX },
2594 { "fdivp", STi, ST, XX },
2599 { "ffreep", STi, XX, XX },
2600 { "(bad)", XX, XX, XX },
2601 { "(bad)", XX, XX, XX },
2602 { "(bad)", XX, XX, XX },
2604 { "fucomip",ST, STi, XX },
2605 { "fcomip", ST, STi, XX },
2606 { "(bad)", XX, XX, XX },
2610 static char *fgrps[][8] = {
2613 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2618 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2623 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2628 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2633 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2638 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2643 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2644 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2649 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2654 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2659 dofloat (int sizeflag)
2661 const struct dis386 *dp;
2662 unsigned char floatop;
2664 floatop = codep[-1];
2668 int fp_indx = (floatop - 0xd8) * 8 + reg;
2670 putop (float_mem[fp_indx], sizeflag);
2672 OP_E (float_mem_mode[fp_indx], sizeflag);
2675 /* Skip mod/rm byte. */
2679 dp = &float_reg[floatop - 0xd8][reg];
2680 if (dp->name == NULL)
2682 putop (fgrps[dp->bytemode1][rm], sizeflag);
2684 /* Instruction fnstsw is only one with strange arg. */
2685 if (floatop == 0xdf && codep[-1] == 0xe0)
2686 strcpy (op1out, names16[0]);
2690 putop (dp->name, sizeflag);
2694 (*dp->op1) (dp->bytemode1, sizeflag);
2697 (*dp->op2) (dp->bytemode2, sizeflag);
2702 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2708 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2710 sprintf (scratchbuf, "%%st(%d)", rm);
2711 oappend (scratchbuf + intel_syntax);
2714 /* Capital letters in template are macros. */
2716 putop (const char *template, int sizeflag)
2721 for (p = template; *p; p++)
2740 /* Alternative not valid. */
2741 strcpy (obuf, "(bad)");
2745 else if (*p == '\0')
2766 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2772 if (sizeflag & SUFFIX_ALWAYS)
2776 if (intel_syntax && !alt)
2778 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
2780 if (sizeflag & DFLAG)
2781 *obufp++ = intel_syntax ? 'd' : 'l';
2783 *obufp++ = intel_syntax ? 'w' : 's';
2784 used_prefixes |= (prefixes & PREFIX_DATA);
2787 case 'E': /* For jcxz/jecxz */
2790 if (sizeflag & AFLAG)
2796 if (sizeflag & AFLAG)
2798 used_prefixes |= (prefixes & PREFIX_ADDR);
2803 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
2805 if (sizeflag & AFLAG)
2806 *obufp++ = mode_64bit ? 'q' : 'l';
2808 *obufp++ = mode_64bit ? 'l' : 'w';
2809 used_prefixes |= (prefixes & PREFIX_ADDR);
2815 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
2816 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
2818 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
2821 if (prefixes & PREFIX_DS)
2835 if (sizeflag & SUFFIX_ALWAYS)
2839 if ((prefixes & PREFIX_FWAIT) == 0)
2842 used_prefixes |= PREFIX_FWAIT;
2845 USED_REX (REX_MODE64);
2846 if (rex & REX_MODE64)
2863 if ((prefixes & PREFIX_DATA)
2864 || (rex & REX_MODE64)
2865 || (sizeflag & SUFFIX_ALWAYS))
2867 USED_REX (REX_MODE64);
2868 if (rex & REX_MODE64)
2872 if (sizeflag & DFLAG)
2876 used_prefixes |= (prefixes & PREFIX_DATA);
2890 if (intel_syntax && !alt)
2892 USED_REX (REX_MODE64);
2893 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2895 if (rex & REX_MODE64)
2899 if (sizeflag & DFLAG)
2900 *obufp++ = intel_syntax ? 'd' : 'l';
2903 used_prefixes |= (prefixes & PREFIX_DATA);
2908 USED_REX (REX_MODE64);
2911 if (rex & REX_MODE64)
2916 else if (sizeflag & DFLAG)
2929 if (rex & REX_MODE64)
2931 else if (sizeflag & DFLAG)
2936 if (!(rex & REX_MODE64))
2937 used_prefixes |= (prefixes & PREFIX_DATA);
2942 if (sizeflag & SUFFIX_ALWAYS)
2944 if (rex & REX_MODE64)
2948 if (sizeflag & DFLAG)
2952 used_prefixes |= (prefixes & PREFIX_DATA);
2957 if (prefixes & PREFIX_DATA)
2961 used_prefixes |= (prefixes & PREFIX_DATA);
2966 if (rex & REX_MODE64)
2968 USED_REX (REX_MODE64);
2972 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
2974 /* operand size flag for cwtl, cbtw */
2978 else if (sizeflag & DFLAG)
2989 if (sizeflag & DFLAG)
3000 used_prefixes |= (prefixes & PREFIX_DATA);
3010 oappend (const char *s)
3013 obufp += strlen (s);
3019 if (prefixes & PREFIX_CS)
3021 used_prefixes |= PREFIX_CS;
3022 oappend ("%cs:" + intel_syntax);
3024 if (prefixes & PREFIX_DS)
3026 used_prefixes |= PREFIX_DS;
3027 oappend ("%ds:" + intel_syntax);
3029 if (prefixes & PREFIX_SS)
3031 used_prefixes |= PREFIX_SS;
3032 oappend ("%ss:" + intel_syntax);
3034 if (prefixes & PREFIX_ES)
3036 used_prefixes |= PREFIX_ES;
3037 oappend ("%es:" + intel_syntax);
3039 if (prefixes & PREFIX_FS)
3041 used_prefixes |= PREFIX_FS;
3042 oappend ("%fs:" + intel_syntax);
3044 if (prefixes & PREFIX_GS)
3046 used_prefixes |= PREFIX_GS;
3047 oappend ("%gs:" + intel_syntax);
3052 OP_indirE (int bytemode, int sizeflag)
3056 OP_E (bytemode, sizeflag);
3060 OP_E (int bytemode, int sizeflag)
3065 USED_REX (REX_EXTZ);
3069 /* Skip mod/rm byte. */
3080 oappend (names8rex[rm + add]);
3082 oappend (names8[rm + add]);
3085 oappend (names16[rm + add]);
3088 oappend (names32[rm + add]);
3091 oappend (names64[rm + add]);
3095 oappend (names64[rm + add]);
3097 oappend (names32[rm + add]);
3102 USED_REX (REX_MODE64);
3103 if (rex & REX_MODE64)
3104 oappend (names64[rm + add]);
3105 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3106 oappend (names32[rm + add]);
3108 oappend (names16[rm + add]);
3109 used_prefixes |= (prefixes & PREFIX_DATA);
3114 oappend (INTERNAL_DISASSEMBLER_ERROR);
3123 if ((sizeflag & AFLAG) || mode_64bit) /* 32 bit address mode */
3138 FETCH_DATA (the_info, codep + 1);
3139 index = (*codep >> 3) & 7;
3140 if (mode_64bit || index != 0x4)
3141 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
3142 scale = (*codep >> 6) & 3;
3144 USED_REX (REX_EXTY);
3145 USED_REX (REX_EXTZ);
3156 if ((base & 7) == 5)
3159 if (mode_64bit && !havesib)
3165 FETCH_DATA (the_info, codep + 1);
3167 if ((disp & 0x80) != 0)
3176 if (mod != 0 || (base & 7) == 5)
3178 xlat_print_symbolic_operand (scratchbuf, !riprel, disp);
3179 oappend (scratchbuf);
3187 if (havebase || (havesib && (index != 4 || scale != 0)))
3194 oappend ("BYTE PTR ");
3198 oappend ("WORD PTR ");
3202 USED_REX (REX_MODE64);
3203 if (rex & REX_MODE64)
3204 oappend ("QWORD PTR ");
3205 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
3206 oappend ("DWORD PTR ");
3208 oappend ("WORD PTR ");
3209 used_prefixes |= (prefixes & PREFIX_DATA);
3212 oappend ("DWORD PTR ");
3215 oappend ("QWORD PTR ");
3219 oappend ("QWORD PTR ");
3221 oappend ("DWORD PTR ");
3224 if (sizeflag & DFLAG)
3226 used_prefixes |= (prefixes & PREFIX_DATA);
3227 oappend ("FWORD PTR ");
3230 oappend ("DWORD PTR ");
3233 oappend ("TBYTE PTR ");
3236 oappend ("XMMWORD PTR ");
3242 *obufp++ = open_char;
3243 if (intel_syntax && riprel)
3246 USED_REX (REX_EXTZ);
3247 if (!havesib && (rex & REX_EXTZ))
3250 oappend (mode_64bit && (sizeflag & AFLAG)
3251 ? names64[base] : names32[base]);
3256 if (!intel_syntax || havebase)
3258 *obufp++ = separator_char;
3261 oappend (mode_64bit && (sizeflag & AFLAG)
3262 ? names64[index] : names32[index]);
3264 if (scale != 0 || (!intel_syntax && index != 4))
3266 *obufp++ = scale_char;
3268 sprintf (scratchbuf, "%d", 1 << scale);
3269 oappend (scratchbuf);
3273 if (mod != 0 || (base & 7) == 5)
3275 /* Don't print zero displacements. */
3278 if ((bfd_signed_vma) disp > 0)
3284 xlat_print_symbolic_operand (scratchbuf, 0, disp);
3285 oappend (scratchbuf);
3289 *obufp++ = close_char;
3292 else if (intel_syntax)
3294 if (mod != 0 || (base & 7) == 5)
3296 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3297 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3301 oappend (names_seg[ds_reg - es_reg]);
3304 xlat_print_symbolic_operand (scratchbuf, 1, disp);
3305 oappend (scratchbuf);
3310 { /* 16 bit address mode */
3317 if ((disp & 0x8000) != 0)
3322 FETCH_DATA (the_info, codep + 1);
3324 if ((disp & 0x80) != 0)
3329 if ((disp & 0x8000) != 0)
3335 if (mod != 0 || (rm & 7) == 6)
3337 xlat_print_symbolic_operand (scratchbuf, 0, disp);
3338 oappend (scratchbuf);
3341 if (mod != 0 || (rm & 7) != 6)
3343 *obufp++ = open_char;
3345 oappend (index16[rm + add]);
3346 *obufp++ = close_char;
3353 OP_G (int bytemode, int sizeflag)
3356 USED_REX (REX_EXTX);
3364 oappend (names8rex[reg + add]);
3366 oappend (names8[reg + add]);
3369 oappend (names16[reg + add]);
3372 oappend (names32[reg + add]);
3375 oappend (names64[reg + add]);
3380 USED_REX (REX_MODE64);
3381 if (rex & REX_MODE64)
3382 oappend (names64[reg + add]);
3383 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3384 oappend (names32[reg + add]);
3386 oappend (names16[reg + add]);
3387 used_prefixes |= (prefixes & PREFIX_DATA);
3390 oappend (INTERNAL_DISASSEMBLER_ERROR);
3403 FETCH_DATA (the_info, codep + 8);
3404 a = *codep++ & 0xff;
3405 a |= (*codep++ & 0xff) << 8;
3406 a |= (*codep++ & 0xff) << 16;
3407 a |= (*codep++ & 0xff) << 24;
3408 b = *codep++ & 0xff;
3409 b |= (*codep++ & 0xff) << 8;
3410 b |= (*codep++ & 0xff) << 16;
3411 b |= (*codep++ & 0xff) << 24;
3412 x = a + ((bfd_vma) b << 32);
3420 static bfd_signed_vma
3423 bfd_signed_vma x = 0;
3425 FETCH_DATA (the_info, codep + 4);
3426 x = *codep++ & (bfd_signed_vma) 0xff;
3427 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3428 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3429 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3433 static bfd_signed_vma
3436 bfd_signed_vma x = 0;
3438 FETCH_DATA (the_info, codep + 4);
3439 x = *codep++ & (bfd_signed_vma) 0xff;
3440 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3441 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3442 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3444 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
3454 FETCH_DATA (the_info, codep + 2);
3455 x = *codep++ & 0xff;
3456 x |= (*codep++ & 0xff) << 8;
3461 set_op (bfd_vma op, int riprel)
3463 op_index[op_ad] = op_ad;
3466 op_address[op_ad] = op;
3467 op_riprel[op_ad] = riprel;
3471 /* Mask to get a 32-bit address. */
3472 op_address[op_ad] = op & 0xffffffff;
3473 op_riprel[op_ad] = riprel & 0xffffffff;
3478 OP_REG (int code, int sizeflag)
3482 USED_REX (REX_EXTZ);
3494 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3495 case sp_reg: case bp_reg: case si_reg: case di_reg:
3496 s = names16[code - ax_reg + add];
3498 case es_reg: case ss_reg: case cs_reg:
3499 case ds_reg: case fs_reg: case gs_reg:
3500 s = names_seg[code - es_reg + add];
3502 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3503 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3506 s = names8rex[code - al_reg + add];
3508 s = names8[code - al_reg];
3510 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
3511 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
3514 s = names64[code - rAX_reg + add];
3517 code += eAX_reg - rAX_reg;
3519 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3520 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3521 USED_REX (REX_MODE64);
3522 if (rex & REX_MODE64)
3523 s = names64[code - eAX_reg + add];
3524 else if (sizeflag & DFLAG)
3525 s = names32[code - eAX_reg + add];
3527 s = names16[code - eAX_reg + add];
3528 used_prefixes |= (prefixes & PREFIX_DATA);
3531 s = INTERNAL_DISASSEMBLER_ERROR;
3538 OP_IMREG (int code, int sizeflag)
3550 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3551 case sp_reg: case bp_reg: case si_reg: case di_reg:
3552 s = names16[code - ax_reg];
3554 case es_reg: case ss_reg: case cs_reg:
3555 case ds_reg: case fs_reg: case gs_reg:
3556 s = names_seg[code - es_reg];
3558 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3559 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3562 s = names8rex[code - al_reg];
3564 s = names8[code - al_reg];
3566 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3567 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3568 USED_REX (REX_MODE64);
3569 if (rex & REX_MODE64)
3570 s = names64[code - eAX_reg];
3571 else if (sizeflag & DFLAG)
3572 s = names32[code - eAX_reg];
3574 s = names16[code - eAX_reg];
3575 used_prefixes |= (prefixes & PREFIX_DATA);
3578 s = INTERNAL_DISASSEMBLER_ERROR;
3585 OP_I (int bytemode, int sizeflag)
3588 bfd_signed_vma mask = -1;
3593 FETCH_DATA (the_info, codep + 1);
3605 USED_REX (REX_MODE64);
3606 if (rex & REX_MODE64)
3608 else if (sizeflag & DFLAG)
3618 used_prefixes |= (prefixes & PREFIX_DATA);
3629 oappend (INTERNAL_DISASSEMBLER_ERROR);
3634 scratchbuf[0] = '$';
3635 xlat_print_symbolic_operand (scratchbuf + 1, 1, op);
3636 oappend (scratchbuf + intel_syntax);
3637 scratchbuf[0] = '\0';
3641 OP_I64 (int bytemode, int sizeflag)
3644 bfd_signed_vma mask = -1;
3648 OP_I (bytemode, sizeflag);
3655 FETCH_DATA (the_info, codep + 1);
3660 USED_REX (REX_MODE64);
3661 if (rex & REX_MODE64)
3663 else if (sizeflag & DFLAG)
3673 used_prefixes |= (prefixes & PREFIX_DATA);
3680 oappend (INTERNAL_DISASSEMBLER_ERROR);
3685 scratchbuf[0] = '$';
3686 xlat_print_symbolic_operand (scratchbuf + 1, 1, op);
3687 oappend (scratchbuf + intel_syntax);
3688 scratchbuf[0] = '\0';
3692 OP_sI (int bytemode, int sizeflag)
3695 bfd_signed_vma mask = -1;
3700 FETCH_DATA (the_info, codep + 1);
3702 if ((op & 0x80) != 0)
3707 USED_REX (REX_MODE64);
3708 if (rex & REX_MODE64)
3710 else if (sizeflag & DFLAG)
3719 if ((op & 0x8000) != 0)
3722 used_prefixes |= (prefixes & PREFIX_DATA);
3727 if ((op & 0x8000) != 0)
3731 oappend (INTERNAL_DISASSEMBLER_ERROR);
3735 scratchbuf[0] = '$';
3736 xlat_print_symbolic_operand (scratchbuf + 1, 1, op);
3737 oappend (scratchbuf + intel_syntax);
3741 OP_J (int bytemode, int sizeflag)
3749 FETCH_DATA (the_info, codep + 1);
3751 if ((disp & 0x80) != 0)
3755 if (sizeflag & DFLAG)
3760 /* For some reason, a data16 prefix on a jump instruction
3761 means that the pc is masked to 16 bits after the
3762 displacement is added! */
3767 oappend (INTERNAL_DISASSEMBLER_ERROR);
3770 disp = (start_pc + codep - start_codep + disp) & mask;
3772 xlat_print_symbolic_operand (scratchbuf, 1, disp);
3773 oappend (scratchbuf);
3777 OP_SEG (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3779 oappend (names_seg[reg]);
3783 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
3787 if (sizeflag & DFLAG)
3797 used_prefixes |= (prefixes & PREFIX_DATA);
3799 sprintf (scratchbuf, "0x%x,0x%x", seg, offset);
3801 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
3802 oappend (scratchbuf);
3806 OP_OFF (int bytemode ATTRIBUTE_UNUSED, int sizeflag)
3812 if ((sizeflag & AFLAG) || mode_64bit)
3819 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3820 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3822 oappend (names_seg[ds_reg - es_reg]);
3826 xlat_print_symbolic_operand (scratchbuf, 1, off);
3827 oappend (scratchbuf);
3831 OP_OFF64 (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3837 OP_OFF (bytemode, sizeflag);
3847 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3848 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3850 oappend (names_seg[ds_reg - es_reg]);
3854 xlat_print_symbolic_operand (scratchbuf, 1, off);
3855 oappend (scratchbuf);
3859 ptr_reg (int code, int sizeflag)
3863 *obufp++ = open_char;
3864 used_prefixes |= (prefixes & PREFIX_ADDR);
3867 if (!(sizeflag & AFLAG))
3868 s = names32[code - eAX_reg];
3870 s = names64[code - eAX_reg];
3872 else if (sizeflag & AFLAG)
3873 s = names32[code - eAX_reg];
3875 s = names16[code - eAX_reg];
3877 *obufp++ = close_char;
3882 OP_ESreg (int code, int sizeflag)
3888 USED_REX (REX_MODE64);
3889 used_prefixes |= (prefixes & PREFIX_DATA);
3890 if (rex & REX_MODE64)
3891 oappend ("QWORD PTR ");
3892 else if ((sizeflag & DFLAG))
3893 oappend ("DWORD PTR ");
3895 oappend ("WORD PTR ");
3898 oappend ("BYTE PTR ");
3901 oappend ("%es:" + intel_syntax);
3902 ptr_reg (code, sizeflag);
3906 OP_DSreg (int code, int sizeflag)
3910 if (codep[-1] != 0xd7 && (codep[-1] & 1))
3912 USED_REX (REX_MODE64);
3913 used_prefixes |= (prefixes & PREFIX_DATA);
3914 if (rex & REX_MODE64)
3915 oappend ("QWORD PTR ");
3916 else if ((sizeflag & DFLAG))
3917 oappend ("DWORD PTR ");
3919 oappend ("WORD PTR ");
3922 oappend ("BYTE PTR ");
3932 prefixes |= PREFIX_DS;
3934 ptr_reg (code, sizeflag);
3938 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3943 USED_REX (REX_EXTX);
3946 else if (!mode_64bit && (prefixes & PREFIX_LOCK))
3948 used_prefixes |= PREFIX_LOCK;
3951 sprintf (scratchbuf, "%%cr%d", reg + add);
3952 oappend (scratchbuf + intel_syntax);
3956 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3959 USED_REX (REX_EXTX);
3963 sprintf (scratchbuf, "db%d", reg + add);
3965 sprintf (scratchbuf, "%%db%d", reg + add);
3966 oappend (scratchbuf);
3970 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3972 sprintf (scratchbuf, "%%tr%d", reg);
3973 oappend (scratchbuf + intel_syntax);
3977 OP_Rd (int bytemode, int sizeflag)
3980 OP_E (bytemode, sizeflag);
3986 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3988 used_prefixes |= (prefixes & PREFIX_DATA);
3989 if (prefixes & PREFIX_DATA)
3992 USED_REX (REX_EXTX);
3995 sprintf (scratchbuf, "%%xmm%d", reg + add);
3998 sprintf (scratchbuf, "%%mm%d", reg);
3999 oappend (scratchbuf + intel_syntax);
4003 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4006 USED_REX (REX_EXTX);
4009 sprintf (scratchbuf, "%%xmm%d", reg + add);
4010 oappend (scratchbuf + intel_syntax);
4014 OP_EM (int bytemode, int sizeflag)
4018 if (intel_syntax && bytemode == v_mode)
4020 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
4021 used_prefixes |= (prefixes & PREFIX_DATA);
4023 OP_E (bytemode, sizeflag);
4027 /* Skip mod/rm byte. */
4030 used_prefixes |= (prefixes & PREFIX_DATA);
4031 if (prefixes & PREFIX_DATA)
4035 USED_REX (REX_EXTZ);
4038 sprintf (scratchbuf, "%%xmm%d", rm + add);
4041 sprintf (scratchbuf, "%%mm%d", rm);
4042 oappend (scratchbuf + intel_syntax);
4046 OP_EX (int bytemode, int sizeflag)
4051 if (intel_syntax && bytemode == v_mode)
4053 switch (prefixes & (PREFIX_DATA|PREFIX_REPZ|PREFIX_REPNZ))
4055 case 0: bytemode = x_mode; break;
4056 case PREFIX_REPZ: bytemode = d_mode; used_prefixes |= PREFIX_REPZ; break;
4057 case PREFIX_DATA: bytemode = x_mode; used_prefixes |= PREFIX_DATA; break;
4058 case PREFIX_REPNZ: bytemode = q_mode; used_prefixes |= PREFIX_REPNZ; break;
4059 default: bytemode = 0; break;
4062 OP_E (bytemode, sizeflag);
4065 USED_REX (REX_EXTZ);
4069 /* Skip mod/rm byte. */
4072 sprintf (scratchbuf, "%%xmm%d", rm + add);
4073 oappend (scratchbuf + intel_syntax);
4077 OP_MS (int bytemode, int sizeflag)
4080 OP_EM (bytemode, sizeflag);
4086 OP_XS (int bytemode, int sizeflag)
4089 OP_EX (bytemode, sizeflag);
4095 OP_M (int bytemode, int sizeflag)
4098 BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */
4100 OP_E (bytemode, sizeflag);
4104 OP_0f07 (int bytemode, int sizeflag)
4106 if (mod != 3 || rm != 0)
4109 OP_E (bytemode, sizeflag);
4113 OP_0fae (int bytemode, int sizeflag)
4118 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
4120 if (reg < 5 || rm != 0)
4122 BadOp (); /* bad sfence, mfence, or lfence */
4128 BadOp (); /* bad clflush */
4132 OP_E (bytemode, sizeflag);
4136 NOP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4138 /* NOP with REPZ prefix is called PAUSE. */
4139 if (prefixes == PREFIX_REPZ)
4140 strcpy (obuf, "pause");
4143 static const char *const Suffix3DNow[] = {
4144 /* 00 */ NULL, NULL, NULL, NULL,
4145 /* 04 */ NULL, NULL, NULL, NULL,
4146 /* 08 */ NULL, NULL, NULL, NULL,
4147 /* 0C */ "pi2fw", "pi2fd", NULL, NULL,
4148 /* 10 */ NULL, NULL, NULL, NULL,
4149 /* 14 */ NULL, NULL, NULL, NULL,
4150 /* 18 */ NULL, NULL, NULL, NULL,
4151 /* 1C */ "pf2iw", "pf2id", NULL, NULL,
4152 /* 20 */ NULL, NULL, NULL, NULL,
4153 /* 24 */ NULL, NULL, NULL, NULL,
4154 /* 28 */ NULL, NULL, NULL, NULL,
4155 /* 2C */ NULL, NULL, NULL, NULL,
4156 /* 30 */ NULL, NULL, NULL, NULL,
4157 /* 34 */ NULL, NULL, NULL, NULL,
4158 /* 38 */ NULL, NULL, NULL, NULL,
4159 /* 3C */ NULL, NULL, NULL, NULL,
4160 /* 40 */ NULL, NULL, NULL, NULL,
4161 /* 44 */ NULL, NULL, NULL, NULL,
4162 /* 48 */ NULL, NULL, NULL, NULL,
4163 /* 4C */ NULL, NULL, NULL, NULL,
4164 /* 50 */ NULL, NULL, NULL, NULL,
4165 /* 54 */ NULL, NULL, NULL, NULL,
4166 /* 58 */ NULL, NULL, NULL, NULL,
4167 /* 5C */ NULL, NULL, NULL, NULL,
4168 /* 60 */ NULL, NULL, NULL, NULL,
4169 /* 64 */ NULL, NULL, NULL, NULL,
4170 /* 68 */ NULL, NULL, NULL, NULL,
4171 /* 6C */ NULL, NULL, NULL, NULL,
4172 /* 70 */ NULL, NULL, NULL, NULL,
4173 /* 74 */ NULL, NULL, NULL, NULL,
4174 /* 78 */ NULL, NULL, NULL, NULL,
4175 /* 7C */ NULL, NULL, NULL, NULL,
4176 /* 80 */ NULL, NULL, NULL, NULL,
4177 /* 84 */ NULL, NULL, NULL, NULL,
4178 /* 88 */ NULL, NULL, "pfnacc", NULL,
4179 /* 8C */ NULL, NULL, "pfpnacc", NULL,
4180 /* 90 */ "pfcmpge", NULL, NULL, NULL,
4181 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
4182 /* 98 */ NULL, NULL, "pfsub", NULL,
4183 /* 9C */ NULL, NULL, "pfadd", NULL,
4184 /* A0 */ "pfcmpgt", NULL, NULL, NULL,
4185 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
4186 /* A8 */ NULL, NULL, "pfsubr", NULL,
4187 /* AC */ NULL, NULL, "pfacc", NULL,
4188 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
4189 /* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
4190 /* B8 */ NULL, NULL, NULL, "pswapd",
4191 /* BC */ NULL, NULL, NULL, "pavgusb",
4192 /* C0 */ NULL, NULL, NULL, NULL,
4193 /* C4 */ NULL, NULL, NULL, NULL,
4194 /* C8 */ NULL, NULL, NULL, NULL,
4195 /* CC */ NULL, NULL, NULL, NULL,
4196 /* D0 */ NULL, NULL, NULL, NULL,
4197 /* D4 */ NULL, NULL, NULL, NULL,
4198 /* D8 */ NULL, NULL, NULL, NULL,
4199 /* DC */ NULL, NULL, NULL, NULL,
4200 /* E0 */ NULL, NULL, NULL, NULL,
4201 /* E4 */ NULL, NULL, NULL, NULL,
4202 /* E8 */ NULL, NULL, NULL, NULL,
4203 /* EC */ NULL, NULL, NULL, NULL,
4204 /* F0 */ NULL, NULL, NULL, NULL,
4205 /* F4 */ NULL, NULL, NULL, NULL,
4206 /* F8 */ NULL, NULL, NULL, NULL,
4207 /* FC */ NULL, NULL, NULL, NULL,
4211 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4213 const char *mnemonic;
4215 FETCH_DATA (the_info, codep + 1);
4216 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4217 place where an 8-bit immediate would normally go. ie. the last
4218 byte of the instruction. */
4219 obufp = obuf + strlen (obuf);
4220 mnemonic = Suffix3DNow[*codep++ & 0xff];
4225 /* Since a variable sized modrm/sib chunk is between the start
4226 of the opcode (0x0f0f) and the opcode suffix, we need to do
4227 all the modrm processing first, and don't know until now that
4228 we have a bad opcode. This necessitates some cleaning up. */
4235 static const char *simd_cmp_op[] = {
4247 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4249 unsigned int cmp_type;
4251 FETCH_DATA (the_info, codep + 1);
4252 obufp = obuf + strlen (obuf);
4253 cmp_type = *codep++ & 0xff;
4256 char suffix1 = 'p', suffix2 = 's';
4257 used_prefixes |= (prefixes & PREFIX_REPZ);
4258 if (prefixes & PREFIX_REPZ)
4262 used_prefixes |= (prefixes & PREFIX_DATA);
4263 if (prefixes & PREFIX_DATA)
4267 used_prefixes |= (prefixes & PREFIX_REPNZ);
4268 if (prefixes & PREFIX_REPNZ)
4269 suffix1 = 's', suffix2 = 'd';
4272 sprintf (scratchbuf, "cmp%s%c%c",
4273 simd_cmp_op[cmp_type], suffix1, suffix2);
4274 used_prefixes |= (prefixes & PREFIX_REPZ);
4275 oappend (scratchbuf);
4279 /* We have a bad extension byte. Clean up. */
4287 SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
4289 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4290 forms of these instructions. */
4293 char *p = obuf + strlen (obuf);
4296 *(p - 1) = *(p - 2);
4297 *(p - 2) = *(p - 3);
4298 *(p - 3) = extrachar;
4303 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
4305 if (mod == 3 && reg == 1 && rm <= 1)
4307 /* Override "sidt". */
4308 char *p = obuf + strlen (obuf) - 4;
4310 /* We might have a suffix. */
4316 /* mwait %eax,%ecx */
4317 strcpy (p, "mwait");
4319 strcpy (op1out, names32[0]);
4323 /* monitor %eax,%ecx,%edx" */
4324 strcpy (p, "monitor");
4328 strcpy (op1out, names32[0]);
4329 else if (!(prefixes & PREFIX_ADDR))
4330 strcpy (op1out, names64[0]);
4333 strcpy (op1out, names32[0]);
4334 used_prefixes |= PREFIX_ADDR;
4336 strcpy (op3out, names32[2]);
4341 strcpy (op2out, names32[1]);
4352 INVLPG_Fixup (int bytemode, int sizeflag)
4365 OP_E (bytemode, sizeflag);
4368 /* Override "invlpg". */
4369 strcpy (obuf + strlen (obuf) - 6, alt);
4376 /* Throw away prefixes and 1st. opcode byte. */
4377 codep = insn_codep + 1;
.