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lxdream.org :: lxdream/src/sh4/x86op.h
lxdream 0.9.1
released Jun 29
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filename src/sh4/x86op.h
changeset 539:75f3e594d4a7
prev527:14c9489f647e
next547:d6e00ffc4adc
author nkeynes
date Wed Nov 21 11:40:15 2007 +0000 (12 years ago)
permissions -rw-r--r--
last change Add support for the darwin ABI
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     1 /**
     2  * $Id: x86op.h,v 1.10 2007-09-19 09:15:18 nkeynes Exp $
     3  * 
     4  * Definitions of x86 opcodes for use by the translator.
     5  *
     6  * Copyright (c) 2007 Nathan Keynes.
     7  *
     8  * This program is free software; you can redistribute it and/or modify
     9  * it under the terms of the GNU General Public License as published by
    10  * the Free Software Foundation; either version 2 of the License, or
    11  * (at your option) any later version.
    12  *
    13  * This program is distributed in the hope that it will be useful,
    14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    16  * GNU General Public License for more details.
    17  */
    19 #ifndef __lxdream_x86op_H
    20 #define __lxdream_x86op_H
    22 #define R_NONE -1
    23 #define R_EAX 0
    24 #define R_ECX 1
    25 #define R_EDX 2
    26 #define R_EBX 3
    27 #define R_ESP 4
    28 #define R_EBP 5
    29 #define R_ESI 6 
    30 #define R_EDI 7 
    32 #define R_AL 0
    33 #define R_CL 1
    34 #define R_DL 2
    35 #define R_BL 3
    36 #define R_AH 4
    37 #define R_CH 5
    38 #define R_DH 6
    39 #define R_BH 7
    41 #ifdef DEBUG_JUMPS
    42 #define MARK_JMP(n,x) uint8_t *_mark_jmp_##x = xlat_output + n
    43 #define JMP_TARGET(x) assert( _mark_jmp_##x == xlat_output )
    44 #else
    45 #define MARK_JMP(n, x)
    46 #define JMP_TARGET(x)
    47 #endif
    53 #define OP(x) *xlat_output++ = (x)
    54 #define OP32(x) *((uint32_t *)xlat_output) = (x); xlat_output+=4
    55 #define OP64(x) *((uint64_t *)xlat_output) = (x); xlat_output+=8
    56 #if SH4_TRANSLATOR == TARGET_X86_64
    57 #define OPPTR(x) OP64((uint64_t)(x))
    58 #define STACK_ALIGN 16
    59 #define POP_r32(r1)           OP(0x58 + r1); sh4_x86.stack_posn -= 8;
    60 #define PUSH_r32(r1)          OP(0x50 + r1); sh4_x86.stack_posn += 8;
    61 #define PUSH_imm32(imm)       OP(0x68); OP32(imm); sh4_x86.stack_posn += 4;
    62 #define PUSH_imm64(imm)       REXW(); OP(0x68); OP64(imm); sh4_x86.stack_posn += 8;
    63 #else
    64 #define OPPTR(x) OP32((uint32_t)(x))
    65 #ifdef APPLE_BUILD
    66 #define STACK_ALIGN 16
    67 #define POP_r32(r1)           OP(0x58 + r1); sh4_x86.stack_posn -= 4;
    68 #define PUSH_r32(r1)          OP(0x50 + r1); sh4_x86.stack_posn += 4;
    69 #define PUSH_imm32(imm)       OP(0x68); OP32(imm); sh4_x86.stack_posn += 4;
    70 #else
    71 #define POP_r32(r1)           OP(0x58 + r1)
    72 #define PUSH_r32(r1)          OP(0x50 + r1)
    73 #define PUSH_imm32(imm)       OP(0x68); OP32(imm)
    74 #endif
    75 #endif
    77 #ifdef STACK_ALIGN
    78 #else
    79 #define POP_r32(r1)           OP(0x58 + r1)
    80 #define PUSH_r32(r1)          OP(0x50 + r1)
    81 #endif
    84 /* Offset of a reg relative to the sh4r structure */
    85 #define REG_OFFSET(reg)  (((char *)&sh4r.reg) - ((char *)&sh4r))
    87 #define R_T   REG_OFFSET(t)
    88 #define R_Q   REG_OFFSET(q)
    89 #define R_S   REG_OFFSET(s)
    90 #define R_M   REG_OFFSET(m)
    91 #define R_SR  REG_OFFSET(sr)
    92 #define R_GBR REG_OFFSET(gbr)
    93 #define R_SSR REG_OFFSET(ssr)
    94 #define R_SPC REG_OFFSET(spc)
    95 #define R_VBR REG_OFFSET(vbr)
    96 #define R_MACH REG_OFFSET(mac)+4
    97 #define R_MACL REG_OFFSET(mac)
    98 #define R_PR REG_OFFSET(pr)
    99 #define R_SGR REG_OFFSET(sgr)
   100 #define R_FPUL REG_OFFSET(fpul)
   101 #define R_FPSCR REG_OFFSET(fpscr)
   102 #define R_DBR REG_OFFSET(dbr)
   104 /**************** Basic X86 operations *********************/
   105 /* Note: operands follow SH4 convention (source, dest) rather than x86 
   106  * conventions (dest, source)
   107  */
   109 /* Two-reg modrm form - first arg is the r32 reg, second arg is the r/m32 reg */
   110 #define MODRM_r32_rm32(r1,r2) OP(0xC0 | (r1<<3) | r2)
   111 #define MODRM_rm32_r32(r1,r2) OP(0xC0 | (r2<<3) | r1)
   113 /* ebp+disp8 modrm form */
   114 #define MODRM_r32_ebp8(r1,disp) OP(0x45 | (r1<<3)); OP(disp)
   116 /* ebp+disp32 modrm form */
   117 #define MODRM_r32_ebp32(r1,disp) OP(0x85 | (r1<<3)); OP32(disp)
   119 #define MODRM_r32_sh4r(r1,disp) if(disp>127){ MODRM_r32_ebp32(r1,disp);}else{ MODRM_r32_ebp8(r1,(unsigned char)disp); }
   121 #define REXW() OP(0x48)
   123 /* Major opcodes */
   124 #define ADD_sh4r_r32(disp,r1) OP(0x03); MODRM_r32_sh4r(r1,disp)
   125 #define ADD_r32_sh4r(r1,disp) OP(0x01); MODRM_r32_sh4r(r1,disp)
   126 #define ADD_r32_r32(r1,r2) OP(0x03); MODRM_rm32_r32(r1,r2)
   127 #define ADD_imm8s_r32(imm,r1) OP(0x83); MODRM_rm32_r32(r1, 0); OP(imm)
   128 #define ADD_imm8s_sh4r(imm,disp) OP(0x83); MODRM_r32_sh4r(0,disp); OP(imm)
   129 #define ADD_imm32_r32(imm32,r1) OP(0x81); MODRM_rm32_r32(r1,0); OP32(imm32)
   130 #define ADC_r32_r32(r1,r2)    OP(0x13); MODRM_rm32_r32(r1,r2)
   131 #define ADC_sh4r_r32(disp,r1) OP(0x13); MODRM_r32_sh4r(r1,disp)
   132 #define ADC_r32_sh4r(r1,disp) OP(0x11); MODRM_r32_sh4r(r1,disp)
   133 #define AND_r32_r32(r1,r2)    OP(0x23); MODRM_rm32_r32(r1,r2)
   134 #define AND_imm8_r8(imm8, r1) OP(0x80); MODRM_rm32_r32(r1,4); OP(imm8)
   135 #define AND_imm8s_r32(imm8,r1) OP(0x83); MODRM_rm32_r32(r1,4); OP(imm8)
   136 #define AND_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,4); OP32(imm)
   137 #define CALL_r32(r1)          OP(0xFF); MODRM_rm32_r32(r1,2)
   138 #define CLC()                 OP(0xF8)
   139 #define CMC()                 OP(0xF5)
   140 #define CMP_sh4r_r32(disp,r1)  OP(0x3B); MODRM_r32_sh4r(r1,disp)
   141 #define CMP_r32_r32(r1,r2)    OP(0x3B); MODRM_rm32_r32(r1,r2)
   142 #define CMP_imm32_r32(imm32, r1) OP(0x81); MODRM_rm32_r32(r1,7); OP32(imm32)
   143 #define CMP_imm8s_r32(imm,r1) OP(0x83); MODRM_rm32_r32(r1,7); OP(imm)
   144 #define CMP_imm8s_sh4r(imm,disp) OP(0x83); MODRM_r32_sh4r(7,disp) OP(imm)
   145 #define DEC_r32(r1)           OP(0x48+r1)
   146 #define IMUL_r32(r1)          OP(0xF7); MODRM_rm32_r32(r1,5)
   147 #define INC_r32(r1)           OP(0x40+r1)
   148 #define JMP_rel8(rel, label)  OP(0xEB); OP(rel); MARK_JMP(rel,label)
   149 #define MOV_r32_r32(r1,r2)    OP(0x89); MODRM_r32_rm32(r1,r2)
   150 #define MOV_r32_sh4r(r1,disp) OP(0x89); MODRM_r32_sh4r(r1,disp)
   151 #define MOV_moff32_EAX(off)   OP(0xA1); OPPTR(off)
   152 #define MOV_sh4r_r32(disp, r1)  OP(0x8B); MODRM_r32_sh4r(r1,disp)
   153 #define MOV_r32ind_r32(r1,r2) OP(0x8B); OP(0 + (r2<<3) + r1 )
   154 #define MOVSX_r8_r32(r1,r2)   OP(0x0F); OP(0xBE); MODRM_rm32_r32(r1,r2)
   155 #define MOVSX_r16_r32(r1,r2)  OP(0x0F); OP(0xBF); MODRM_rm32_r32(r1,r2)
   156 #define MOVZX_r8_r32(r1,r2)   OP(0x0F); OP(0xB6); MODRM_rm32_r32(r1,r2)
   157 #define MOVZX_r16_r32(r1,r2)  OP(0x0F); OP(0xB7); MODRM_rm32_r32(r1,r2)
   158 #define MUL_r32(r1)           OP(0xF7); MODRM_rm32_r32(r1,4)
   159 #define NEG_r32(r1)           OP(0xF7); MODRM_rm32_r32(r1,3)
   160 #define NOT_r32(r1)           OP(0xF7); MODRM_rm32_r32(r1,2)
   161 #define OR_r32_r32(r1,r2)     OP(0x0B); MODRM_rm32_r32(r1,r2)
   162 #define OR_imm8_r8(imm,r1)    OP(0x80); MODRM_rm32_r32(r1,1); OP(imm)
   163 #define OR_imm32_r32(imm,r1)  OP(0x81); MODRM_rm32_r32(r1,1); OP32(imm)
   164 #define OR_sh4r_r32(disp,r1)  OP(0x0B); MODRM_r32_sh4r(r1,disp)
   165 #define RCL1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,2)
   166 #define RCR1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,3)
   167 #define RET()                 OP(0xC3)
   168 #define ROL1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,0)
   169 #define ROR1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,1)
   170 #define SAR1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,7)
   171 #define SAR_imm8_r32(imm,r1)  OP(0xC1); MODRM_rm32_r32(r1,7); OP(imm)
   172 #define SAR_r32_CL(r1)        OP(0xD3); MODRM_rm32_r32(r1,7)
   173 #define SBB_r32_r32(r1,r2)    OP(0x1B); MODRM_rm32_r32(r1,r2)
   174 #define SHL1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,4)
   175 #define SHL_r32_CL(r1)        OP(0xD3); MODRM_rm32_r32(r1,4)
   176 #define SHL_imm8_r32(imm,r1)  OP(0xC1); MODRM_rm32_r32(r1,4); OP(imm)
   177 #define SHR1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,5)
   178 #define SHR_r32_CL(r1)        OP(0xD3); MODRM_rm32_r32(r1,5)
   179 #define SHR_imm8_r32(imm,r1)  OP(0xC1); MODRM_rm32_r32(r1,5); OP(imm)
   180 #define STC()                 OP(0xF9)
   181 #define SUB_r32_r32(r1,r2)    OP(0x2B); MODRM_rm32_r32(r1,r2)
   182 #define SUB_sh4r_r32(disp,r1)  OP(0x2B); MODRM_r32_sh4r(r1, disp)
   183 #define SUB_imm8s_r32(imm,r1) ADD_imm8s_r32(-(imm),r1)
   184 #define TEST_r8_r8(r1,r2)     OP(0x84); MODRM_r32_rm32(r1,r2)
   185 #define TEST_r32_r32(r1,r2)   OP(0x85); MODRM_rm32_r32(r1,r2)
   186 #define TEST_imm8_r8(imm8,r1) OP(0xF6); MODRM_rm32_r32(r1,0); OP(imm8)
   187 #define TEST_imm32_r32(imm,r1) OP(0xF7); MODRM_rm32_r32(r1,0); OP32(imm)
   188 #define XCHG_r8_r8(r1,r2)     OP(0x86); MODRM_rm32_r32(r1,r2)
   189 #define XOR_r8_r8(r1,r2)      OP(0x32); MODRM_rm32_r32(r1,r2)
   190 #define XOR_imm8s_r32(imm,r1)   OP(0x83); MODRM_rm32_r32(r1,6); OP(imm)
   191 #define XOR_r32_r32(r1,r2)    OP(0x33); MODRM_rm32_r32(r1,r2)
   192 #define XOR_sh4r_r32(disp,r1)    OP(0x33); MODRM_r32_sh4r(r1,disp)
   193 #define XOR_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,6); OP32(imm)
   196 /* Floating point ops */
   197 #define FABS_st0() OP(0xD9); OP(0xE1)
   198 #define FADDP_st(st) OP(0xDE); OP(0xC0+st)
   199 #define FCHS_st0() OP(0xD9); OP(0xE0)
   200 #define FCOMIP_st(st) OP(0xDF); OP(0xF0+st)
   201 #define FDIVP_st(st) OP(0xDE); OP(0xF8+st)
   202 #define FILD_sh4r(disp) OP(0xDB); MODRM_r32_sh4r(0, disp)
   203 #define FILD_r32ind(r32) OP(0xDB); OP(0x00+r32)
   204 #define FISTP_sh4r(disp) OP(0xDB); MODRM_r32_sh4r(3, disp)
   205 #define FLD0_st0() OP(0xD9); OP(0xEE);
   206 #define FLD1_st0() OP(0xD9); OP(0xE8);
   207 #define FLDCW_r32ind(r32) OP(0xD9); OP(0x28+r32)
   208 #define FMULP_st(st) OP(0xDE); OP(0xC8+st)
   209 #define FNSTCW_r32ind(r32) OP(0xD9); OP(0x38+r32)
   210 #define FPOP_st()  OP(0xDD); OP(0xC0); OP(0xD9); OP(0xF7)
   211 #define FSUBP_st(st) OP(0xDE); OP(0xE8+st)
   212 #define FSQRT_st0() OP(0xD9); OP(0xFA)
   214 /* Conditional branches */
   215 #define JE_rel8(rel,label)   OP(0x74); OP(rel); MARK_JMP(rel,label)
   216 #define JA_rel8(rel,label)   OP(0x77); OP(rel); MARK_JMP(rel,label)
   217 #define JAE_rel8(rel,label)  OP(0x73); OP(rel); MARK_JMP(rel,label)
   218 #define JG_rel8(rel,label)   OP(0x7F); OP(rel); MARK_JMP(rel,label)
   219 #define JGE_rel8(rel,label)  OP(0x7D); OP(rel); MARK_JMP(rel,label)
   220 #define JC_rel8(rel,label)   OP(0x72); OP(rel); MARK_JMP(rel,label)
   221 #define JO_rel8(rel,label)   OP(0x70); OP(rel); MARK_JMP(rel,label)
   222 #define JNE_rel8(rel,label)  OP(0x75); OP(rel); MARK_JMP(rel,label)
   223 #define JNA_rel8(rel,label)  OP(0x76); OP(rel); MARK_JMP(rel,label)
   224 #define JNAE_rel8(rel,label) OP(0x72); OP(rel); MARK_JMP(rel,label)
   225 #define JNG_rel8(rel,label)  OP(0x7E); OP(rel); MARK_JMP(rel,label)
   226 #define JNGE_rel8(rel,label) OP(0x7C); OP(rel); MARK_JMP(rel,label)
   227 #define JNC_rel8(rel,label)  OP(0x73); OP(rel); MARK_JMP(rel,label)
   228 #define JNO_rel8(rel,label)  OP(0x71); OP(rel); MARK_JMP(rel,label)
   229 #define JNS_rel8(rel,label)  OP(0x79); OP(rel); MARK_JMP(rel,label)
   230 #define JS_rel8(rel,label)   OP(0x78); OP(rel); MARK_JMP(rel,label)
   233 /* 32-bit long forms w/ backpatching to an exit routine */
   234 #define JMP_exit(rel)  OP(0xE9); sh4_x86_add_backpatch(xlat_output); OP32(rel)
   235 #define JE_exit(rel)  OP(0x0F); OP(0x84); sh4_x86_add_backpatch(xlat_output); OP32(rel)
   236 #define JA_exit(rel)  OP(0x0F); OP(0x87); sh4_x86_add_backpatch(xlat_output); OP32(rel)
   237 #define JAE_exit(rel) OP(0x0F); OP(0x83); sh4_x86_add_backpatch(xlat_output); OP32(rel)
   238 #define JG_exit(rel)  OP(0x0F); OP(0x8F); sh4_x86_add_backpatch(xlat_output); OP32(rel)
   239 #define JGE_exit(rel) OP(0x0F); OP(0x8D); sh4_x86_add_backpatch(xlat_output); OP32(rel)
   240 #define JC_exit(rel)  OP(0x0F); OP(0x82); sh4_x86_add_backpatch(xlat_output); OP32(rel)
   241 #define JO_exit(rel)  OP(0x0F); OP(0x80); sh4_x86_add_backpatch(xlat_output); OP32(rel)
   242 #define JNE_exit(rel) OP(0x0F); OP(0x85); sh4_x86_add_backpatch(xlat_output); OP32(rel)
   243 #define JNA_exit(rel) OP(0x0F); OP(0x86); sh4_x86_add_backpatch(xlat_output); OP32(rel)
   244 #define JNAE_exit(rel) OP(0x0F);OP(0x82); sh4_x86_add_backpatch(xlat_output); OP32(rel)
   245 #define JNG_exit(rel) OP(0x0F); OP(0x8E); sh4_x86_add_backpatch(xlat_output); OP32(rel)
   246 #define JNGE_exit(rel) OP(0x0F);OP(0x8C); sh4_x86_add_backpatch(xlat_output); OP32(rel)
   247 #define JNC_exit(rel) OP(0x0F); OP(0x83); sh4_x86_add_backpatch(xlat_output); OP32(rel)
   248 #define JNO_exit(rel) OP(0x0F); OP(0x81); sh4_x86_add_backpatch(xlat_output); OP32(rel)
   251 /* Conditional moves ebp-rel */
   252 #define CMOVE_r32_r32(r1,r2)  OP(0x0F); OP(0x44); MODRM_rm32_r32(r1,r2)
   253 #define CMOVA_r32_r32(r1,r2)  OP(0x0F); OP(0x47); MODRM_rm32_r32(r1,r2)
   254 #define CMOVAE_r32_r32(r1,r2) OP(0x0F); OP(0x43); MODRM_rm32_r32(r1,r2)
   255 #define CMOVG_r32_r32(r1,r2)  OP(0x0F); OP(0x4F); MODRM_rm32_r32(r1,r2)
   256 #define CMOVGE_r32_r32(r1,r2)  OP(0x0F); OP(0x4D); MODRM_rm32_r32(r1,r2)
   257 #define CMOVC_r32_r32(r1,r2)  OP(0x0F); OP(0x42); MODRM_rm32_r32(r1,r2)
   258 #define CMOVO_r32_r32(r1,r2)  OP(0x0F); OP(0x40); MODRM_rm32_r32(r1,r2)
   261 /* Conditional setcc - writeback to sh4r.t */
   262 #define SETE_sh4r(disp)    OP(0x0F); OP(0x94); MODRM_r32_sh4r(0, disp);
   263 #define SETA_sh4r(disp)    OP(0x0F); OP(0x97); MODRM_r32_sh4r(0, disp);
   264 #define SETAE_sh4r(disp)   OP(0x0F); OP(0x93); MODRM_r32_sh4r(0, disp);
   265 #define SETG_sh4r(disp)    OP(0x0F); OP(0x9F); MODRM_r32_sh4r(0, disp);
   266 #define SETGE_sh4r(disp)   OP(0x0F); OP(0x9D); MODRM_r32_sh4r(0, disp);
   267 #define SETC_sh4r(disp)    OP(0x0F); OP(0x92); MODRM_r32_sh4r(0, disp);
   268 #define SETO_sh4r(disp)    OP(0x0F); OP(0x90); MODRM_r32_sh4r(0, disp);
   270 #define SETNE_sh4r(disp)   OP(0x0F); OP(0x95); MODRM_r32_sh4r(0, disp);
   271 #define SETNA_sh4r(disp)   OP(0x0F); OP(0x96); MODRM_r32_sh4r(0, disp);
   272 #define SETNAE_sh4r(disp)  OP(0x0F); OP(0x92); MODRM_r32_sh4r(0, disp);
   273 #define SETNG_sh4r(disp)   OP(0x0F); OP(0x9E); MODRM_r32_sh4r(0, disp);
   274 #define SETNGE_sh4r(disp)  OP(0x0F); OP(0x9C); MODRM_r32_sh4r(0, disp);
   275 #define SETNC_sh4r(disp)   OP(0x0F); OP(0x93); MODRM_r32_sh4r(0, disp);
   276 #define SETNO_sh4r(disp)   OP(0x0F); OP(0x91); MODRM_r32_sh4r(0, disp);
   278 #define SETE_t() SETE_sh4r(R_T)
   279 #define SETA_t() SETA_sh4r(R_T)
   280 #define SETAE_t() SETAE_sh4r(R_T)
   281 #define SETG_t() SETG_sh4r(R_T)
   282 #define SETGE_t() SETGE_sh4r(R_T)
   283 #define SETC_t() SETC_sh4r(R_T)
   284 #define SETO_t() SETO_sh4r(R_T)
   285 #define SETNE_t() SETNE_sh4r(R_T)
   287 #define SETC_r8(r1)      OP(0x0F); OP(0x92); MODRM_rm32_r32(r1, 0)
   289 /* Pseudo-op Load carry from T: CMP [EBP+t], #01 ; CMC */
   290 #define LDC_t()     OP(0x83); MODRM_r32_sh4r(7,R_T); OP(0x01); CMC()
   292 #endif /* !__lxdream_x86op_H */
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