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lxdream.org :: lxdream/src/pvr2/pvr2mem.c
lxdream 0.9.1
released Jun 29
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filename src/pvr2/pvr2mem.c
changeset 1294:52be323fcab4
prev1067:d3c00ffccfcd
author nkeynes
date Fri May 29 18:47:05 2015 +1000 (7 years ago)
permissions -rw-r--r--
last change Fix test case
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     1 /**
     2  * $Id$
     3  *
     4  * PVR2 (Video) VRAM handling routines (mainly for the 64-bit region)
     5  *
     6  * Copyright (c) 2005 Nathan Keynes.
     7  *
     8  * This program is free software; you can redistribute it and/or modify
     9  * it under the terms of the GNU General Public License as published by
    10  * the Free Software Foundation; either version 2 of the License, or
    11  * (at your option) any later version.
    12  *
    13  * This program is distributed in the hope that it will be useful,
    14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    16  * GNU General Public License for more details.
    17  */
    18 #include <string.h>
    19 #include <stdio.h>
    20 #include <errno.h>
    21 #include "sh4/sh4core.h"
    22 #include "pvr2.h"
    23 #include "asic.h"
    24 #include "dream.h"
    26 unsigned char pvr2_main_ram[8 MB];
    28 /************************* VRAM32 address space ***************************/
    30 static int32_t FASTCALL pvr2_vram32_read_long( sh4addr_t addr )
    31 {
    32     pvr2_render_buffer_invalidate(addr, FALSE);
    33     return *((int32_t *)(pvr2_main_ram+(addr&0x007FFFFF)));
    34 }
    35 static int32_t FASTCALL pvr2_vram32_read_word( sh4addr_t addr )
    36 {
    37     pvr2_render_buffer_invalidate(addr, FALSE);
    38     return SIGNEXT16(*((int16_t *)(pvr2_main_ram+(addr&0x007FFFFF))));
    39 }
    40 static int32_t FASTCALL pvr2_vram32_read_byte( sh4addr_t addr )
    41 {
    42     pvr2_render_buffer_invalidate(addr, FALSE);
    43     return SIGNEXT8(*((int8_t *)(pvr2_main_ram+(addr&0x007FFFFF))));
    44 }
    45 static void FASTCALL pvr2_vram32_write_long( sh4addr_t addr, uint32_t val )
    46 {
    47     pvr2_render_buffer_invalidate(addr, TRUE);
    48     *(uint32_t *)(pvr2_main_ram + (addr&0x007FFFFF)) = val;
    49 }
    50 static void FASTCALL pvr2_vram32_write_word( sh4addr_t addr, uint32_t val )
    51 {
    52     pvr2_render_buffer_invalidate(addr, TRUE);
    53     *(uint16_t *)(pvr2_main_ram + (addr&0x007FFFFF)) = (uint16_t)val;
    54 }
    55 static void FASTCALL pvr2_vram32_write_byte( sh4addr_t addr, uint32_t val )
    56 {
    57     pvr2_render_buffer_invalidate(addr, TRUE);
    58     *(uint8_t *)(pvr2_main_ram + (addr&0x007FFFFF)) = (uint8_t)val;
    59 }
    60 static void FASTCALL pvr2_vram32_read_burst( unsigned char *dest, sh4addr_t addr )
    61 {
    62     // Render buffers pretty much have to be (at least) 32-byte aligned
    63     pvr2_render_buffer_invalidate(addr, FALSE);
    64     memcpy( dest, (pvr2_main_ram + (addr&0x007FFFFF)), 32 );
    65 }
    66 static void FASTCALL pvr2_vram32_write_burst( sh4addr_t addr, unsigned char *src )
    67 {
    68     // Render buffers pretty much have to be (at least) 32-byte aligned
    69     pvr2_render_buffer_invalidate(addr, TRUE);
    70     memcpy( (pvr2_main_ram + (addr&0x007FFFFF)), src, 32 );    
    71 }
    73 struct mem_region_fn mem_region_vram32 = { pvr2_vram32_read_long, pvr2_vram32_write_long, 
    74         pvr2_vram32_read_word, pvr2_vram32_write_word, 
    75         pvr2_vram32_read_byte, pvr2_vram32_write_byte, 
    76         pvr2_vram32_read_burst, pvr2_vram32_write_burst }; 
    78 /************************* VRAM64 address space ***************************/
    80 #define TRANSLATE_VIDEO_64BIT_ADDRESS(a)  ( (((a)&0x00FFFFF8)>>1)|(((a)&0x00000004)<<20)|((a)&0x03) )
    82 static int32_t FASTCALL pvr2_vram64_read_long( sh4addr_t addr )
    83 {
    84     addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
    85     pvr2_render_buffer_invalidate(addr, FALSE);
    86     return *((int32_t *)(pvr2_main_ram+(addr&0x007FFFFF)));
    87 }
    88 static int32_t FASTCALL pvr2_vram64_read_word( sh4addr_t addr )
    89 {
    90     addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
    91     pvr2_render_buffer_invalidate(addr, FALSE);
    92     return SIGNEXT16(*((int16_t *)(pvr2_main_ram+(addr&0x007FFFFF))));
    93 }
    94 static int32_t FASTCALL pvr2_vram64_read_byte( sh4addr_t addr )
    95 {
    96     addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
    97     pvr2_render_buffer_invalidate(addr, FALSE);
    98     return SIGNEXT8(*((int8_t *)(pvr2_main_ram+(addr&0x007FFFFF))));
    99 }
   100 static void FASTCALL pvr2_vram64_write_long( sh4addr_t addr, uint32_t val )
   101 {
   102     texcache_invalidate_page(addr& 0x007FFFFF);
   103     addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
   104     pvr2_render_buffer_invalidate(addr, TRUE);
   105     *(uint32_t *)(pvr2_main_ram + (addr&0x007FFFFF)) = val;
   106 }
   107 static void FASTCALL pvr2_vram64_write_word( sh4addr_t addr, uint32_t val )
   108 {
   109     texcache_invalidate_page(addr& 0x007FFFFF);
   110     addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
   111     pvr2_render_buffer_invalidate(addr, TRUE);
   112     *(uint16_t *)(pvr2_main_ram + (addr&0x007FFFFF)) = (uint16_t)val;
   113 }
   114 static void FASTCALL pvr2_vram64_write_byte( sh4addr_t addr, uint32_t val )
   115 {
   116     texcache_invalidate_page(addr& 0x007FFFFF);
   117     addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
   118     pvr2_render_buffer_invalidate(addr, TRUE);
   119     *(uint8_t *)(pvr2_main_ram + (addr&0x007FFFFF)) = (uint8_t)val;
   120 }
   121 static void FASTCALL pvr2_vram64_read_burst( unsigned char *dest, sh4addr_t addr )
   122 {
   123     pvr2_vram64_read( dest, addr, 32 );
   124 }
   125 static void FASTCALL pvr2_vram64_write_burst( sh4addr_t addr, unsigned char *src )
   126 {
   127     pvr2_vram64_write( addr, src, 32 );
   128 }
   130 struct mem_region_fn mem_region_vram64 = { pvr2_vram64_read_long, pvr2_vram64_write_long, 
   131         pvr2_vram64_read_word, pvr2_vram64_write_word, 
   132         pvr2_vram64_read_byte, pvr2_vram64_write_byte, 
   133         pvr2_vram64_read_burst, pvr2_vram64_write_burst }; 
   135 /******************************* Burst areas ******************************/
   137 static void FASTCALL pvr2_vramdma1_write_burst( sh4addr_t destaddr, unsigned char *src )
   138 {
   139     int region = MMIO_READ( ASIC, PVRDMARGN1 );
   140     if( region == 0 ) {
   141         pvr2_vram64_write( destaddr, src, 32 );
   142     } else {
   143         pvr2_vram32_write( destaddr, src, 32 );
   144     }   
   145 }
   147 static void FASTCALL pvr2_vramdma2_write_burst( sh4addr_t destaddr, unsigned char *src )
   148 {
   149     int region = MMIO_READ( ASIC, PVRDMARGN2 );
   150     if( region == 0 ) {
   151         pvr2_vram64_write( destaddr, src, 32 );
   152     } else {
   153         pvr2_vram32_write( destaddr, src, 32 );
   154     }
   155 }
   157 static void FASTCALL pvr2_yuv_write_burst( sh4addr_t destaddr, unsigned char *src )
   158 {
   159     pvr2_yuv_write( src, 32 );
   160 }
   162 struct mem_region_fn mem_region_pvr2ta = {
   163         unmapped_read_long, unmapped_write_long,
   164         unmapped_read_long, unmapped_write_long,
   165         unmapped_read_long, unmapped_write_long,
   166         unmapped_read_burst, pvr2_ta_write_burst };
   168 struct mem_region_fn mem_region_pvr2yuv = {
   169         unmapped_read_long, unmapped_write_long,
   170         unmapped_read_long, unmapped_write_long,
   171         unmapped_read_long, unmapped_write_long,
   172         unmapped_read_burst, pvr2_yuv_write_burst };
   174 struct mem_region_fn mem_region_pvr2vdma1 = {
   175         unmapped_read_long, unmapped_write_long,
   176         unmapped_read_long, unmapped_write_long,
   177         unmapped_read_long, unmapped_write_long,
   178         unmapped_read_burst, pvr2_vramdma1_write_burst };
   180 struct mem_region_fn mem_region_pvr2vdma2 = {
   181         unmapped_read_long, unmapped_write_long,
   182         unmapped_read_long, unmapped_write_long,
   183         unmapped_read_long, unmapped_write_long,
   184         unmapped_read_burst, pvr2_vramdma2_write_burst };
   187 void pvr2_dma_write( sh4addr_t destaddr, unsigned char *src, uint32_t count )
   188 {
   189     int region;
   191     switch( destaddr & 0x13800000 ) {
   192     case 0x10000000:
   193     case 0x12000000:
   194         pvr2_ta_write( src, count );
   195         break;
   196     case 0x11000000:
   197     case 0x11800000:
   198         region = MMIO_READ( ASIC, PVRDMARGN1 );
   199         if( region == 0 ) {
   200             pvr2_vram64_write( destaddr, src, count );
   201         } else {
   202             pvr2_vram32_write( destaddr, src, count );
   203         }
   204         break;
   205     case 0x10800000:
   206     case 0x12800000:
   207         pvr2_yuv_write( src, count );
   208         break;
   209     case 0x13000000:
   210     case 0x13800000:
   211         region = MMIO_READ( ASIC, PVRDMARGN2 );
   212         if( region == 0 ) {
   213             pvr2_vram64_write( destaddr, src, count );
   214         } else {
   215             pvr2_vram32_write( destaddr, src, count );
   216         }
   217     }
   218 }
   220 void pvr2_vram32_write( sh4addr_t destaddr, unsigned char *src, uint32_t length )
   221 {
   222     destaddr &= PVR2_RAM_MASK;
   223     pvr2_render_buffer_invalidate( PVR2_RAM_BASE + destaddr, TRUE );
   224     unsigned char *dest = pvr2_main_ram + destaddr;
   225     if( PVR2_RAM_SIZE - destaddr < length ) {
   226         length = PVR2_RAM_SIZE - destaddr;
   227     }
   228     memcpy( dest, src, length );
   229 }
   231 void pvr2_vram64_write( sh4addr_t destaddr, unsigned char *src, uint32_t length )
   232 {
   233     int bank_flag = (destaddr & 0x04) >> 2;
   234     uint32_t *banks[2];
   235     uint32_t *dwsrc;
   236     int i;
   238     destaddr = destaddr & 0x7FFFFF;
   239     if( destaddr + length > 0x800000 ) {
   240         length = 0x800000 - destaddr;
   241     }
   243     for( i=destaddr & 0xFFFFF000; i < destaddr + length; i+= LXDREAM_PAGE_SIZE ) {
   244         texcache_invalidate_page( i );
   245     }
   247     banks[0] = ((uint32_t *)(pvr2_main_ram + ((destaddr & 0x007FFFF8) >>1)));
   248     banks[1] = banks[0] + 0x100000;
   249     if( bank_flag )
   250         banks[0]++;
   252     /* Handle non-aligned start of source */
   253     if( destaddr & 0x03 ) {
   254         unsigned char *dest = ((unsigned char *)banks[bank_flag]) + (destaddr & 0x03);
   255         for( i= destaddr & 0x03; i < 4 && length > 0; i++, length-- ) {
   256             *dest++ = *src++;
   257         }
   258         bank_flag = !bank_flag;
   259     }
   261     dwsrc = (uint32_t *)src;
   262     while( length >= 4 ) {
   263         *banks[bank_flag]++ = *dwsrc++;
   264         bank_flag = !bank_flag;
   265         length -= 4;
   266     }
   268     /* Handle non-aligned end of source */
   269     if( length ) {
   270         src = (unsigned char *)dwsrc;
   271         unsigned char *dest = (unsigned char *)banks[bank_flag];
   272         while( length-- > 0 ) {
   273             *dest++ = *src++;
   274         }
   275     }
   276 }
   278 /**
   279  * Write an image to 64-bit vram, with a line-stride different from the line-size.
   280  * The destaddr must be 64-bit aligned, and both line_bytes and line_stride_bytes
   281  * must be multiples of 8.
   282  */
   283 void pvr2_vram64_write_stride( sh4addr_t destaddr, unsigned char *src, uint32_t line_bytes,
   284                                uint32_t line_stride_bytes, uint32_t line_count )
   285 {
   286     int i,j;
   287     uint32_t *banks[2];
   288     uint32_t *dwsrc = (uint32_t *)src;
   289     uint32_t line_gap = (line_stride_bytes - line_bytes) >> 3;
   291     destaddr = destaddr & 0x7FFFF8;
   292     line_bytes >>= 3;
   294     for( i=destaddr; i < destaddr + line_stride_bytes*line_count; i+= LXDREAM_PAGE_SIZE ) {
   295         texcache_invalidate_page( i );
   296     }
   298     banks[0] = (uint32_t *)(pvr2_main_ram + (destaddr >>1));
   299     banks[1] = banks[0] + 0x100000;
   301     for( i=0; i<line_count; i++ ) {
   302         for( j=0; j<line_bytes; j++ ) {
   303             *banks[0]++ = *dwsrc++;
   304             *banks[1]++ = *dwsrc++;
   305         }
   306         banks[0] += line_gap;
   307         banks[1] += line_gap;
   308     }
   309 }
   311 /**
   312  * Read an image from 64-bit vram, with a destination line-stride different from the line-size.
   313  * The srcaddr must be 32-bit aligned, and both line_bytes and line_stride_bytes
   314  * must be multiples of 4. line_stride_bytes must be >= line_bytes.
   315  * This method is used to extract a "stride" texture from vram.
   316  */
   317 void pvr2_vram64_read_stride( unsigned char *dest, uint32_t dest_line_bytes, sh4addr_t srcaddr,
   318                               uint32_t src_line_bytes, uint32_t line_count )
   319 {
   320     int bank_flag = (srcaddr & 0x04) >> 2;
   321     uint32_t *banks[2];
   322     uint32_t *dwdest;
   323     uint32_t dest_line_gap = 0;
   324     uint32_t src_line_gap = 0;
   325     uint32_t line_bytes;
   326     int src_line_gap_flag;
   327     int i,j;
   329     srcaddr = srcaddr & 0x7FFFF8;
   330     if( src_line_bytes <= dest_line_bytes ) {
   331         dest_line_gap = (dest_line_bytes - src_line_bytes) >> 2;
   332         src_line_gap = 0;
   333         src_line_gap_flag = 0;
   334         line_bytes = src_line_bytes >> 2;
   335     } else {
   336         i = (src_line_bytes - dest_line_bytes);
   337         src_line_gap_flag = i & 0x04;
   338         src_line_gap = i >> 3;
   339         line_bytes = dest_line_bytes >> 2;
   340     }
   342     banks[0] = (uint32_t *)(pvr2_main_ram + (srcaddr>>1));
   343     banks[1] = banks[0] + 0x100000;
   344     if( bank_flag )
   345         banks[0]++;
   347     dwdest = (uint32_t *)dest;
   348     for( i=0; i<line_count; i++ ) {
   349         for( j=0; j<line_bytes; j++ ) {
   350             *dwdest++ = *banks[bank_flag]++;
   351             bank_flag = !bank_flag;
   352         }
   353         dwdest += dest_line_gap;
   354         banks[0] += src_line_gap;
   355         banks[1] += src_line_gap;
   356         if( src_line_gap_flag ) {
   357             banks[bank_flag]++;
   358             bank_flag = !bank_flag;
   359         }
   360     }
   361 }
   364 /**
   365  * @param dest Destination image buffer
   366  * @param banks Source data expressed as two bank pointers
   367  * @param offset Offset into banks[0] specifying where the next byte
   368  *  to read is (0..3)
   369  * @param x1,y1 Destination coordinates
   370  * @param width Width of current destination block
   371  * @param stride Total width of image (ie stride) in bytes
   372  */
   374 static void pvr2_vram64_detwiddle_4( uint8_t *dest, uint8_t *banks[2], int offset,
   375                                      int x1, int y1, int width, int stride )
   376 {
   377     if( width == 2 ) {
   378         x1 = x1 >> 1;
   379         uint8_t t1 = *banks[offset<4?0:1]++;
   380         uint8_t t2 = *banks[offset<3?0:1]++;
   381         dest[y1*stride + x1] = (t1 & 0x0F) | (t2<<4);
   382         dest[(y1+1)*stride + x1] = (t1>>4) | (t2&0xF0);
   383     } else if( width == 4 ) {
   384         pvr2_vram64_detwiddle_4( dest, banks, offset, x1, y1, 2, stride );
   385         pvr2_vram64_detwiddle_4( dest, banks, offset+2, x1, y1+2, 2, stride );
   386         pvr2_vram64_detwiddle_4( dest, banks, offset+4, x1+2, y1, 2, stride );
   387         pvr2_vram64_detwiddle_4( dest, banks, offset+6, x1+2, y1+2, 2, stride );
   389     } else {
   390         int subdivide = width >> 1;
   391         pvr2_vram64_detwiddle_4( dest, banks, offset, x1, y1, subdivide, stride );
   392         pvr2_vram64_detwiddle_4( dest, banks, offset, x1, y1+subdivide, subdivide, stride );
   393         pvr2_vram64_detwiddle_4( dest, banks, offset, x1+subdivide, y1, subdivide, stride );
   394         pvr2_vram64_detwiddle_4( dest, banks, offset, x1+subdivide, y1+subdivide, subdivide, stride );
   395     }
   396 }
   398 /**
   399  * @param dest Destination image buffer
   400  * @param banks Source data expressed as two bank pointers
   401  * @param offset Offset into banks[0] specifying where the next byte
   402  *  to read is (0..3)
   403  * @param x1,y1 Destination coordinates
   404  * @param width Width of current destination block
   405  * @param stride Total width of image (ie stride)
   406  */
   408 static void pvr2_vram64_detwiddle_8( uint8_t *dest, uint8_t *banks[2], int offset,
   409                                      int x1, int y1, int width, int stride )
   410 {
   411     if( width == 2 ) {
   412         dest[y1*stride + x1] = *banks[0]++;
   413         dest[(y1+1)*stride + x1] = *banks[offset<3?0:1]++;
   414         dest[y1*stride + x1 + 1] = *banks[offset<2?0:1]++;
   415         dest[(y1+1)*stride + x1 + 1] = *banks[offset==0?0:1]++;
   416         uint8_t *tmp = banks[0]; /* swap banks */
   417         banks[0] = banks[1];
   418         banks[1] = tmp;
   419     } else {
   420         int subdivide = width >> 1;
   421         pvr2_vram64_detwiddle_8( dest, banks, offset, x1, y1, subdivide, stride );
   422         pvr2_vram64_detwiddle_8( dest, banks, offset, x1, y1+subdivide, subdivide, stride );
   423         pvr2_vram64_detwiddle_8( dest, banks, offset, x1+subdivide, y1, subdivide, stride );
   424         pvr2_vram64_detwiddle_8( dest, banks, offset, x1+subdivide, y1+subdivide, subdivide, stride );
   425     }
   426 }
   428 /**
   429  * @param dest Destination image buffer
   430  * @param banks Source data expressed as two bank pointers
   431  * @param offset Offset into banks[0] specifying where the next word
   432  *  to read is (0 or 1)
   433  * @param x1,y1 Destination coordinates
   434  * @param width Width of current destination block
   435  * @param stride Total width of image (ie stride)
   436  */
   438 static void pvr2_vram64_detwiddle_16( uint16_t *dest, uint16_t *banks[2], int offset,
   439                                       int x1, int y1, int width, int stride )
   440 {
   441     if( width == 2 ) {
   442         dest[y1*stride + x1] = *banks[0]++;
   443         dest[(y1+1)*stride + x1] = *banks[offset]++;
   444         dest[y1*stride + x1 + 1] = *banks[1]++;
   445         dest[(y1+1)*stride + x1 + 1] = *banks[offset^1]++;
   446     } else {
   447         int subdivide = width >> 1;
   448         pvr2_vram64_detwiddle_16( dest, banks, offset, x1, y1, subdivide, stride );
   449         pvr2_vram64_detwiddle_16( dest, banks, offset, x1, y1+subdivide, subdivide, stride );
   450         pvr2_vram64_detwiddle_16( dest, banks, offset, x1+subdivide, y1, subdivide, stride );
   451         pvr2_vram64_detwiddle_16( dest, banks, offset, x1+subdivide, y1+subdivide, subdivide, stride );
   452     }
   453 }
   455 /**
   456  * Read an image from 64-bit vram stored as twiddled 4-bit pixels. The
   457  * image is written out to the destination in detwiddled form.
   458  * @param dest destination buffer, which must be at least width*height/2 in length
   459  * @param srcaddr source address in vram
   460  * @param width image width (must be a power of 2)
   461  * @param height image height (must be a power of 2)
   462  */
   463 void pvr2_vram64_read_twiddled_4( unsigned char *dest, sh4addr_t srcaddr, uint32_t width, uint32_t height )
   464 {
   465     int offset_flag = (srcaddr & 0x07);
   466     uint8_t *banks[2];
   467     uint8_t *wdest = (uint8_t*)dest;
   468     uint32_t stride = width >> 1;
   469     int i;
   471     srcaddr = srcaddr & 0x7FFFF8;
   473     banks[0] = (uint8_t *)(pvr2_main_ram + (srcaddr>>1));
   474     banks[1] = banks[0] + 0x400000;
   475     if( offset_flag & 0x04 ) { // If source is not 64-bit aligned, swap the banks
   476         uint8_t *tmp = banks[0];
   477         banks[0] = banks[1];
   478         banks[1] = tmp + 4;
   479         offset_flag &= 0x03;
   480     }
   481     banks[0] += offset_flag;
   483     if( width > height ) {
   484         for( i=0; i<width; i+=height ) {
   485             pvr2_vram64_detwiddle_4( wdest, banks, offset_flag, i, 0, height, stride );
   486         }
   487     } else if( height > width ) {
   488         for( i=0; i<height; i+=width ) {
   489             pvr2_vram64_detwiddle_4( wdest, banks, offset_flag, 0, i, width, stride );
   490         }
   491     } else if( width == 1 ) {
   492         *wdest = *banks[0];
   493     } else {
   494         pvr2_vram64_detwiddle_4( wdest, banks, offset_flag, 0, 0, width, stride );
   495     }
   496 }
   498 /**
   499  * Read an image from 64-bit vram stored as twiddled 8-bit pixels. The
   500  * image is written out to the destination in detwiddled form.
   501  * @param dest destination buffer, which must be at least width*height in length
   502  * @param srcaddr source address in vram
   503  * @param width image width (must be a power of 2)
   504  * @param height image height (must be a power of 2)
   505  */
   506 void pvr2_vram64_read_twiddled_8( unsigned char *dest, sh4addr_t srcaddr, uint32_t width, uint32_t height )
   507 {
   508     int offset_flag = (srcaddr & 0x07);
   509     uint8_t *banks[2];
   510     uint8_t *wdest = (uint8_t*)dest;
   511     int i;
   513     srcaddr = srcaddr & 0x7FFFF8;
   515     banks[0] = (uint8_t *)(pvr2_main_ram + (srcaddr>>1));
   516     banks[1] = banks[0] + 0x400000;
   517     if( offset_flag & 0x04 ) { // If source is not 64-bit aligned, swap the banks
   518         uint8_t *tmp = banks[0];
   519         banks[0] = banks[1];
   520         banks[1] = tmp + 4;
   521         offset_flag &= 0x03;
   522     }
   523     banks[0] += offset_flag;
   525     if( width > height ) {
   526         for( i=0; i<width; i+=height ) {
   527             pvr2_vram64_detwiddle_8( wdest, banks, offset_flag, i, 0, height, width );
   528         }
   529     } else if( height > width ) {
   530         for( i=0; i<height; i+=width ) {
   531             pvr2_vram64_detwiddle_8( wdest, banks, offset_flag, 0, i, width, width );
   532         }
   533     } else if( width == 1 ) {
   534         *wdest = *banks[0];
   535     } else {
   536         pvr2_vram64_detwiddle_8( wdest, banks, offset_flag, 0, 0, width, width );
   537     }
   538 }
   540 /**
   541  * Read an image from 64-bit vram stored as twiddled 16-bit pixels. The
   542  * image is written out to the destination in detwiddled form.
   543  * @param dest destination buffer, which must be at least width*height*2 in length
   544  * @param srcaddr source address in vram (must be 16-bit aligned)
   545  * @param width image width (must be a power of 2)
   546  * @param height image height (must be a power of 2)
   547  */
   548 void pvr2_vram64_read_twiddled_16( unsigned char *dest, sh4addr_t srcaddr, uint32_t width, uint32_t height ) {
   549     int offset_flag = (srcaddr & 0x06) >> 1;
   550     uint16_t *banks[2];
   551     uint16_t *wdest = (uint16_t*)dest;
   552     int i;
   554     srcaddr = srcaddr & 0x7FFFF8;
   556     banks[0] = (uint16_t *)(pvr2_main_ram + (srcaddr>>1));
   557     banks[1] = banks[0] + 0x200000;
   558     if( offset_flag & 0x02 ) { // If source is not 64-bit aligned, swap the banks
   559         uint16_t *tmp = banks[0];
   560         banks[0] = banks[1];
   561         banks[1] = tmp + 2;
   562         offset_flag &= 0x01;
   563     }
   564     banks[0] += offset_flag;
   567     if( width > height ) {
   568         for( i=0; i<width; i+=height ) {
   569             pvr2_vram64_detwiddle_16( wdest, banks, offset_flag, i, 0, height, width );
   570         }
   571     } else if( height > width ) {
   572         for( i=0; i<height; i+=width ) {
   573             pvr2_vram64_detwiddle_16( wdest, banks, offset_flag, 0, i, width, width );
   574         }
   575     } else if( width == 1 ) {
   576         *wdest = *banks[0];
   577     } else {
   578         pvr2_vram64_detwiddle_16( wdest, banks, offset_flag, 0, 0, width, width );
   579     }
   580 }
   582 static void pvr2_vram_write_invert( sh4addr_t destaddr, unsigned char *src, uint32_t src_size, 
   583                              uint32_t line_size, uint32_t dest_stride,
   584                              uint32_t src_stride )
   585 {
   586     unsigned char *dest = pvr2_main_ram + (destaddr & 0x007FFFFF);
   587     unsigned char *p = src + src_size - src_stride;
   588     while( p >= src ) {
   589         memcpy( dest, p, line_size );
   590         p -= src_stride;
   591         dest += dest_stride;
   592     }
   593 }
   595 static void pvr2_vram64_write_invert( sh4addr_t destaddr, unsigned char *src, 
   596                                       uint32_t src_size, uint32_t line_size, 
   597                                       uint32_t dest_stride, uint32_t src_stride )
   598 {
   599     int i,j;
   600     uint32_t *banks[2];
   601     uint32_t *dwsrc = (uint32_t *)(src + src_size - src_stride);
   602     int32_t src_line_gap = ((int32_t)src_stride + line_size) >> 2; 
   603     int32_t dest_line_gap = ((int32_t)dest_stride - (int32_t)line_size) >> 3;
   605     destaddr = destaddr & 0x7FFFF8;
   607     for( i=destaddr; i < destaddr + dest_stride*(src_size/src_stride); i+= LXDREAM_PAGE_SIZE ) {
   608         texcache_invalidate_page( i );
   609     }
   611     banks[0] = (uint32_t *)(pvr2_main_ram + (destaddr >>1));
   612     banks[1] = banks[0] + 0x100000;
   614     while( dwsrc >= (uint32_t *)src ) { 
   615         for( j=0; j<line_size; j+=8 ) {
   616             *banks[0]++ = *dwsrc++;
   617             *banks[1]++ = *dwsrc++;
   618         }
   619         banks[0] += dest_line_gap;
   620         banks[1] += dest_line_gap;
   621         dwsrc -= src_line_gap;
   622     }    
   623 }
   625 /**
   626  * Copy a pixel buffer to vram, flipping and scaling at the same time. This
   627  * is not massively efficient, but it's used pretty rarely.
   628  */
   629 static void pvr2_vram_write_invert_hscale( sh4addr_t destaddr, unsigned char *src, uint32_t src_size, 
   630                              uint32_t line_size, uint32_t dest_stride,
   631                              uint32_t src_stride, int bpp )
   632 {
   633     unsigned char *dest = pvr2_main_ram + (destaddr & 0x007FFFFF);
   634     unsigned char *p = src + src_size - src_stride;
   635     while( p >= src ) {
   636         unsigned char *s = p, *d = dest;
   637         int i;
   638         while( s < p+line_size ) {
   639             for( i=0; i<bpp; i++ ) {
   640                 *d++ = *s++;
   641             }
   642             s+= bpp;
   643         }
   644         p -= src_stride;
   645         dest += dest_stride;
   646     }
   647 }
   649 void pvr2_vram64_read( unsigned char *dest, sh4addr_t srcaddr, uint32_t length )
   650 {
   651     int bank_flag = (srcaddr & 0x04) >> 2;
   652     uint32_t *banks[2];
   653     uint32_t *dwdest;
   654     int i;
   656     srcaddr = srcaddr & 0x7FFFFF;
   657     if( srcaddr + length > 0x800000 )
   658         length = 0x800000 - srcaddr;
   660     banks[0] = ((uint32_t *)(pvr2_main_ram + ((srcaddr&0x007FFFF8)>>1)));
   661     banks[1] = banks[0] + 0x100000;
   662     if( bank_flag )
   663         banks[0]++;
   665     /* Handle non-aligned start of source */
   666     if( srcaddr & 0x03 ) {
   667         char *src = ((char *)banks[bank_flag]) + (srcaddr & 0x03);
   668         for( i= srcaddr & 0x03; i < 4 && length > 0; i++, length-- ) {
   669             *dest++ = *src++;
   670         }
   671         bank_flag = !bank_flag;
   672     }
   674     dwdest = (uint32_t *)dest;
   675     while( length >= 4 ) {
   676         *dwdest++ = *banks[bank_flag]++;
   677         bank_flag = !bank_flag;
   678         length -= 4;
   679     }
   681     /* Handle non-aligned end of source */
   682     if( length ) {
   683         dest = (unsigned char *)dwdest;
   684         unsigned char *src = (unsigned char *)banks[bank_flag];
   685         while( length-- > 0 ) {
   686             *dest++ = *src++;
   687         }
   688     }
   689 }
   691 void pvr2_vram64_dump_file( sh4addr_t addr, uint32_t length, gchar *filename )
   692 {
   693     uint32_t tmp[length>>2];
   694     FILE *f = fopen(filename, "wo");
   695     unsigned int i, j;
   697     if( f == NULL ) {
   698         ERROR( "Unable to write to dump file '%s' (%s)", filename, strerror(errno) );
   699         return;
   700     }
   701     pvr2_vram64_read( (unsigned char *)tmp, addr, length );
   702     fprintf( f, "%08X\n", addr );
   703     for( i =0; i<length>>2; i+=8 ) {
   704         for( j=i; j<i+8; j++ ) {
   705             if( j < length )
   706                 fprintf( f, " %08X", tmp[j] );
   707             else
   708                 fprintf( f, "         " );
   709         }
   710         fprintf( f, "\n" );
   711     }
   712     fclose(f);
   713 }
   715 void pvr2_vram64_dump( sh4addr_t addr, uint32_t length, FILE *f )
   716 {
   717     unsigned char tmp[length];
   718     pvr2_vram64_read( tmp, addr, length );
   719     fwrite_dump( tmp, length, f );
   720 }
   724 /**
   725  * Flush the indicated render buffer back to PVR. Caller is responsible for
   726  * tracking whether there is actually anything in the buffer.
   727  *
   728  * FIXME: Handle horizontal scaler 
   729  *
   730  * @param buffer A render buffer indicating the address to store to, and the
   731  * format the data needs to be in.
   732  */
   733 void pvr2_render_buffer_copy_to_sh4( render_buffer_t buffer )
   734 {
   735     int line_size = buffer->width * colour_formats[buffer->colour_format].bpp;
   736     int src_stride = line_size;
   737     unsigned char target[buffer->size];
   739     display_driver->read_render_buffer( target, buffer, line_size, buffer->colour_format );
   741     if( (buffer->scale & 0xFFFF) == 0x0800 )
   742         src_stride <<= 1;
   744     if( (buffer->address & 0xFF000000) == 0x04000000 ) {
   745         pvr2_vram64_write_invert( buffer->address, target, buffer->size, line_size, 
   746                                   buffer->rowstride, src_stride );
   747     } else {
   748         /* Regular buffer */
   749         if( buffer->scale & SCALER_HSCALE ) {
   750             pvr2_vram_write_invert_hscale( buffer->address, target, buffer->size, line_size, buffer->rowstride,
   751                                            src_stride, colour_formats[buffer->colour_format].bpp );
   752         } else {
   753             pvr2_vram_write_invert( buffer->address, target, buffer->size, line_size, buffer->rowstride,
   754                                     src_stride );
   755         }
   756     }
   757     buffer->flushed = TRUE;
   758 }
.