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lxdream.org :: lxdream/src/xlat/x86/amd64abi.h
lxdream 0.9.1
released Jun 29
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filename src/xlat/x86/amd64abi.h
changeset 1292:799fdd4f704a
prev1146:76c5d1064262
author nkeynes
date Fri Aug 24 08:53:50 2012 +1000 (8 years ago)
permissions -rw-r--r--
last change Move the generated prologue/epilogue code out into a common entry stub
(reduces space requirements) and pre-save all saved registers. Change
FASTCALL to use 3 regs instead of 2 since we can now keep everything in
regs.
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     1 /**
     2  * $Id$
     3  * 
     4  * Provides the implementation for the AMD64 ABI (eg prologue, epilogue, and
     5  * calling conventions)
     6  *
     7  * Copyright (c) 2007 Nathan Keynes.
     8  *
     9  * This program is free software; you can redistribute it and/or modify
    10  * it under the terms of the GNU General Public License as published by
    11  * the Free Software Foundation; either version 2 of the License, or
    12  * (at your option) any later version.
    13  *
    14  * This program is distributed in the hope that it will be useful,
    15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    17  * GNU General Public License for more details.
    18  */
    20 #define REG_ARG1 REG_RDI
    21 #define REG_ARG2 REG_RSI
    22 #define REG_ARG3 REG_RDX
    23 #define REG_RESULT1 REG_RAX
    24 #define MAX_REG_ARG 3  /* There's more, but we don't use more than 3 here anyway */
    25 #define REG_SAVE1 REG_R12
    26 #define REG_SAVE2 REG_R13
    27 #define REG_SAVE3 REG_R14
    28 #define REG_SAVE4 REG_R15
    29 #define REG_CALLPTR REG_EBX
    31 static inline void decode_address( uintptr_t base, int addr_reg, int target_reg )
    32 {
    33     MOVL_r32_r32( addr_reg, target_reg );
    34     SHRL_imm_r32( 12, target_reg );
    35     MOVP_immptr_rptr( base, REG_RDI );
    36     MOVP_sib_rptr( 3, target_reg, REG_RDI, 0, target_reg );
    37 }
    39 /**
    40  * Note: clobbers ECX to make the indirect call - this isn't usually
    41  * a problem since the callee will generally clobber it anyway.
    42  * Size: 12 bytes
    43  */
    44 static inline void CALL_ptr( void *ptr )
    45 {
    46     MOVP_immptr_rptr( (uintptr_t)ptr, REG_ECX );
    47     CALL_r32(REG_ECX);
    48 }
    50 #define CALL1_PTR_MIN_SIZE 12
    51 static inline void CALL1_ptr_r32( void *ptr, int arg1 )
    52 {
    53     if( arg1 != REG_ARG1 ) {
    54         MOVQ_r64_r64( arg1, REG_ARG1 );
    55     }
    56     CALL_ptr(ptr);
    57 }
    59 static inline void CALL1_r32disp_r32( int preg, uint32_t disp, int arg1 )
    60 {
    61     if( arg1 != REG_ARG1 ) {
    62         MOVQ_r64_r64( arg1, REG_ARG1 );
    63     }
    64     CALL_r32disp(preg, disp);    
    65 }
    67 static inline void CALL2_ptr_r32_r32( void *ptr, int arg1, int arg2 )
    68 {
    69     if( arg2 != REG_ARG2 ) {
    70         MOVQ_r64_r64( arg2, REG_ARG2 );
    71     }
    72     if( arg1 != REG_ARG1 ) {
    73         MOVQ_r64_r64( arg1, REG_ARG1 );
    74     }
    75     CALL_ptr(ptr);
    76 }
    78 static inline void CALL2_r32disp_r32_r32( int preg, uint32_t disp, int arg1, int arg2 )
    79 {
    80     if( arg2 != REG_ARG2 ) {
    81         MOVQ_r64_r64( arg2, REG_ARG2 );
    82     }
    83     if( arg1 != REG_ARG1 ) {
    84         MOVQ_r64_r64( arg1, REG_ARG1 );
    85     }
    86     CALL_r32disp(preg, disp);    
    87 }
    89 static inline void CALL3_r32disp_r32_r32_r32( int preg, uint32_t disp, int arg1, int arg2, int arg3 )
    90 {
    91     if( arg3 != REG_ARG3 ) {
    92         MOVQ_r64_r64( arg3, REG_ARG3 );
    93     }
    94     if( arg2 != REG_ARG2 ) {
    95         MOVQ_r64_r64( arg2, REG_ARG2 );
    96     }
    97     if( arg1 != REG_ARG1 ) {
    98         MOVQ_r64_r64( arg1, REG_ARG1 );
    99     }
   100     CALL_r32disp(preg, disp);    
   101 }
   103 #define PROLOGUE_SIZE 15
   105 /**
   106  * Emit the 'start of block' assembly. Sets up the stack frame and save
   107  * SI/DI as required
   108  */
   109 static inline void emit_prologue( )
   110 {
   111     PUSH_r32(REG_RBP);
   112     SUBQ_imms_r64( 16, REG_RSP ); 
   113     MOVP_immptr_rptr( ((uint8_t *)&sh4r) + 128, REG_EBP );
   114 }
   116 static inline void emit_epilogue( )
   117 {
   118     ADDQ_imms_r64( 16, REG_RSP );
   119     POP_r32(REG_RBP);
   120 }
.