filename | src/pvr2/pvr2.c |
changeset | 94:8d80d9c7cc7d |
prev | 85:71e239d20c5d |
next | 98:7b59bca968e9 |
author | nkeynes |
date | Sun Feb 05 04:05:27 2006 +0000 (17 years ago) |
permissions | -rw-r--r-- |
last change | Video code reshuffle to start getting real video happening. Implement colourspace conversions Various tweaks |
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1 /**
2 * $Id: pvr2.c,v 1.14 2006-02-05 04:05:27 nkeynes Exp $
3 *
4 * PVR2 (Video) MMIO and supporting functions.
5 *
6 * Copyright (c) 2005 Nathan Keynes.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18 #define MODULE pvr2_module
20 #include "dream.h"
21 #include "video.h"
22 #include "mem.h"
23 #include "asic.h"
24 #include "pvr2.h"
25 #include "sh4/sh4core.h"
26 #define MMIO_IMPL
27 #include "pvr2.h"
29 char *video_base;
31 void pvr2_init( void );
32 uint32_t pvr2_run_slice( uint32_t );
33 void pvr2_display_frame( void );
35 video_driver_t video_driver = NULL;
36 struct video_buffer video_buffer[2];
37 int video_buffer_idx = 0;
39 struct dreamcast_module pvr2_module = { "PVR2", pvr2_init, NULL, NULL,
40 pvr2_run_slice, NULL,
41 NULL, NULL };
43 void pvr2_init( void )
44 {
45 register_io_region( &mmio_region_PVR2 );
46 register_io_region( &mmio_region_PVR2PAL );
47 register_io_region( &mmio_region_PVR2TA );
48 video_base = mem_get_region_by_name( MEM_REGION_VIDEO );
49 video_driver = &video_gtk_driver;
50 }
52 uint32_t pvr2_time_counter = 0;
53 uint32_t pvr2_frame_counter = 0;
54 uint32_t pvr2_time_per_frame = 20000000;
56 uint32_t pvr2_run_slice( uint32_t nanosecs )
57 {
58 pvr2_time_counter += nanosecs;
59 while( pvr2_time_counter >= pvr2_time_per_frame ) {
60 pvr2_display_frame();
61 pvr2_time_counter -= pvr2_time_per_frame;
62 }
63 return nanosecs;
64 }
66 uint32_t vid_stride, vid_lpf, vid_ppl, vid_hres, vid_vres, vid_col;
67 int interlaced, bChanged = 1, bEnabled = 0, vid_size = 0;
68 char *frame_start; /* current video start address (in real memory) */
70 /*
71 * Display the next frame, copying the current contents of video ram to
72 * the window. If the video configuration has changed, first recompute the
73 * new frame size/depth.
74 */
75 void pvr2_display_frame( void )
76 {
77 int dispsize = MMIO_READ( PVR2, DISPSIZE );
78 int dispmode = MMIO_READ( PVR2, DISPMODE );
79 int vidcfg = MMIO_READ( PVR2, VIDCFG );
80 int vid_stride = ((dispsize & DISPSIZE_MODULO) >> 20) - 1;
81 int vid_lpf = ((dispsize & DISPSIZE_LPF) >> 10) + 1;
82 int vid_ppl = ((dispsize & DISPSIZE_PPL)) + 1;
83 gboolean bEnabled = (dispmode & DISPMODE_DE) && (vidcfg & VIDCFG_VO ) ? TRUE : FALSE;
84 gboolean interlaced = (vidcfg & VIDCFG_I ? TRUE : FALSE);
85 if( bEnabled ) {
86 video_buffer_t buffer = &video_buffer[video_buffer_idx];
87 video_buffer_idx = !video_buffer_idx;
88 video_buffer_t last = &video_buffer[video_buffer_idx];
89 buffer->colour_format = (dispmode & DISPMODE_COL);
90 buffer->rowstride = (vid_ppl + vid_stride) << 2;
91 buffer->data = frame_start = video_base + MMIO_READ( PVR2, DISPADDR1 );
92 buffer->vres = vid_lpf;
93 if( interlaced ) buffer->vres <<= 1;
94 switch( buffer->colour_format ) {
95 case COLFMT_RGB15:
96 case COLFMT_RGB16: buffer->hres = vid_ppl << 1; break;
97 case COLFMT_RGB24: buffer->hres = (vid_ppl << 2) / 3; break;
98 case COLFMT_RGB32: buffer->hres = vid_ppl; break;
99 }
101 if( video_driver != NULL ) {
102 if( buffer->hres != last->hres ||
103 buffer->vres != last->vres ||
104 buffer->colour_format != last->colour_format) {
105 video_driver->set_output_format( buffer->hres, buffer->vres,
106 buffer->colour_format );
107 }
108 if( MMIO_READ( PVR2, VIDCFG2 ) & 0x08 ) { /* Blanked */
109 uint32_t colour = MMIO_READ( PVR2, BORDERCOL );
110 video_driver->display_blank_frame( colour );
111 } else {
112 video_driver->display_frame( buffer );
113 }
114 }
115 } else {
116 video_buffer_idx = 0;
117 video_buffer[0].hres = video_buffer[0].vres = 0;
118 }
119 pvr2_frame_counter++;
120 asic_event( EVENT_SCANLINE1 );
121 asic_event( EVENT_SCANLINE2 );
122 asic_event( EVENT_RETRACE );
123 }
125 void mmio_region_PVR2_write( uint32_t reg, uint32_t val )
126 {
127 if( reg >= 0x200 && reg < 0x600 ) { /* Fog table */
128 MMIO_WRITE( PVR2, reg, val );
129 /* I don't want to hear about these */
130 return;
131 }
133 INFO( "PVR2 write to %08X <= %08X [%s: %s]", reg, val,
134 MMIO_REGID(PVR2,reg), MMIO_REGDESC(PVR2,reg) );
136 switch(reg) {
137 case RENDSTART:
138 if( val == 0xFFFFFFFF )
139 pvr2_render_scene();
140 break;
141 }
142 MMIO_WRITE( PVR2, reg, val );
143 }
145 MMIO_REGION_READ_FN( PVR2, reg )
146 {
147 switch( reg ) {
148 case BEAMPOS:
149 return sh4r.icount&0x20 ? 0x2000 : 1;
150 default:
151 return MMIO_READ( PVR2, reg );
152 }
153 }
155 MMIO_REGION_DEFFNS( PVR2PAL )
157 void pvr2_set_base_address( uint32_t base )
158 {
159 mmio_region_PVR2_write( DISPADDR1, base );
160 }
163 void pvr2_render_scene( void )
164 {
165 /* Actual rendering goes here :) */
166 asic_event( EVENT_PVR_RENDER_DONE );
167 DEBUG( "Rendered frame %d", pvr2_frame_counter );
168 }
170 /** Tile Accelerator */
172 struct tacmd {
173 uint32_t command;
174 uint32_t param1;
175 uint32_t param2;
176 uint32_t texture;
177 float alpha;
178 float red;
179 float green;
180 float blue;
181 };
183 int32_t mmio_region_PVR2TA_read( uint32_t reg )
184 {
185 return 0xFFFFFFFF;
186 }
188 char pvr2ta_remainder[8];
190 void mmio_region_PVR2TA_write( uint32_t reg, uint32_t val )
191 {
192 DEBUG( "Direct write to TA %08X", val );
193 }
195 unsigned int pvr2_last_poly_type = 0;
197 void pvr2ta_write( char *buf, uint32_t length )
198 {
199 int i;
200 struct tacmd *cmd_list = (struct tacmd *)buf;
201 int count = length >> 5;
202 for( i=0; i<count; i++ ){
203 unsigned int type = (cmd_list[i].command >> 24) & 0xFF;
204 DEBUG( "PVR2 cmd: %08X %08X %08X %08X %08X %08X %08X %08X", cmd_list[i].command, cmd_list[i].param1, cmd_list[i].param2, cmd_list[i].texture, cmd_list[i].alpha, cmd_list[i].red, cmd_list[i].green, cmd_list[i].blue );
205 if( type == 0 ) {
206 /* End of list */
207 switch( pvr2_last_poly_type ) {
208 case 0x80: /* Opaque polys */
209 asic_event( EVENT_PVR_OPAQUE_DONE );
210 break;
211 case 0x81: /* Opaque poly modifier */
212 asic_event( EVENT_PVR_OPAQUEMOD_DONE );
213 break;
214 case 0x82: /* Transparent polys */
215 asic_event( EVENT_PVR_TRANS_DONE );
216 break;
217 case 0x83: /* Transparent poly modifier */
218 asic_event( EVENT_PVR_TRANSMOD_DONE );
219 break;
220 case 0x84: /* Punchthrough */
221 asic_event( EVENT_PVR_PUNCHOUT_DONE );
222 break;
223 }
224 pvr2_last_poly_type = 0;
225 } else if( type >= 0x80 && type <= 0x84 ) {
226 pvr2_last_poly_type = type;
227 }
228 }
229 }
.