lxdream 0.9.1| filename | src/pvr2/pvr2mmio.h |
| changeset | 261:93fdb2a70e18 |
| prev | 197:f65ff8c8320d |
| next | 333:e29561c998f5 |
| author | nkeynes |
| date | Wed Jan 03 09:01:51 2007 +0000 (16 years ago) |
| permissions | -rw-r--r-- |
| last change | Implement the main CRTC registers, along with the sync status register. Timings are now pretty close to the real thing. |
| view | annotate | diff | log | raw |
1 /**
2 * $Id: pvr2mmio.h,v 1.8 2007-01-03 09:01:51 nkeynes Exp $
3 *
4 * PVR2 (video chip) MMIO register definitions.
5 *
6 * Copyright (c) 2005 Nathan Keynes.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
19 #include "mmio.h"
21 MMIO_REGION_BEGIN( 0x005F8000, PVR2, "Power VR/2" )
22 LONG_PORT( 0x000, PVRID, PORT_R, 0x17FD11DB, "PVR2 Core ID" )
23 LONG_PORT( 0x004, PVRVER, PORT_R, 0x00000011, "PVR2 Core Version" )
24 LONG_PORT( 0x008, PVRRESET, PORT_MRW, 0, "PVR2 Reset" )
25 LONG_PORT( 0x014, RENDER_START, PORT_W, 0, "Start render" )
26 LONG_PORT( 0x018, PVRUNK1, PORT_MRW, 0, "PVR2 unknown register 1" )
27 LONG_PORT( 0x020, RENDER_POLYBASE, PORT_MRW, 0, "Object buffer base offset" )
28 LONG_PORT( 0x02C, RENDER_TILEBASE, PORT_MRW, 0, "Tile buffer base offset" )
29 LONG_PORT( 0x030, RENDER_TSPCFG, PORT_MRW, 0, "TSP config?" )
30 LONG_PORT( 0x040, DISP_BORDER, PORT_MRW, 0, "Border Colour (RGB)" )
31 LONG_PORT( 0x044, DISP_MODE, PORT_MRW, 0, "Display Mode" )
32 LONG_PORT( 0x048, RENDER_MODE, PORT_MRW, 0, "Rendering Mode" )
33 LONG_PORT( 0x04C, RENDER_SIZE, PORT_MRW, 0, "Rendering width (bytes/2)" )
34 LONG_PORT( 0x050, DISP_ADDR1, PORT_MRW, 0, "Video memory base 1" )
35 LONG_PORT( 0x054, DISP_ADDR2, PORT_MRW, 0, "Video memory base 2" )
36 LONG_PORT( 0x05C, DISP_SIZE, PORT_MRW, 0, "Display size" )
37 LONG_PORT( 0x060, RENDER_ADDR1, PORT_MRW, 0, "Rendering memory base 1" )
38 LONG_PORT( 0x064, RENDER_ADDR2, PORT_MRW, 0, "Rendering memory base 2" )
39 LONG_PORT( 0x068, RENDER_HCLIP, PORT_MRW, 0, "Horizontal clipping area" )
40 LONG_PORT( 0x06C, RENDER_VCLIP, PORT_MRW, 0, "Vertical clipping area" )
41 LONG_PORT( 0x074, RENDER_SHADOW, PORT_MRW, 0, "Shadowing" )
42 LONG_PORT( 0x078, RENDER_NEARCLIP, PORT_MRW, 0, "Object clip distance (float32)" )
43 LONG_PORT( 0x07C, RENDER_OBJCFG, PORT_MRW, 0, "Object config" )
44 LONG_PORT( 0x080, PVRUNK2, PORT_MRW, 0, "PVR2 unknown register 2" )
45 LONG_PORT( 0x084, RENDER_TSPCLIP, PORT_MRW, 0, "Texture clip distance (float32)" )
46 LONG_PORT( 0x088, RENDER_FARCLIP, PORT_MRW, 0, "Background plane depth (float32)" )
47 LONG_PORT( 0x08C, RENDER_BGPLANE, PORT_MRW, 0, "Background plane config" )
48 LONG_PORT( 0x098, RENDER_ISPCFG, PORT_MRW, 0, "ISP config" )
49 LONG_PORT( 0x0A0, VRAM_CFG1, PORT_MRW, 0, "VRAM config 1" )
50 LONG_PORT( 0x0A4, VRAM_CFG2, PORT_MRW, 0, "VRAM config 2" )
51 LONG_PORT( 0x0A8, VRAM_CFG3, PORT_MRW, 0, "VRAM config 3" )
52 LONG_PORT( 0x0B0, RENDER_FOGTBLCOL, PORT_MRW, 0, "Fog table colour" )
53 LONG_PORT( 0x0B4, RENDER_FOGVRTCOL, PORT_MRW, 0, "Fog vertex colour" )
54 LONG_PORT( 0x0B8, RENDER_FOGCOEFF, PORT_MRW, 0, "Fog density coefficient (float16)" )
55 LONG_PORT( 0x0BC, RENDER_CLAMPHI, PORT_MRW, 0, "Clamp high colour" )
56 LONG_PORT( 0x0C0, RENDER_CLAMPLO, PORT_MRW, 0, "Clamp low colour" )
57 LONG_PORT( 0x0C4, GUNPOS, PORT_MRW, 0, "Lightgun position" )
58 LONG_PORT( 0x0C8, DISP_HPOSIRQ, PORT_MRW, 0, "Raster horizontal event position" )
59 LONG_PORT( 0x0CC, DISP_VPOSIRQ, PORT_MRW, 0, "Raster event position" )
60 LONG_PORT( 0x0D0, DISP_SYNCCFG, PORT_MRW, 0, "Sync configuration & enable" )
61 LONG_PORT( 0x0D4, DISP_HBORDER, PORT_MRW, 0, "Horizontal border area" )
62 LONG_PORT( 0x0D8, DISP_TOTAL, PORT_MRW, 0, "Total display area" )
63 LONG_PORT( 0x0DC, DISP_VBORDER, PORT_MRW, 0, "Vertical border area" )
64 LONG_PORT( 0x0E0, DISP_SYNCTIME, PORT_MRW, 0, "Horizontal sync pulse timing" )
65 LONG_PORT( 0x0E4, RENDER_TEXSIZE, PORT_MRW, 0, "Texture modulo width" )
66 LONG_PORT( 0x0E8, DISP_CFG2, PORT_MRW, 0, "Video configuration 2" )
67 LONG_PORT( 0x0EC, DISP_HPOS, PORT_MRW, 0, "Horizontal display position" )
68 LONG_PORT( 0x0F0, DISP_VPOS, PORT_MRW, 0, "Vertical display position" )
69 LONG_PORT( 0x0F4, SCALERCFG, PORT_MRW, 0, "Scaler configuration (?)" )
70 LONG_PORT( 0x108, RENDER_PALETTE, PORT_MRW, 0, "Palette configuration" )
71 LONG_PORT( 0x10C, DISP_SYNCSTAT, PORT_R, 0, "Raster beam position" )
72 LONG_PORT( 0x110, PVRUNK3, PORT_MRW, 0, "PVR2 unknown register 3" )
73 LONG_PORT( 0x114, PVRUNK4, PORT_MRW, 0, "PVR2 unknown register 4" )
74 LONG_PORT( 0x118, PVRUNK5, PORT_MRW, 0, "PVR2 unkown register 5" )
75 LONG_PORT( 0x11C, PVRUNK6, PORT_MRW, 0, "PVR2 unkown register 6" )
76 LONG_PORT( 0x124, TA_TILEBASE, PORT_MRW, 0, "TA Tile matrix start" )
77 LONG_PORT( 0x128, TA_POLYBASE, PORT_MRW, 0, "TA Polygon buffer start" )
78 LONG_PORT( 0x12C, TA_LISTEND, PORT_MRW, 0, "TA Tile matrix end" )
79 LONG_PORT( 0x130, TA_POLYEND, PORT_MRW, 0, "TA Polygon buffer end" )
80 LONG_PORT( 0x134, TA_LISTPOS, PORT_R, 0, "TA Tile list position" )
81 LONG_PORT( 0x138, TA_POLYPOS, PORT_R, 0, "TA Polygon buffer position" )
82 LONG_PORT( 0x13C, TA_TILESIZE, PORT_MRW, 0, "TA Tile matrix size" )
83 LONG_PORT( 0x140, TA_TILECFG, PORT_MRW, 0, "TA Tile matrix config" )
84 LONG_PORT( 0x144, TA_INIT, PORT_W, 0, "TA Initialize" )
85 LONG_PORT( 0x148, YUV_ADDR, PORT_MRW, 0, "YUV conversion address" )
86 LONG_PORT( 0x14C, YUV_CFG, PORT_MRW, 0, "YUV configuration" )
87 LONG_PORT( 0x150, YUV_COUNT, PORT_MR, 0, "YUV conversion count" )
88 LONG_PORT( 0x160, TA_REINIT, PORT_W, 0, "TA re-initialize" )
89 LONG_PORT( 0x164, TA_LISTBASE, PORT_MRW, 0, "TA Tile list start" )
90 LONG_PORT( 0x1A8, PVRUNK7, PORT_MRW, 0, "PVR2 unknown register 7" )
91 MMIO_REGION_END
93 MMIO_REGION_BEGIN( 0x005F9000, PVR2PAL, "Power VR/2 CLUT Palettes" )
94 LONG_PORT( 0x000, PAL0_0, PORT_MRW, 0, "Pal0 colour 0" )
95 MMIO_REGION_END
97 MMIO_REGION_BEGIN( 0x10000000, PVR2TA, "Power VR/2 TA Command port" )
98 LONG_PORT( 0x000, TACMD, PORT_MRW, 0, "TA Command port" )
99 MMIO_REGION_END
.