1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
27 /* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
34 #include "x86dasm/dis-asm.h"
35 #include "x86dasm/sysdep.h"
36 #include "x86dasm/x86dasm.h"
43 #ifndef UNIXWARE_COMPAT
44 /* Set non-zero for broken, compatible instructions. Set to zero for
45 non-broken opcodes. */
46 #define UNIXWARE_COMPAT 1
49 static int fetch_data (struct disassemble_info *, bfd_byte *);
50 static void ckprefix (void);
51 static const char *prefix_name (int, int);
52 static int print_insn (bfd_vma, disassemble_info *);
53 static void dofloat (int);
54 static void OP_ST (int, int);
55 static void OP_STi (int, int);
56 static int putop (const char *, int);
57 static void oappend (const char *);
58 static void append_seg (void);
59 static void OP_indirE (int, int);
60 static void print_operand_value (char *, int, bfd_vma);
61 static void OP_E (int, int);
62 static void OP_G (int, int);
63 static bfd_vma get64 (void);
64 static bfd_signed_vma get32 (void);
65 static bfd_signed_vma get32s (void);
66 static int get16 (void);
67 static void set_op (bfd_vma, int);
68 static void OP_REG (int, int);
69 static void OP_IMREG (int, int);
70 static void OP_I (int, int);
71 static void OP_I64 (int, int);
72 static void OP_sI (int, int);
73 static void OP_J (int, int);
74 static void OP_SEG (int, int);
75 static void OP_DIR (int, int);
76 static void OP_OFF (int, int);
77 static void OP_OFF64 (int, int);
78 static void ptr_reg (int, int);
79 static void OP_ESreg (int, int);
80 static void OP_DSreg (int, int);
81 static void OP_C (int, int);
82 static void OP_D (int, int);
83 static void OP_T (int, int);
84 static void OP_Rd (int, int);
85 static void OP_MMX (int, int);
86 static void OP_XMM (int, int);
87 static void OP_EM (int, int);
88 static void OP_EX (int, int);
89 static void OP_MS (int, int);
90 static void OP_XS (int, int);
91 static void OP_M (int, int);
92 static void OP_0fae (int, int);
93 static void OP_0f07 (int, int);
94 static void NOP_Fixup (int, int);
95 static void OP_3DNowSuffix (int, int);
96 static void OP_SIMD_Suffix (int, int);
97 static void SIMD_Fixup (int, int);
98 static void PNI_Fixup (int, int);
99 static void INVLPG_Fixup (int, int);
100 static void BadOp (void);
103 /* Points to first byte not fetched. */
104 bfd_byte *max_fetched;
105 bfd_byte the_buffer[MAXLEN];
111 /* The opcode for the fwait instruction, which we treat as a prefix
113 #define FWAIT_OPCODE (0x9b)
115 /* Set to 1 for 64bit mode disassembly. */
116 static int mode_64bit;
118 /* Flags for the prefixes for the current instruction. See below. */
121 /* REX prefix the current instruction. See below. */
123 /* Bits of REX we've already used. */
129 /* Mark parts used in the REX prefix. When we are testing for
130 empty prefix (for 8bit register REX extension), just mask it
131 out. Otherwise test for REX bit is excuse for existence of REX
132 only in case value is nonzero. */
133 #define USED_REX(value) \
136 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
141 /* Flags for prefixes which we somehow handled when printing the
142 current instruction. */
143 static int used_prefixes;
145 /* Flags stored in PREFIXES. */
146 #define PREFIX_REPZ 1
147 #define PREFIX_REPNZ 2
148 #define PREFIX_LOCK 4
150 #define PREFIX_SS 0x10
151 #define PREFIX_DS 0x20
152 #define PREFIX_ES 0x40
153 #define PREFIX_FS 0x80
154 #define PREFIX_GS 0x100
155 #define PREFIX_DATA 0x200
156 #define PREFIX_ADDR 0x400
157 #define PREFIX_FWAIT 0x800
159 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
160 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
162 #define FETCH_DATA(info, addr) \
163 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
164 ? 1 : fetch_data ((info), (addr)))
167 fetch_data (struct disassemble_info *info, bfd_byte *addr)
170 struct dis_private *priv = (struct dis_private *) info->private_data;
171 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
173 status = (*info->read_memory_func) (start,
175 addr - priv->max_fetched,
179 /* If we did manage to read at least one byte, then
180 print_insn_i386 will do something sensible. Otherwise, print
181 an error. We do that here because this is where we know
183 if (priv->max_fetched == priv->the_buffer)
184 (*info->memory_error_func) (status, start, info);
185 longjmp (priv->bailout, 1);
188 priv->max_fetched = addr;
194 #define Eb OP_E, b_mode
195 #define Ev OP_E, v_mode
196 #define Ed OP_E, d_mode
197 #define Eq OP_E, q_mode
198 #define Edq OP_E, dq_mode
199 #define Edqw OP_E, dqw_mode
200 #define indirEv OP_indirE, v_mode
201 #define indirEp OP_indirE, f_mode
202 #define Ew OP_E, w_mode
203 #define Ma OP_E, v_mode
204 #define M OP_M, 0 /* lea, lgdt, etc. */
205 #define Mp OP_M, f_mode /* 32 or 48 bit memory operand for LDS, LES etc */
206 #define Gb OP_G, b_mode
207 #define Gv OP_G, v_mode
208 #define Gd OP_G, d_mode
209 #define Gdq OP_G, dq_mode
210 #define Gw OP_G, w_mode
211 #define Rd OP_Rd, d_mode
212 #define Rm OP_Rd, m_mode
213 #define Ib OP_I, b_mode
214 #define sIb OP_sI, b_mode /* sign extened byte */
215 #define Iv OP_I, v_mode
216 #define Iq OP_I, q_mode
217 #define Iv64 OP_I64, v_mode
218 #define Iw OP_I, w_mode
219 #define I1 OP_I, const_1_mode
220 #define Jb OP_J, b_mode
221 #define Jv OP_J, v_mode
222 #define Cm OP_C, m_mode
223 #define Dm OP_D, m_mode
224 #define Td OP_T, d_mode
226 #define RMeAX OP_REG, eAX_reg
227 #define RMeBX OP_REG, eBX_reg
228 #define RMeCX OP_REG, eCX_reg
229 #define RMeDX OP_REG, eDX_reg
230 #define RMeSP OP_REG, eSP_reg
231 #define RMeBP OP_REG, eBP_reg
232 #define RMeSI OP_REG, eSI_reg
233 #define RMeDI OP_REG, eDI_reg
234 #define RMrAX OP_REG, rAX_reg
235 #define RMrBX OP_REG, rBX_reg
236 #define RMrCX OP_REG, rCX_reg
237 #define RMrDX OP_REG, rDX_reg
238 #define RMrSP OP_REG, rSP_reg
239 #define RMrBP OP_REG, rBP_reg
240 #define RMrSI OP_REG, rSI_reg
241 #define RMrDI OP_REG, rDI_reg
242 #define RMAL OP_REG, al_reg
243 #define RMAL OP_REG, al_reg
244 #define RMCL OP_REG, cl_reg
245 #define RMDL OP_REG, dl_reg
246 #define RMBL OP_REG, bl_reg
247 #define RMAH OP_REG, ah_reg
248 #define RMCH OP_REG, ch_reg
249 #define RMDH OP_REG, dh_reg
250 #define RMBH OP_REG, bh_reg
251 #define RMAX OP_REG, ax_reg
252 #define RMDX OP_REG, dx_reg
254 #define eAX OP_IMREG, eAX_reg
255 #define eBX OP_IMREG, eBX_reg
256 #define eCX OP_IMREG, eCX_reg
257 #define eDX OP_IMREG, eDX_reg
258 #define eSP OP_IMREG, eSP_reg
259 #define eBP OP_IMREG, eBP_reg
260 #define eSI OP_IMREG, eSI_reg
261 #define eDI OP_IMREG, eDI_reg
262 #define AL OP_IMREG, al_reg
263 #define AL OP_IMREG, al_reg
264 #define CL OP_IMREG, cl_reg
265 #define DL OP_IMREG, dl_reg
266 #define BL OP_IMREG, bl_reg
267 #define AH OP_IMREG, ah_reg
268 #define CH OP_IMREG, ch_reg
269 #define DH OP_IMREG, dh_reg
270 #define BH OP_IMREG, bh_reg
271 #define AX OP_IMREG, ax_reg
272 #define DX OP_IMREG, dx_reg
273 #define indirDX OP_IMREG, indir_dx_reg
275 #define Sw OP_SEG, w_mode
277 #define Ob OP_OFF, b_mode
278 #define Ob64 OP_OFF64, b_mode
279 #define Ov OP_OFF, v_mode
280 #define Ov64 OP_OFF64, v_mode
281 #define Xb OP_DSreg, eSI_reg
282 #define Xv OP_DSreg, eSI_reg
283 #define Yb OP_ESreg, eDI_reg
284 #define Yv OP_ESreg, eDI_reg
285 #define DSBX OP_DSreg, eBX_reg
287 #define es OP_REG, es_reg
288 #define ss OP_REG, ss_reg
289 #define cs OP_REG, cs_reg
290 #define ds OP_REG, ds_reg
291 #define fs OP_REG, fs_reg
292 #define gs OP_REG, gs_reg
296 #define EM OP_EM, v_mode
297 #define EX OP_EX, v_mode
298 #define MS OP_MS, v_mode
299 #define XS OP_XS, v_mode
300 #define OPSUF OP_3DNowSuffix, 0
301 #define OPSIMD OP_SIMD_Suffix, 0
303 #define cond_jump_flag NULL, cond_jump_mode
304 #define loop_jcxz_flag NULL, loop_jcxz_mode
306 /* bits in sizeflag */
307 #define SUFFIX_ALWAYS 4
311 #define b_mode 1 /* byte operand */
312 #define v_mode 2 /* operand size depends on prefixes */
313 #define w_mode 3 /* word operand */
314 #define d_mode 4 /* double word operand */
315 #define q_mode 5 /* quad word operand */
316 #define t_mode 6 /* ten-byte operand */
317 #define x_mode 7 /* 16-byte XMM operand */
318 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
319 #define cond_jump_mode 9
320 #define loop_jcxz_mode 10
321 #define dq_mode 11 /* operand size depends on REX prefixes. */
322 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
323 #define f_mode 13 /* 4- or 6-byte pointer operand */
324 #define const_1_mode 14
369 #define indir_dx_reg 150
373 #define USE_PREFIX_USER_TABLE 3
374 #define X86_64_SPECIAL 4
376 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
378 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0
379 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0
380 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0
381 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0
382 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0
383 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0
384 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0
385 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0
386 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0
387 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0
388 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0
389 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0
390 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0
391 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0
392 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0
393 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0
394 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0
395 #define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0
396 #define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0
397 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0
398 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
399 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
400 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
401 #define GRPPADLCK1 NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0
402 #define GRPPADLCK2 NULL, NULL, USE_GROUPS, NULL, 24, NULL, 0
404 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
405 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
406 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0
407 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0
408 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0
409 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0
410 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0
411 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0
412 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0
413 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0
414 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0
415 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0
416 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0
417 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0
418 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0
419 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0
420 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0
421 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0
422 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0
423 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0
424 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0
425 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0
426 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0
427 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0
428 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0
429 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0
430 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0
431 #define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0
432 #define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0
433 #define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0
434 #define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0
435 #define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0
436 #define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0
438 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
440 typedef void (*op_rtn) (int bytemode, int sizeflag);
452 /* Upper case letters in the instruction names here are macros.
453 'A' => print 'b' if no register operands or suffix_always is true
454 'B' => print 'b' if suffix_always is true
455 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
457 'E' => print 'e' if 32-bit form of jcxz
458 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
459 'H' => print ",pt" or ",pn" branch hint
460 'I' => honor following macro letter even in Intel mode (implemented only
461 . for some of the macro letters)
463 'L' => print 'l' if suffix_always is true
464 'N' => print 'n' if instruction has no wait "prefix"
465 'O' => print 'd', or 'o'
466 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
467 . or suffix_always is true. print 'q' if rex prefix is present.
468 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
470 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
471 'S' => print 'w', 'l' or 'q' if suffix_always is true
472 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
473 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
474 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
475 'X' => print 's', 'd' depending on data16 prefix (for XMM)
476 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
478 Many of the above letters print nothing in Intel mode. See "putop"
481 Braces '{' and '}', and vertical bars '|', indicate alternative
482 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
483 modes. In cases where there are only two alternatives, the X86_64
484 instruction is reserved, and "(bad)" is printed.
487 static const struct dis386 dis386[] = {
489 { "addB", Eb, Gb, XX },
490 { "addS", Ev, Gv, XX },
491 { "addB", Gb, Eb, XX },
492 { "addS", Gv, Ev, XX },
493 { "addB", AL, Ib, XX },
494 { "addS", eAX, Iv, XX },
495 { "push{T|}", es, XX, XX },
496 { "pop{T|}", es, XX, XX },
498 { "orB", Eb, Gb, XX },
499 { "orS", Ev, Gv, XX },
500 { "orB", Gb, Eb, XX },
501 { "orS", Gv, Ev, XX },
502 { "orB", AL, Ib, XX },
503 { "orS", eAX, Iv, XX },
504 { "push{T|}", cs, XX, XX },
505 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
507 { "adcB", Eb, Gb, XX },
508 { "adcS", Ev, Gv, XX },
509 { "adcB", Gb, Eb, XX },
510 { "adcS", Gv, Ev, XX },
511 { "adcB", AL, Ib, XX },
512 { "adcS", eAX, Iv, XX },
513 { "push{T|}", ss, XX, XX },
514 { "popT|}", ss, XX, XX },
516 { "sbbB", Eb, Gb, XX },
517 { "sbbS", Ev, Gv, XX },
518 { "sbbB", Gb, Eb, XX },
519 { "sbbS", Gv, Ev, XX },
520 { "sbbB", AL, Ib, XX },
521 { "sbbS", eAX, Iv, XX },
522 { "push{T|}", ds, XX, XX },
523 { "pop{T|}", ds, XX, XX },
525 { "andB", Eb, Gb, XX },
526 { "andS", Ev, Gv, XX },
527 { "andB", Gb, Eb, XX },
528 { "andS", Gv, Ev, XX },
529 { "andB", AL, Ib, XX },
530 { "andS", eAX, Iv, XX },
531 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
532 { "daa{|}", XX, XX, XX },
534 { "subB", Eb, Gb, XX },
535 { "subS", Ev, Gv, XX },
536 { "subB", Gb, Eb, XX },
537 { "subS", Gv, Ev, XX },
538 { "subB", AL, Ib, XX },
539 { "subS", eAX, Iv, XX },
540 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
541 { "das{|}", XX, XX, XX },
543 { "xorB", Eb, Gb, XX },
544 { "xorS", Ev, Gv, XX },
545 { "xorB", Gb, Eb, XX },
546 { "xorS", Gv, Ev, XX },
547 { "xorB", AL, Ib, XX },
548 { "xorS", eAX, Iv, XX },
549 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
550 { "aaa{|}", XX, XX, XX },
552 { "cmpB", Eb, Gb, XX },
553 { "cmpS", Ev, Gv, XX },
554 { "cmpB", Gb, Eb, XX },
555 { "cmpS", Gv, Ev, XX },
556 { "cmpB", AL, Ib, XX },
557 { "cmpS", eAX, Iv, XX },
558 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
559 { "aas{|}", XX, XX, XX },
561 { "inc{S|}", RMeAX, XX, XX },
562 { "inc{S|}", RMeCX, XX, XX },
563 { "inc{S|}", RMeDX, XX, XX },
564 { "inc{S|}", RMeBX, XX, XX },
565 { "inc{S|}", RMeSP, XX, XX },
566 { "inc{S|}", RMeBP, XX, XX },
567 { "inc{S|}", RMeSI, XX, XX },
568 { "inc{S|}", RMeDI, XX, XX },
570 { "dec{S|}", RMeAX, XX, XX },
571 { "dec{S|}", RMeCX, XX, XX },
572 { "dec{S|}", RMeDX, XX, XX },
573 { "dec{S|}", RMeBX, XX, XX },
574 { "dec{S|}", RMeSP, XX, XX },
575 { "dec{S|}", RMeBP, XX, XX },
576 { "dec{S|}", RMeSI, XX, XX },
577 { "dec{S|}", RMeDI, XX, XX },
579 { "pushS", RMrAX, XX, XX },
580 { "pushS", RMrCX, XX, XX },
581 { "pushS", RMrDX, XX, XX },
582 { "pushS", RMrBX, XX, XX },
583 { "pushS", RMrSP, XX, XX },
584 { "pushS", RMrBP, XX, XX },
585 { "pushS", RMrSI, XX, XX },
586 { "pushS", RMrDI, XX, XX },
588 { "popS", RMrAX, XX, XX },
589 { "popS", RMrCX, XX, XX },
590 { "popS", RMrDX, XX, XX },
591 { "popS", RMrBX, XX, XX },
592 { "popS", RMrSP, XX, XX },
593 { "popS", RMrBP, XX, XX },
594 { "popS", RMrSI, XX, XX },
595 { "popS", RMrDI, XX, XX },
597 { "pusha{P|}", XX, XX, XX },
598 { "popa{P|}", XX, XX, XX },
599 { "bound{S|}", Gv, Ma, XX },
601 { "(bad)", XX, XX, XX }, /* seg fs */
602 { "(bad)", XX, XX, XX }, /* seg gs */
603 { "(bad)", XX, XX, XX }, /* op size prefix */
604 { "(bad)", XX, XX, XX }, /* adr size prefix */
606 { "pushT", Iq, XX, XX },
607 { "imulS", Gv, Ev, Iv },
608 { "pushT", sIb, XX, XX },
609 { "imulS", Gv, Ev, sIb },
610 { "ins{b||b|}", Yb, indirDX, XX },
611 { "ins{R||R|}", Yv, indirDX, XX },
612 { "outs{b||b|}", indirDX, Xb, XX },
613 { "outs{R||R|}", indirDX, Xv, XX },
615 { "joH", Jb, XX, cond_jump_flag },
616 { "jnoH", Jb, XX, cond_jump_flag },
617 { "jbH", Jb, XX, cond_jump_flag },
618 { "jaeH", Jb, XX, cond_jump_flag },
619 { "jeH", Jb, XX, cond_jump_flag },
620 { "jneH", Jb, XX, cond_jump_flag },
621 { "jbeH", Jb, XX, cond_jump_flag },
622 { "jaH", Jb, XX, cond_jump_flag },
624 { "jsH", Jb, XX, cond_jump_flag },
625 { "jnsH", Jb, XX, cond_jump_flag },
626 { "jpH", Jb, XX, cond_jump_flag },
627 { "jnpH", Jb, XX, cond_jump_flag },
628 { "jlH", Jb, XX, cond_jump_flag },
629 { "jgeH", Jb, XX, cond_jump_flag },
630 { "jleH", Jb, XX, cond_jump_flag },
631 { "jgH", Jb, XX, cond_jump_flag },
635 { "(bad)", XX, XX, XX },
637 { "testB", Eb, Gb, XX },
638 { "testS", Ev, Gv, XX },
639 { "xchgB", Eb, Gb, XX },
640 { "xchgS", Ev, Gv, XX },
642 { "movB", Eb, Gb, XX },
643 { "movS", Ev, Gv, XX },
644 { "movB", Gb, Eb, XX },
645 { "movS", Gv, Ev, XX },
646 { "movQ", Ev, Sw, XX },
647 { "leaS", Gv, M, XX },
648 { "movQ", Sw, Ev, XX },
649 { "popU", Ev, XX, XX },
651 { "nop", NOP_Fixup, 0, XX, XX },
652 { "xchgS", RMeCX, eAX, XX },
653 { "xchgS", RMeDX, eAX, XX },
654 { "xchgS", RMeBX, eAX, XX },
655 { "xchgS", RMeSP, eAX, XX },
656 { "xchgS", RMeBP, eAX, XX },
657 { "xchgS", RMeSI, eAX, XX },
658 { "xchgS", RMeDI, eAX, XX },
660 { "cW{tR||tR|}", XX, XX, XX },
661 { "cR{tO||tO|}", XX, XX, XX },
662 { "Jcall{T|}", Ap, XX, XX },
663 { "(bad)", XX, XX, XX }, /* fwait */
664 { "pushfT", XX, XX, XX },
665 { "popfT", XX, XX, XX },
666 { "sahf{|}", XX, XX, XX },
667 { "lahf{|}", XX, XX, XX },
669 { "movB", AL, Ob64, XX },
670 { "movS", eAX, Ov64, XX },
671 { "movB", Ob64, AL, XX },
672 { "movS", Ov64, eAX, XX },
673 { "movs{b||b|}", Yb, Xb, XX },
674 { "movs{R||R|}", Yv, Xv, XX },
675 { "cmps{b||b|}", Xb, Yb, XX },
676 { "cmps{R||R|}", Xv, Yv, XX },
678 { "testB", AL, Ib, XX },
679 { "testS", eAX, Iv, XX },
680 { "stosB", Yb, AL, XX },
681 { "stosS", Yv, eAX, XX },
682 { "lodsB", AL, Xb, XX },
683 { "lodsS", eAX, Xv, XX },
684 { "scasB", AL, Yb, XX },
685 { "scasS", eAX, Yv, XX },
687 { "movB", RMAL, Ib, XX },
688 { "movB", RMCL, Ib, XX },
689 { "movB", RMDL, Ib, XX },
690 { "movB", RMBL, Ib, XX },
691 { "movB", RMAH, Ib, XX },
692 { "movB", RMCH, Ib, XX },
693 { "movB", RMDH, Ib, XX },
694 { "movB", RMBH, Ib, XX },
696 { "movS", RMeAX, Iv64, XX },
697 { "movS", RMeCX, Iv64, XX },
698 { "movS", RMeDX, Iv64, XX },
699 { "movS", RMeBX, Iv64, XX },
700 { "movS", RMeSP, Iv64, XX },
701 { "movS", RMeBP, Iv64, XX },
702 { "movS", RMeSI, Iv64, XX },
703 { "movS", RMeDI, Iv64, XX },
707 { "retT", Iw, XX, XX },
708 { "retT", XX, XX, XX },
709 { "les{S|}", Gv, Mp, XX },
710 { "ldsS", Gv, Mp, XX },
711 { "movA", Eb, Ib, XX },
712 { "movQ", Ev, Iv, XX },
714 { "enterT", Iw, Ib, XX },
715 { "leaveT", XX, XX, XX },
716 { "lretP", Iw, XX, XX },
717 { "lretP", XX, XX, XX },
718 { "int3", XX, XX, XX },
719 { "int", Ib, XX, XX },
720 { "into{|}", XX, XX, XX },
721 { "iretP", XX, XX, XX },
727 { "aam{|}", sIb, XX, XX },
728 { "aad{|}", sIb, XX, XX },
729 { "(bad)", XX, XX, XX },
730 { "xlat", DSBX, XX, XX },
741 { "loopneFH", Jb, XX, loop_jcxz_flag },
742 { "loopeFH", Jb, XX, loop_jcxz_flag },
743 { "loopFH", Jb, XX, loop_jcxz_flag },
744 { "jEcxzH", Jb, XX, loop_jcxz_flag },
745 { "inB", AL, Ib, XX },
746 { "inS", eAX, Ib, XX },
747 { "outB", Ib, AL, XX },
748 { "outS", Ib, eAX, XX },
750 { "callT", Jv, XX, XX },
751 { "jmpT", Jv, XX, XX },
752 { "Jjmp{T|}", Ap, XX, XX },
753 { "jmp", Jb, XX, XX },
754 { "inB", AL, indirDX, XX },
755 { "inS", eAX, indirDX, XX },
756 { "outB", indirDX, AL, XX },
757 { "outS", indirDX, eAX, XX },
759 { "(bad)", XX, XX, XX }, /* lock prefix */
760 { "icebp", XX, XX, XX },
761 { "(bad)", XX, XX, XX }, /* repne */
762 { "(bad)", XX, XX, XX }, /* repz */
763 { "hlt", XX, XX, XX },
764 { "cmc", XX, XX, XX },
768 { "clc", XX, XX, XX },
769 { "stc", XX, XX, XX },
770 { "cli", XX, XX, XX },
771 { "sti", XX, XX, XX },
772 { "cld", XX, XX, XX },
773 { "std", XX, XX, XX },
778 static const struct dis386 dis386_twobyte[] = {
782 { "larS", Gv, Ew, XX },
783 { "lslS", Gv, Ew, XX },
784 { "(bad)", XX, XX, XX },
785 { "syscall", XX, XX, XX },
786 { "clts", XX, XX, XX },
787 { "sysretP", XX, XX, XX },
789 { "invd", XX, XX, XX },
790 { "wbinvd", XX, XX, XX },
791 { "(bad)", XX, XX, XX },
792 { "ud2a", XX, XX, XX },
793 { "(bad)", XX, XX, XX },
795 { "femms", XX, XX, XX },
796 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */
801 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
802 { "unpcklpX", XM, EX, XX },
803 { "unpckhpX", XM, EX, XX },
805 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
808 { "(bad)", XX, XX, XX },
809 { "(bad)", XX, XX, XX },
810 { "(bad)", XX, XX, XX },
811 { "(bad)", XX, XX, XX },
812 { "(bad)", XX, XX, XX },
813 { "(bad)", XX, XX, XX },
814 { "(bad)", XX, XX, XX },
816 { "movL", Rm, Cm, XX },
817 { "movL", Rm, Dm, XX },
818 { "movL", Cm, Rm, XX },
819 { "movL", Dm, Rm, XX },
820 { "movL", Rd, Td, XX },
821 { "(bad)", XX, XX, XX },
822 { "movL", Td, Rd, XX },
823 { "(bad)", XX, XX, XX },
825 { "movapX", XM, EX, XX },
826 { "movapX", EX, XM, XX },
828 { "movntpX", Ev, XM, XX },
831 { "ucomisX", XM,EX, XX },
832 { "comisX", XM,EX, XX },
834 { "wrmsr", XX, XX, XX },
835 { "rdtsc", XX, XX, XX },
836 { "rdmsr", XX, XX, XX },
837 { "rdpmc", XX, XX, XX },
838 { "sysenter", XX, XX, XX },
839 { "sysexit", XX, XX, XX },
840 { "(bad)", XX, XX, XX },
841 { "(bad)", XX, XX, XX },
843 { "(bad)", XX, XX, XX },
844 { "(bad)", XX, XX, XX },
845 { "(bad)", XX, XX, XX },
846 { "(bad)", XX, XX, XX },
847 { "(bad)", XX, XX, XX },
848 { "(bad)", XX, XX, XX },
849 { "(bad)", XX, XX, XX },
850 { "(bad)", XX, XX, XX },
852 { "cmovo", Gv, Ev, XX },
853 { "cmovno", Gv, Ev, XX },
854 { "cmovb", Gv, Ev, XX },
855 { "cmovae", Gv, Ev, XX },
856 { "cmove", Gv, Ev, XX },
857 { "cmovne", Gv, Ev, XX },
858 { "cmovbe", Gv, Ev, XX },
859 { "cmova", Gv, Ev, XX },
861 { "cmovs", Gv, Ev, XX },
862 { "cmovns", Gv, Ev, XX },
863 { "cmovp", Gv, Ev, XX },
864 { "cmovnp", Gv, Ev, XX },
865 { "cmovl", Gv, Ev, XX },
866 { "cmovge", Gv, Ev, XX },
867 { "cmovle", Gv, Ev, XX },
868 { "cmovg", Gv, Ev, XX },
870 { "movmskpX", Gdq, XS, XX },
874 { "andpX", XM, EX, XX },
875 { "andnpX", XM, EX, XX },
876 { "orpX", XM, EX, XX },
877 { "xorpX", XM, EX, XX },
888 { "punpcklbw", MX, EM, XX },
889 { "punpcklwd", MX, EM, XX },
890 { "punpckldq", MX, EM, XX },
891 { "packsswb", MX, EM, XX },
892 { "pcmpgtb", MX, EM, XX },
893 { "pcmpgtw", MX, EM, XX },
894 { "pcmpgtd", MX, EM, XX },
895 { "packuswb", MX, EM, XX },
897 { "punpckhbw", MX, EM, XX },
898 { "punpckhwd", MX, EM, XX },
899 { "punpckhdq", MX, EM, XX },
900 { "packssdw", MX, EM, XX },
903 { "movd", MX, Edq, XX },
910 { "pcmpeqb", MX, EM, XX },
911 { "pcmpeqw", MX, EM, XX },
912 { "pcmpeqd", MX, EM, XX },
913 { "emms", XX, XX, XX },
915 { "(bad)", XX, XX, XX },
916 { "(bad)", XX, XX, XX },
917 { "(bad)", XX, XX, XX },
918 { "(bad)", XX, XX, XX },
924 { "joH", Jv, XX, cond_jump_flag },
925 { "jnoH", Jv, XX, cond_jump_flag },
926 { "jbH", Jv, XX, cond_jump_flag },
927 { "jaeH", Jv, XX, cond_jump_flag },
928 { "jeH", Jv, XX, cond_jump_flag },
929 { "jneH", Jv, XX, cond_jump_flag },
930 { "jbeH", Jv, XX, cond_jump_flag },
931 { "jaH", Jv, XX, cond_jump_flag },
933 { "jsH", Jv, XX, cond_jump_flag },
934 { "jnsH", Jv, XX, cond_jump_flag },
935 { "jpH", Jv, XX, cond_jump_flag },
936 { "jnpH", Jv, XX, cond_jump_flag },
937 { "jlH", Jv, XX, cond_jump_flag },
938 { "jgeH", Jv, XX, cond_jump_flag },
939 { "jleH", Jv, XX, cond_jump_flag },
940 { "jgH", Jv, XX, cond_jump_flag },
942 { "seto", Eb, XX, XX },
943 { "setno", Eb, XX, XX },
944 { "setb", Eb, XX, XX },
945 { "setae", Eb, XX, XX },
946 { "sete", Eb, XX, XX },
947 { "setne", Eb, XX, XX },
948 { "setbe", Eb, XX, XX },
949 { "seta", Eb, XX, XX },
951 { "sets", Eb, XX, XX },
952 { "setns", Eb, XX, XX },
953 { "setp", Eb, XX, XX },
954 { "setnp", Eb, XX, XX },
955 { "setl", Eb, XX, XX },
956 { "setge", Eb, XX, XX },
957 { "setle", Eb, XX, XX },
958 { "setg", Eb, XX, XX },
960 { "pushT", fs, XX, XX },
961 { "popT", fs, XX, XX },
962 { "cpuid", XX, XX, XX },
963 { "btS", Ev, Gv, XX },
964 { "shldS", Ev, Gv, Ib },
965 { "shldS", Ev, Gv, CL },
969 { "pushT", gs, XX, XX },
970 { "popT", gs, XX, XX },
971 { "rsm", XX, XX, XX },
972 { "btsS", Ev, Gv, XX },
973 { "shrdS", Ev, Gv, Ib },
974 { "shrdS", Ev, Gv, CL },
976 { "imulS", Gv, Ev, XX },
978 { "cmpxchgB", Eb, Gb, XX },
979 { "cmpxchgS", Ev, Gv, XX },
980 { "lssS", Gv, Mp, XX },
981 { "btrS", Ev, Gv, XX },
982 { "lfsS", Gv, Mp, XX },
983 { "lgsS", Gv, Mp, XX },
984 { "movz{bR|x|bR|x}", Gv, Eb, XX },
985 { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */
987 { "(bad)", XX, XX, XX },
988 { "ud2b", XX, XX, XX },
990 { "btcS", Ev, Gv, XX },
991 { "bsfS", Gv, Ev, XX },
992 { "bsrS", Gv, Ev, XX },
993 { "movs{bR|x|bR|x}", Gv, Eb, XX },
994 { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */
996 { "xaddB", Eb, Gb, XX },
997 { "xaddS", Ev, Gv, XX },
999 { "movntiS", Ev, Gv, XX },
1000 { "pinsrw", MX, Edqw, Ib },
1001 { "pextrw", Gdq, MS, Ib },
1002 { "shufpX", XM, EX, Ib },
1005 { "bswap", RMeAX, XX, XX },
1006 { "bswap", RMeCX, XX, XX },
1007 { "bswap", RMeDX, XX, XX },
1008 { "bswap", RMeBX, XX, XX },
1009 { "bswap", RMeSP, XX, XX },
1010 { "bswap", RMeBP, XX, XX },
1011 { "bswap", RMeSI, XX, XX },
1012 { "bswap", RMeDI, XX, XX },
1015 { "psrlw", MX, EM, XX },
1016 { "psrld", MX, EM, XX },
1017 { "psrlq", MX, EM, XX },
1018 { "paddq", MX, EM, XX },
1019 { "pmullw", MX, EM, XX },
1021 { "pmovmskb", Gdq, MS, XX },
1023 { "psubusb", MX, EM, XX },
1024 { "psubusw", MX, EM, XX },
1025 { "pminub", MX, EM, XX },
1026 { "pand", MX, EM, XX },
1027 { "paddusb", MX, EM, XX },
1028 { "paddusw", MX, EM, XX },
1029 { "pmaxub", MX, EM, XX },
1030 { "pandn", MX, EM, XX },
1032 { "pavgb", MX, EM, XX },
1033 { "psraw", MX, EM, XX },
1034 { "psrad", MX, EM, XX },
1035 { "pavgw", MX, EM, XX },
1036 { "pmulhuw", MX, EM, XX },
1037 { "pmulhw", MX, EM, XX },
1041 { "psubsb", MX, EM, XX },
1042 { "psubsw", MX, EM, XX },
1043 { "pminsw", MX, EM, XX },
1044 { "por", MX, EM, XX },
1045 { "paddsb", MX, EM, XX },
1046 { "paddsw", MX, EM, XX },
1047 { "pmaxsw", MX, EM, XX },
1048 { "pxor", MX, EM, XX },
1051 { "psllw", MX, EM, XX },
1052 { "pslld", MX, EM, XX },
1053 { "psllq", MX, EM, XX },
1054 { "pmuludq", MX, EM, XX },
1055 { "pmaddwd", MX, EM, XX },
1056 { "psadbw", MX, EM, XX },
1059 { "psubb", MX, EM, XX },
1060 { "psubw", MX, EM, XX },
1061 { "psubd", MX, EM, XX },
1062 { "psubq", MX, EM, XX },
1063 { "paddb", MX, EM, XX },
1064 { "paddw", MX, EM, XX },
1065 { "paddd", MX, EM, XX },
1066 { "(bad)", XX, XX, XX }
1069 static const unsigned char onebyte_has_modrm[256] = {
1070 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1071 /* ------------------------------- */
1072 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1073 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1074 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1075 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1076 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1077 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1078 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1079 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1080 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1081 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1082 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1083 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1084 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1085 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1086 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1087 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1088 /* ------------------------------- */
1089 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1092 static const unsigned char twobyte_has_modrm[256] = {
1093 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1094 /* ------------------------------- */
1095 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1096 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
1097 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1098 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1099 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1100 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1101 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1102 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,1,1,1,1, /* 7f */
1103 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1104 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1105 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1106 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
1107 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1108 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1109 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1110 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1111 /* ------------------------------- */
1112 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1115 static const unsigned char twobyte_uses_SSE_prefix[256] = {
1116 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1117 /* ------------------------------- */
1118 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1119 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1120 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
1121 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1122 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1123 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1124 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1125 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1, /* 7f */
1126 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1127 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1128 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1129 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1130 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1131 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1132 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1133 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1134 /* ------------------------------- */
1135 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1138 static char obuf[100];
1140 static char scratchbuf[100];
1141 static unsigned char *start_codep;
1142 static unsigned char *insn_codep;
1143 static unsigned char *codep;
1144 static disassemble_info *the_info;
1148 static unsigned char need_modrm;
1150 /* If we are accessing mod/rm/reg without need_modrm set, then the
1151 values are stale. Hitting this abort likely indicates that you
1152 need to update onebyte_has_modrm or twobyte_has_modrm. */
1153 #define MODRM_CHECK if (!need_modrm) abort ()
1155 static const char **names64;
1156 static const char **names32;
1157 static const char **names16;
1158 static const char **names8;
1159 static const char **names8rex;
1160 static const char **names_seg;
1161 static const char **index16;
1163 static const char *intel_names64[] = {
1164 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1165 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1167 static const char *intel_names32[] = {
1168 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1169 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1171 static const char *intel_names16[] = {
1172 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1173 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1175 static const char *intel_names8[] = {
1176 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1178 static const char *intel_names8rex[] = {
1179 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1180 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1182 static const char *intel_names_seg[] = {
1183 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1185 static const char *intel_index16[] = {
1186 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1189 static const char *att_names64[] = {
1190 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1191 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1193 static const char *att_names32[] = {
1194 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1195 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1197 static const char *att_names16[] = {
1198 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1199 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1201 static const char *att_names8[] = {
1202 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1204 static const char *att_names8rex[] = {
1205 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1206 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1208 static const char *att_names_seg[] = {
1209 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1211 static const char *att_index16[] = {
1212 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1215 static const struct dis386 grps[][8] = {
1218 { "addA", Eb, Ib, XX },
1219 { "orA", Eb, Ib, XX },
1220 { "adcA", Eb, Ib, XX },
1221 { "sbbA", Eb, Ib, XX },
1222 { "andA", Eb, Ib, XX },
1223 { "subA", Eb, Ib, XX },
1224 { "xorA", Eb, Ib, XX },
1225 { "cmpA", Eb, Ib, XX }
1229 { "addQ", Ev, Iv, XX },
1230 { "orQ", Ev, Iv, XX },
1231 { "adcQ", Ev, Iv, XX },
1232 { "sbbQ", Ev, Iv, XX },
1233 { "andQ", Ev, Iv, XX },
1234 { "subQ", Ev, Iv, XX },
1235 { "xorQ", Ev, Iv, XX },
1236 { "cmpQ", Ev, Iv, XX }
1240 { "addQ", Ev, sIb, XX },
1241 { "orQ", Ev, sIb, XX },
1242 { "adcQ", Ev, sIb, XX },
1243 { "sbbQ", Ev, sIb, XX },
1244 { "andQ", Ev, sIb, XX },
1245 { "subQ", Ev, sIb, XX },
1246 { "xorQ", Ev, sIb, XX },
1247 { "cmpQ", Ev, sIb, XX }
1251 { "rolA", Eb, Ib, XX },
1252 { "rorA", Eb, Ib, XX },
1253 { "rclA", Eb, Ib, XX },
1254 { "rcrA", Eb, Ib, XX },
1255 { "shlA", Eb, Ib, XX },
1256 { "shrA", Eb, Ib, XX },
1257 { "(bad)", XX, XX, XX },
1258 { "sarA", Eb, Ib, XX },
1262 { "rolQ", Ev, Ib, XX },
1263 { "rorQ", Ev, Ib, XX },
1264 { "rclQ", Ev, Ib, XX },
1265 { "rcrQ", Ev, Ib, XX },
1266 { "shlQ", Ev, Ib, XX },
1267 { "shrQ", Ev, Ib, XX },
1268 { "(bad)", XX, XX, XX },
1269 { "sarQ", Ev, Ib, XX },
1273 { "rolA", Eb, I1, XX },
1274 { "rorA", Eb, I1, XX },
1275 { "rclA", Eb, I1, XX },
1276 { "rcrA", Eb, I1, XX },
1277 { "shlA", Eb, I1, XX },
1278 { "shrA", Eb, I1, XX },
1279 { "(bad)", XX, XX, XX },
1280 { "sarA", Eb, I1, XX },
1284 { "rolQ", Ev, I1, XX },
1285 { "rorQ", Ev, I1, XX },
1286 { "rclQ", Ev, I1, XX },
1287 { "rcrQ", Ev, I1, XX },
1288 { "shlQ", Ev, I1, XX },
1289 { "shrQ", Ev, I1, XX },
1290 { "(bad)", XX, XX, XX},
1291 { "sarQ", Ev, I1, XX },
1295 { "rolA", Eb, CL, XX },
1296 { "rorA", Eb, CL, XX },
1297 { "rclA", Eb, CL, XX },
1298 { "rcrA", Eb, CL, XX },
1299 { "shlA", Eb, CL, XX },
1300 { "shrA", Eb, CL, XX },
1301 { "(bad)", XX, XX, XX },
1302 { "sarA", Eb, CL, XX },
1306 { "rolQ", Ev, CL, XX },
1307 { "rorQ", Ev, CL, XX },
1308 { "rclQ", Ev, CL, XX },
1309 { "rcrQ", Ev, CL, XX },
1310 { "shlQ", Ev, CL, XX },
1311 { "shrQ", Ev, CL, XX },
1312 { "(bad)", XX, XX, XX },
1313 { "sarQ", Ev, CL, XX }
1317 { "testA", Eb, Ib, XX },
1318 { "(bad)", Eb, XX, XX },
1319 { "notA", Eb, XX, XX },
1320 { "negA", Eb, XX, XX },
1321 { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */
1322 { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */
1323 { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */
1324 { "idivA", Eb, XX, XX } /* and idiv for consistency. */
1328 { "testQ", Ev, Iv, XX },
1329 { "(bad)", XX, XX, XX },
1330 { "notQ", Ev, XX, XX },
1331 { "negQ", Ev, XX, XX },
1332 { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */
1333 { "imulQ", Ev, XX, XX },
1334 { "divQ", Ev, XX, XX },
1335 { "idivQ", Ev, XX, XX },
1339 { "incA", Eb, XX, XX },
1340 { "decA", Eb, XX, XX },
1341 { "(bad)", XX, XX, XX },
1342 { "(bad)", XX, XX, XX },
1343 { "(bad)", XX, XX, XX },
1344 { "(bad)", XX, XX, XX },
1345 { "(bad)", XX, XX, XX },
1346 { "(bad)", XX, XX, XX },
1350 { "incQ", Ev, XX, XX },
1351 { "decQ", Ev, XX, XX },
1352 { "callT", indirEv, XX, XX },
1353 { "JcallT", indirEp, XX, XX },
1354 { "jmpT", indirEv, XX, XX },
1355 { "JjmpT", indirEp, XX, XX },
1356 { "pushU", Ev, XX, XX },
1357 { "(bad)", XX, XX, XX },
1361 { "sldtQ", Ev, XX, XX },
1362 { "strQ", Ev, XX, XX },
1363 { "lldt", Ew, XX, XX },
1364 { "ltr", Ew, XX, XX },
1365 { "verr", Ew, XX, XX },
1366 { "verw", Ew, XX, XX },
1367 { "(bad)", XX, XX, XX },
1368 { "(bad)", XX, XX, XX }
1372 { "sgdtIQ", M, XX, XX },
1373 { "sidtIQ", PNI_Fixup, 0, XX, XX },
1374 { "lgdt{Q|Q||}", M, XX, XX },
1375 { "lidt{Q|Q||}", M, XX, XX },
1376 { "smswQ", Ev, XX, XX },
1377 { "(bad)", XX, XX, XX },
1378 { "lmsw", Ew, XX, XX },
1379 { "invlpg", INVLPG_Fixup, w_mode, XX, XX },
1383 { "(bad)", XX, XX, XX },
1384 { "(bad)", XX, XX, XX },
1385 { "(bad)", XX, XX, XX },
1386 { "(bad)", XX, XX, XX },
1387 { "btQ", Ev, Ib, XX },
1388 { "btsQ", Ev, Ib, XX },
1389 { "btrQ", Ev, Ib, XX },
1390 { "btcQ", Ev, Ib, XX },
1394 { "(bad)", XX, XX, XX },
1395 { "cmpxchg8b", Eq, XX, XX },
1396 { "(bad)", XX, XX, XX },
1397 { "(bad)", XX, XX, XX },
1398 { "(bad)", XX, XX, XX },
1399 { "(bad)", XX, XX, XX },
1400 { "(bad)", XX, XX, XX },
1401 { "(bad)", XX, XX, XX },
1405 { "(bad)", XX, XX, XX },
1406 { "(bad)", XX, XX, XX },
1407 { "psrlw", MS, Ib, XX },
1408 { "(bad)", XX, XX, XX },
1409 { "psraw", MS, Ib, XX },
1410 { "(bad)", XX, XX, XX },
1411 { "psllw", MS, Ib, XX },
1412 { "(bad)", XX, XX, XX },
1416 { "(bad)", XX, XX, XX },
1417 { "(bad)", XX, XX, XX },
1418 { "psrld", MS, Ib, XX },
1419 { "(bad)", XX, XX, XX },
1420 { "psrad", MS, Ib, XX },
1421 { "(bad)", XX, XX, XX },
1422 { "pslld", MS, Ib, XX },
1423 { "(bad)", XX, XX, XX },
1427 { "(bad)", XX, XX, XX },
1428 { "(bad)", XX, XX, XX },
1429 { "psrlq", MS, Ib, XX },
1430 { "psrldq", MS, Ib, XX },
1431 { "(bad)", XX, XX, XX },
1432 { "(bad)", XX, XX, XX },
1433 { "psllq", MS, Ib, XX },
1434 { "pslldq", MS, Ib, XX },
1438 { "fxsave", Ev, XX, XX },
1439 { "fxrstor", Ev, XX, XX },
1440 { "ldmxcsr", Ev, XX, XX },
1441 { "stmxcsr", Ev, XX, XX },
1442 { "(bad)", XX, XX, XX },
1443 { "lfence", OP_0fae, 0, XX, XX },
1444 { "mfence", OP_0fae, 0, XX, XX },
1445 { "clflush", OP_0fae, 0, XX, XX },
1449 { "prefetchnta", Ev, XX, XX },
1450 { "prefetcht0", Ev, XX, XX },
1451 { "prefetcht1", Ev, XX, XX },
1452 { "prefetcht2", Ev, XX, XX },
1453 { "(bad)", XX, XX, XX },
1454 { "(bad)", XX, XX, XX },
1455 { "(bad)", XX, XX, XX },
1456 { "(bad)", XX, XX, XX },
1460 { "prefetch", Eb, XX, XX },
1461 { "prefetchw", Eb, XX, XX },
1462 { "(bad)", XX, XX, XX },
1463 { "(bad)", XX, XX, XX },
1464 { "(bad)", XX, XX, XX },
1465 { "(bad)", XX, XX, XX },
1466 { "(bad)", XX, XX, XX },
1467 { "(bad)", XX, XX, XX },
1471 { "xstorerng", OP_0f07, 0, XX, XX },
1472 { "xcryptecb", OP_0f07, 0, XX, XX },
1473 { "xcryptcbc", OP_0f07, 0, XX, XX },
1474 { "(bad)", OP_0f07, 0, XX, XX },
1475 { "xcryptcfb", OP_0f07, 0, XX, XX },
1476 { "xcryptofb", OP_0f07, 0, XX, XX },
1477 { "(bad)", OP_0f07, 0, XX, XX },
1478 { "(bad)", OP_0f07, 0, XX, XX },
1482 { "montmul", OP_0f07, 0, XX, XX },
1483 { "xsha1", OP_0f07, 0, XX, XX },
1484 { "xsha256", OP_0f07, 0, XX, XX },
1485 { "(bad)", OP_0f07, 0, XX, XX },
1486 { "(bad)", OP_0f07, 0, XX, XX },
1487 { "(bad)", OP_0f07, 0, XX, XX },
1488 { "(bad)", OP_0f07, 0, XX, XX },
1489 { "(bad)", OP_0f07, 0, XX, XX },
1493 static const struct dis386 prefix_user_table[][4] = {
1496 { "addps", XM, EX, XX },
1497 { "addss", XM, EX, XX },
1498 { "addpd", XM, EX, XX },
1499 { "addsd", XM, EX, XX },
1503 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */
1504 { "", XM, EX, OPSIMD },
1505 { "", XM, EX, OPSIMD },
1506 { "", XM, EX, OPSIMD },
1510 { "cvtpi2ps", XM, EM, XX },
1511 { "cvtsi2ssY", XM, Ev, XX },
1512 { "cvtpi2pd", XM, EM, XX },
1513 { "cvtsi2sdY", XM, Ev, XX },
1517 { "cvtps2pi", MX, EX, XX },
1518 { "cvtss2siY", Gv, EX, XX },
1519 { "cvtpd2pi", MX, EX, XX },
1520 { "cvtsd2siY", Gv, EX, XX },
1524 { "cvttps2pi", MX, EX, XX },
1525 { "cvttss2siY", Gv, EX, XX },
1526 { "cvttpd2pi", MX, EX, XX },
1527 { "cvttsd2siY", Gv, EX, XX },
1531 { "divps", XM, EX, XX },
1532 { "divss", XM, EX, XX },
1533 { "divpd", XM, EX, XX },
1534 { "divsd", XM, EX, XX },
1538 { "maxps", XM, EX, XX },
1539 { "maxss", XM, EX, XX },
1540 { "maxpd", XM, EX, XX },
1541 { "maxsd", XM, EX, XX },
1545 { "minps", XM, EX, XX },
1546 { "minss", XM, EX, XX },
1547 { "minpd", XM, EX, XX },
1548 { "minsd", XM, EX, XX },
1552 { "movups", XM, EX, XX },
1553 { "movss", XM, EX, XX },
1554 { "movupd", XM, EX, XX },
1555 { "movsd", XM, EX, XX },
1559 { "movups", EX, XM, XX },
1560 { "movss", EX, XM, XX },
1561 { "movupd", EX, XM, XX },
1562 { "movsd", EX, XM, XX },
1566 { "mulps", XM, EX, XX },
1567 { "mulss", XM, EX, XX },
1568 { "mulpd", XM, EX, XX },
1569 { "mulsd", XM, EX, XX },
1573 { "rcpps", XM, EX, XX },
1574 { "rcpss", XM, EX, XX },
1575 { "(bad)", XM, EX, XX },
1576 { "(bad)", XM, EX, XX },
1580 { "rsqrtps", XM, EX, XX },
1581 { "rsqrtss", XM, EX, XX },
1582 { "(bad)", XM, EX, XX },
1583 { "(bad)", XM, EX, XX },
1587 { "sqrtps", XM, EX, XX },
1588 { "sqrtss", XM, EX, XX },
1589 { "sqrtpd", XM, EX, XX },
1590 { "sqrtsd", XM, EX, XX },
1594 { "subps", XM, EX, XX },
1595 { "subss", XM, EX, XX },
1596 { "subpd", XM, EX, XX },
1597 { "subsd", XM, EX, XX },
1601 { "(bad)", XM, EX, XX },
1602 { "cvtdq2pd", XM, EX, XX },
1603 { "cvttpd2dq", XM, EX, XX },
1604 { "cvtpd2dq", XM, EX, XX },
1608 { "cvtdq2ps", XM, EX, XX },
1609 { "cvttps2dq",XM, EX, XX },
1610 { "cvtps2dq",XM, EX, XX },
1611 { "(bad)", XM, EX, XX },
1615 { "cvtps2pd", XM, EX, XX },
1616 { "cvtss2sd", XM, EX, XX },
1617 { "cvtpd2ps", XM, EX, XX },
1618 { "cvtsd2ss", XM, EX, XX },
1622 { "maskmovq", MX, MS, XX },
1623 { "(bad)", XM, EX, XX },
1624 { "maskmovdqu", XM, EX, XX },
1625 { "(bad)", XM, EX, XX },
1629 { "movq", MX, EM, XX },
1630 { "movdqu", XM, EX, XX },
1631 { "movdqa", XM, EX, XX },
1632 { "(bad)", XM, EX, XX },
1636 { "movq", EM, MX, XX },
1637 { "movdqu", EX, XM, XX },
1638 { "movdqa", EX, XM, XX },
1639 { "(bad)", EX, XM, XX },
1643 { "(bad)", EX, XM, XX },
1644 { "movq2dq", XM, MS, XX },
1645 { "movq", EX, XM, XX },
1646 { "movdq2q", MX, XS, XX },
1650 { "pshufw", MX, EM, Ib },
1651 { "pshufhw", XM, EX, Ib },
1652 { "pshufd", XM, EX, Ib },
1653 { "pshuflw", XM, EX, Ib },
1657 { "movd", Edq, MX, XX },
1658 { "movq", XM, EX, XX },
1659 { "movd", Edq, XM, XX },
1660 { "(bad)", Ed, XM, XX },
1664 { "(bad)", MX, EX, XX },
1665 { "(bad)", XM, EX, XX },
1666 { "punpckhqdq", XM, EX, XX },
1667 { "(bad)", XM, EX, XX },
1671 { "movntq", EM, MX, XX },
1672 { "(bad)", EM, XM, XX },
1673 { "movntdq", EM, XM, XX },
1674 { "(bad)", EM, XM, XX },
1678 { "(bad)", MX, EX, XX },
1679 { "(bad)", XM, EX, XX },
1680 { "punpcklqdq", XM, EX, XX },
1681 { "(bad)", XM, EX, XX },
1685 { "(bad)", MX, EX, XX },
1686 { "(bad)", XM, EX, XX },
1687 { "addsubpd", XM, EX, XX },
1688 { "addsubps", XM, EX, XX },
1692 { "(bad)", MX, EX, XX },
1693 { "(bad)", XM, EX, XX },
1694 { "haddpd", XM, EX, XX },
1695 { "haddps", XM, EX, XX },
1699 { "(bad)", MX, EX, XX },
1700 { "(bad)", XM, EX, XX },
1701 { "hsubpd", XM, EX, XX },
1702 { "hsubps", XM, EX, XX },
1706 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1707 { "movsldup", XM, EX, XX },
1708 { "movlpd", XM, EX, XX },
1709 { "movddup", XM, EX, XX },
1713 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
1714 { "movshdup", XM, EX, XX },
1715 { "movhpd", XM, EX, XX },
1716 { "(bad)", XM, EX, XX },
1720 { "(bad)", XM, EX, XX },
1721 { "(bad)", XM, EX, XX },
1722 { "(bad)", XM, EX, XX },
1723 { "lddqu", XM, M, XX },
1727 static const struct dis386 x86_64_table[][2] = {
1729 { "arpl", Ew, Gw, XX },
1730 { "movs{||lq|xd}", Gv, Ed, XX },
1734 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1746 FETCH_DATA (the_info, codep + 1);
1750 /* REX prefixes family. */
1773 prefixes |= PREFIX_REPZ;
1776 prefixes |= PREFIX_REPNZ;
1779 prefixes |= PREFIX_LOCK;
1782 prefixes |= PREFIX_CS;
1785 prefixes |= PREFIX_SS;
1788 prefixes |= PREFIX_DS;
1791 prefixes |= PREFIX_ES;
1794 prefixes |= PREFIX_FS;
1797 prefixes |= PREFIX_GS;
1800 prefixes |= PREFIX_DATA;
1803 prefixes |= PREFIX_ADDR;
1806 /* fwait is really an instruction. If there are prefixes
1807 before the fwait, they belong to the fwait, *not* to the
1808 following instruction. */
1811 prefixes |= PREFIX_FWAIT;
1815 prefixes = PREFIX_FWAIT;
1820 /* Rex is ignored when followed by another prefix. */
1823 oappend (prefix_name (rex, 0));
1831 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
1835 prefix_name (int pref, int sizeflag)
1839 /* REX prefixes family. */
1891 return (sizeflag & DFLAG) ? "data16" : "data32";
1894 return (sizeflag & AFLAG) ? "addr32" : "addr64";
1896 return ((sizeflag & AFLAG) && !mode_64bit) ? "addr16" : "addr32";
1904 static char op1out[100], op2out[100], op3out[100];
1905 static int op_ad, op_index[3];
1906 static int two_source_ops;
1907 static bfd_vma op_address[3];
1908 static bfd_vma op_riprel[3];
1909 static bfd_vma start_pc;
1912 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1913 * (see topic "Redundant prefixes" in the "Differences from 8086"
1914 * section of the "Virtual 8086 Mode" chapter.)
1915 * 'pc' should be the address of this instruction, it will
1916 * be used to print the target address if this is a relative jump or call
1917 * The function returns the length of this instruction in bytes.
1920 static char intel_syntax;
1921 static char open_char;
1922 static char close_char;
1923 static char separator_char;
1924 static char scale_char;
1926 /* Here for backwards compatibility. When gdb stops using
1927 print_insn_i386_att and print_insn_i386_intel these functions can
1928 disappear, and print_insn_i386 be merged into print_insn. */
1930 print_insn_i386_att (bfd_vma pc, disassemble_info *info)
1934 return print_insn (pc, info);
1938 print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
1942 return print_insn (pc, info);
1946 print_insn_i386 (bfd_vma pc, disassemble_info *info)
1950 return print_insn (pc, info);
1954 print_insn (bfd_vma pc, disassemble_info *info)
1956 const struct dis386 *dp;
1958 char *first, *second, *third;
1960 unsigned char uses_SSE_prefix, uses_LOCK_prefix;
1963 struct dis_private priv;
1965 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax
1966 || info->mach == bfd_mach_x86_64);
1968 if (intel_syntax == (char) -1)
1969 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
1970 || info->mach == bfd_mach_x86_64_intel_syntax);
1972 if (info->mach == bfd_mach_i386_i386
1973 || info->mach == bfd_mach_x86_64
1974 || info->mach == bfd_mach_i386_i386_intel_syntax
1975 || info->mach == bfd_mach_x86_64_intel_syntax)
1976 priv.orig_sizeflag = AFLAG | DFLAG;
1977 else if (info->mach == bfd_mach_i386_i8086)
1978 priv.orig_sizeflag = 0;
1982 for (p = info->disassembler_options; p != NULL; )
1984 if (strncmp (p, "x86-64", 6) == 0)
1987 priv.orig_sizeflag = AFLAG | DFLAG;
1989 else if (strncmp (p, "i386", 4) == 0)
1992 priv.orig_sizeflag = AFLAG | DFLAG;
1994 else if (strncmp (p, "i8086", 5) == 0)
1997 priv.orig_sizeflag = 0;
1999 else if (strncmp (p, "intel", 5) == 0)
2003 else if (strncmp (p, "att", 3) == 0)
2007 else if (strncmp (p, "addr", 4) == 0)
2009 if (p[4] == '1' && p[5] == '6')
2010 priv.orig_sizeflag &= ~AFLAG;
2011 else if (p[4] == '3' && p[5] == '2')
2012 priv.orig_sizeflag |= AFLAG;
2014 else if (strncmp (p, "data", 4) == 0)
2016 if (p[4] == '1' && p[5] == '6')
2017 priv.orig_sizeflag &= ~DFLAG;
2018 else if (p[4] == '3' && p[5] == '2')
2019 priv.orig_sizeflag |= DFLAG;
2021 else if (strncmp (p, "suffix", 6) == 0)
2022 priv.orig_sizeflag |= SUFFIX_ALWAYS;
2024 p = strchr (p, ',');
2031 names64 = intel_names64;
2032 names32 = intel_names32;
2033 names16 = intel_names16;
2034 names8 = intel_names8;
2035 names8rex = intel_names8rex;
2036 names_seg = intel_names_seg;
2037 index16 = intel_index16;
2040 separator_char = '+';
2045 names64 = att_names64;
2046 names32 = att_names32;
2047 names16 = att_names16;
2048 names8 = att_names8;
2049 names8rex = att_names8rex;
2050 names_seg = att_names_seg;
2051 index16 = att_index16;
2054 separator_char = ',';
2058 /* The output looks better if we put 7 bytes on a line, since that
2059 puts most long word instructions on a single line. */
2060 info->bytes_per_line = 7;
2062 info->private_data = &priv;
2063 priv.max_fetched = priv.the_buffer;
2064 priv.insn_start = pc;
2071 op_index[0] = op_index[1] = op_index[2] = -1;
2075 start_codep = priv.the_buffer;
2076 codep = priv.the_buffer;
2078 if (setjmp (priv.bailout) != 0)
2082 /* Getting here means we tried for data but didn't get it. That
2083 means we have an incomplete instruction of some sort. Just
2084 print the first byte as a prefix or a .byte pseudo-op. */
2085 if (codep > priv.the_buffer)
2087 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2089 (*info->fprintf_func) (info->stream, "%s", name);
2092 /* Just print the first byte as a .byte instruction. */
2093 (*info->fprintf_func) (info->stream, ".byte 0x%x",
2094 (unsigned int) priv.the_buffer[0]);
2107 sizeflag = priv.orig_sizeflag;
2109 FETCH_DATA (info, codep + 1);
2110 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
2112 if ((prefixes & PREFIX_FWAIT)
2113 && ((*codep < 0xd8) || (*codep > 0xdf)))
2117 /* fwait not followed by floating point instruction. Print the
2118 first prefix, which is probably fwait itself. */
2119 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2121 name = INTERNAL_DISASSEMBLER_ERROR;
2122 (*info->fprintf_func) (info->stream, "%s", name);
2128 FETCH_DATA (info, codep + 2);
2129 dp = &dis386_twobyte[*++codep];
2130 need_modrm = twobyte_has_modrm[*codep];
2131 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
2132 uses_LOCK_prefix = (*codep & ~0x02) == 0x20;
2136 dp = &dis386[*codep];
2137 need_modrm = onebyte_has_modrm[*codep];
2138 uses_SSE_prefix = 0;
2139 uses_LOCK_prefix = 0;
2143 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
2146 used_prefixes |= PREFIX_REPZ;
2148 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
2151 used_prefixes |= PREFIX_REPNZ;
2153 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
2156 used_prefixes |= PREFIX_LOCK;
2159 if (prefixes & PREFIX_ADDR)
2162 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
2164 if ((sizeflag & AFLAG) || mode_64bit)
2165 oappend ("addr32 ");
2167 oappend ("addr16 ");
2168 used_prefixes |= PREFIX_ADDR;
2172 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
2175 if (dp->bytemode3 == cond_jump_mode
2176 && dp->bytemode1 == v_mode
2179 if (sizeflag & DFLAG)
2180 oappend ("data32 ");
2182 oappend ("data16 ");
2183 used_prefixes |= PREFIX_DATA;
2189 FETCH_DATA (info, codep + 1);
2190 mod = (*codep >> 6) & 3;
2191 reg = (*codep >> 3) & 7;
2195 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
2202 if (dp->name == NULL)
2204 switch (dp->bytemode1)
2207 dp = &grps[dp->bytemode2][reg];
2210 case USE_PREFIX_USER_TABLE:
2212 used_prefixes |= (prefixes & PREFIX_REPZ);
2213 if (prefixes & PREFIX_REPZ)
2217 used_prefixes |= (prefixes & PREFIX_DATA);
2218 if (prefixes & PREFIX_DATA)
2222 used_prefixes |= (prefixes & PREFIX_REPNZ);
2223 if (prefixes & PREFIX_REPNZ)
2227 dp = &prefix_user_table[dp->bytemode2][index];
2230 case X86_64_SPECIAL:
2231 dp = &x86_64_table[dp->bytemode2][mode_64bit];
2235 oappend (INTERNAL_DISASSEMBLER_ERROR);
2240 if (putop (dp->name, sizeflag) == 0)
2245 (*dp->op1) (dp->bytemode1, sizeflag);
2250 (*dp->op2) (dp->bytemode2, sizeflag);
2255 (*dp->op3) (dp->bytemode3, sizeflag);
2259 /* See if any prefixes were not used. If so, print the first one
2260 separately. If we don't do this, we'll wind up printing an
2261 instruction stream which does not precisely correspond to the
2262 bytes we are disassembling. */
2263 if ((prefixes & ~used_prefixes) != 0)
2267 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2269 name = INTERNAL_DISASSEMBLER_ERROR;
2270 (*info->fprintf_func) (info->stream, "%s", name);
2273 if (rex & ~rex_used)
2276 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
2278 name = INTERNAL_DISASSEMBLER_ERROR;
2279 (*info->fprintf_func) (info->stream, "%s ", name);
2282 obufp = obuf + strlen (obuf);
2283 for (i = strlen (obuf); i < 6; i++)
2286 (*info->fprintf_func) (info->stream, "%s", obuf);
2288 /* The enter and bound instructions are printed with operands in the same
2289 order as the intel book; everything else is printed in reverse order. */
2290 if (intel_syntax || two_source_ops)
2295 op_ad = op_index[0];
2296 op_index[0] = op_index[2];
2297 op_index[2] = op_ad;
2308 if (op_index[0] != -1 && !op_riprel[0])
2309 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
2311 (*info->fprintf_func) (info->stream, "%s", first);
2317 (*info->fprintf_func) (info->stream, ",");
2318 if (op_index[1] != -1 && !op_riprel[1])
2319 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
2321 (*info->fprintf_func) (info->stream, "%s", second);
2327 (*info->fprintf_func) (info->stream, ",");
2328 if (op_index[2] != -1 && !op_riprel[2])
2329 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
2331 (*info->fprintf_func) (info->stream, "%s", third);
2333 for (i = 0; i < 3; i++)
2334 if (op_index[i] != -1 && op_riprel[i])
2336 (*info->fprintf_func) (info->stream, " # ");
2337 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
2338 + op_address[op_index[i]]), info);
2340 return codep - priv.the_buffer;
2343 static const char *float_mem[] = {
2418 static const unsigned char float_mem_mode[] = {
2494 #define STi OP_STi, 0
2496 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
2497 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
2498 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
2499 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
2500 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
2501 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
2502 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
2503 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
2504 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
2506 static const struct dis386 float_reg[][8] = {
2509 { "fadd", ST, STi, XX },
2510 { "fmul", ST, STi, XX },
2511 { "fcom", STi, XX, XX },
2512 { "fcomp", STi, XX, XX },
2513 { "fsub", ST, STi, XX },
2514 { "fsubr", ST, STi, XX },
2515 { "fdiv", ST, STi, XX },
2516 { "fdivr", ST, STi, XX },
2520 { "fld", STi, XX, XX },
2521 { "fxch", STi, XX, XX },
2523 { "(bad)", XX, XX, XX },
2531 { "fcmovb", ST, STi, XX },
2532 { "fcmove", ST, STi, XX },
2533 { "fcmovbe",ST, STi, XX },
2534 { "fcmovu", ST, STi, XX },
2535 { "(bad)", XX, XX, XX },
2537 { "(bad)", XX, XX, XX },
2538 { "(bad)", XX, XX, XX },
2542 { "fcmovnb",ST, STi, XX },
2543 { "fcmovne",ST, STi, XX },
2544 { "fcmovnbe",ST, STi, XX },
2545 { "fcmovnu",ST, STi, XX },
2547 { "fucomi", ST, STi, XX },
2548 { "fcomi", ST, STi, XX },
2549 { "(bad)", XX, XX, XX },
2553 { "fadd", STi, ST, XX },
2554 { "fmul", STi, ST, XX },
2555 { "(bad)", XX, XX, XX },
2556 { "(bad)", XX, XX, XX },
2558 { "fsub", STi, ST, XX },
2559 { "fsubr", STi, ST, XX },
2560 { "fdiv", STi, ST, XX },
2561 { "fdivr", STi, ST, XX },
2563 { "fsubr", STi, ST, XX },
2564 { "fsub", STi, ST, XX },
2565 { "fdivr", STi, ST, XX },
2566 { "fdiv", STi, ST, XX },
2571 { "ffree", STi, XX, XX },
2572 { "(bad)", XX, XX, XX },
2573 { "fst", STi, XX, XX },
2574 { "fstp", STi, XX, XX },
2575 { "fucom", STi, XX, XX },
2576 { "fucomp", STi, XX, XX },
2577 { "(bad)", XX, XX, XX },
2578 { "(bad)", XX, XX, XX },
2582 { "faddp", STi, ST, XX },
2583 { "fmulp", STi, ST, XX },
2584 { "(bad)", XX, XX, XX },
2587 { "fsubp", STi, ST, XX },
2588 { "fsubrp", STi, ST, XX },
2589 { "fdivp", STi, ST, XX },
2590 { "fdivrp", STi, ST, XX },
2592 { "fsubrp", STi, ST, XX },
2593 { "fsubp", STi, ST, XX },
2594 { "fdivrp", STi, ST, XX },
2595 { "fdivp", STi, ST, XX },
2600 { "ffreep", STi, XX, XX },
2601 { "(bad)", XX, XX, XX },
2602 { "(bad)", XX, XX, XX },
2603 { "(bad)", XX, XX, XX },
2605 { "fucomip",ST, STi, XX },
2606 { "fcomip", ST, STi, XX },
2607 { "(bad)", XX, XX, XX },
2611 static char *fgrps[][8] = {
2614 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2619 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2624 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2629 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2634 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2639 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2644 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2645 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2650 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2655 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2660 dofloat (int sizeflag)
2662 const struct dis386 *dp;
2663 unsigned char floatop;
2665 floatop = codep[-1];
2669 int fp_indx = (floatop - 0xd8) * 8 + reg;
2671 putop (float_mem[fp_indx], sizeflag);
2673 OP_E (float_mem_mode[fp_indx], sizeflag);
2676 /* Skip mod/rm byte. */
2680 dp = &float_reg[floatop - 0xd8][reg];
2681 if (dp->name == NULL)
2683 putop (fgrps[dp->bytemode1][rm], sizeflag);
2685 /* Instruction fnstsw is only one with strange arg. */
2686 if (floatop == 0xdf && codep[-1] == 0xe0)
2687 strcpy (op1out, names16[0]);
2691 putop (dp->name, sizeflag);
2695 (*dp->op1) (dp->bytemode1, sizeflag);
2698 (*dp->op2) (dp->bytemode2, sizeflag);
2703 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2709 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2711 sprintf (scratchbuf, "%%st(%d)", rm);
2712 oappend (scratchbuf + intel_syntax);
2715 /* Capital letters in template are macros. */
2717 putop (const char *template, int sizeflag)
2722 for (p = template; *p; p++)
2741 /* Alternative not valid. */
2742 strcpy (obuf, "(bad)");
2746 else if (*p == '\0')
2767 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2773 if (sizeflag & SUFFIX_ALWAYS)
2777 if (intel_syntax && !alt)
2779 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
2781 if (sizeflag & DFLAG)
2782 *obufp++ = intel_syntax ? 'd' : 'l';
2784 *obufp++ = intel_syntax ? 'w' : 's';
2785 used_prefixes |= (prefixes & PREFIX_DATA);
2788 case 'E': /* For jcxz/jecxz */
2791 if (sizeflag & AFLAG)
2797 if (sizeflag & AFLAG)
2799 used_prefixes |= (prefixes & PREFIX_ADDR);
2804 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
2806 if (sizeflag & AFLAG)
2807 *obufp++ = mode_64bit ? 'q' : 'l';
2809 *obufp++ = mode_64bit ? 'l' : 'w';
2810 used_prefixes |= (prefixes & PREFIX_ADDR);
2816 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
2817 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
2819 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
2822 if (prefixes & PREFIX_DS)
2836 if (sizeflag & SUFFIX_ALWAYS)
2840 if ((prefixes & PREFIX_FWAIT) == 0)
2843 used_prefixes |= PREFIX_FWAIT;
2846 USED_REX (REX_MODE64);
2847 if (rex & REX_MODE64)
2864 if ((prefixes & PREFIX_DATA)
2865 || (rex & REX_MODE64)
2866 || (sizeflag & SUFFIX_ALWAYS))
2868 USED_REX (REX_MODE64);
2869 if (rex & REX_MODE64)
2873 if (sizeflag & DFLAG)
2877 used_prefixes |= (prefixes & PREFIX_DATA);
2891 if (intel_syntax && !alt)
2893 USED_REX (REX_MODE64);
2894 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2896 if (rex & REX_MODE64)
2900 if (sizeflag & DFLAG)
2901 *obufp++ = intel_syntax ? 'd' : 'l';
2904 used_prefixes |= (prefixes & PREFIX_DATA);
2909 USED_REX (REX_MODE64);
2912 if (rex & REX_MODE64)
2917 else if (sizeflag & DFLAG)
2930 if (rex & REX_MODE64)
2932 else if (sizeflag & DFLAG)
2937 if (!(rex & REX_MODE64))
2938 used_prefixes |= (prefixes & PREFIX_DATA);
2943 if (sizeflag & SUFFIX_ALWAYS)
2945 if (rex & REX_MODE64)
2949 if (sizeflag & DFLAG)
2953 used_prefixes |= (prefixes & PREFIX_DATA);
2958 if (prefixes & PREFIX_DATA)
2962 used_prefixes |= (prefixes & PREFIX_DATA);
2967 if (rex & REX_MODE64)
2969 USED_REX (REX_MODE64);
2973 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
2975 /* operand size flag for cwtl, cbtw */
2979 else if (sizeflag & DFLAG)
2990 if (sizeflag & DFLAG)
3001 used_prefixes |= (prefixes & PREFIX_DATA);
3011 oappend (const char *s)
3014 obufp += strlen (s);
3020 if (prefixes & PREFIX_CS)
3022 used_prefixes |= PREFIX_CS;
3023 oappend ("%cs:" + intel_syntax);
3025 if (prefixes & PREFIX_DS)
3027 used_prefixes |= PREFIX_DS;
3028 oappend ("%ds:" + intel_syntax);
3030 if (prefixes & PREFIX_SS)
3032 used_prefixes |= PREFIX_SS;
3033 oappend ("%ss:" + intel_syntax);
3035 if (prefixes & PREFIX_ES)
3037 used_prefixes |= PREFIX_ES;
3038 oappend ("%es:" + intel_syntax);
3040 if (prefixes & PREFIX_FS)
3042 used_prefixes |= PREFIX_FS;
3043 oappend ("%fs:" + intel_syntax);
3045 if (prefixes & PREFIX_GS)
3047 used_prefixes |= PREFIX_GS;
3048 oappend ("%gs:" + intel_syntax);
3053 OP_indirE (int bytemode, int sizeflag)
3057 OP_E (bytemode, sizeflag);
3061 print_operand_value (char *buf, int hex, bfd_vma disp)
3071 sprintf_vma (tmp, disp);
3072 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
3073 strcpy (buf + 2, tmp + i);
3077 bfd_signed_vma v = disp;
3084 /* Check for possible overflow on 0x8000000000000000. */
3087 strcpy (buf, "9223372036854775808");
3101 tmp[28 - i] = (v % 10) + '0';
3105 strcpy (buf, tmp + 29 - i);
3110 x86_print_symbolic_operand( buf, hex, disp );
3113 sprintf (buf, "0x%x", (unsigned int) disp);
3115 sprintf (buf, "%d", (int) disp);
3121 OP_E (int bytemode, int sizeflag)
3126 USED_REX (REX_EXTZ);
3130 /* Skip mod/rm byte. */
3141 oappend (names8rex[rm + add]);
3143 oappend (names8[rm + add]);
3146 oappend (names16[rm + add]);
3149 oappend (names32[rm + add]);
3152 oappend (names64[rm + add]);
3156 oappend (names64[rm + add]);
3158 oappend (names32[rm + add]);
3163 USED_REX (REX_MODE64);
3164 if (rex & REX_MODE64)
3165 oappend (names64[rm + add]);
3166 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3167 oappend (names32[rm + add]);
3169 oappend (names16[rm + add]);
3170 used_prefixes |= (prefixes & PREFIX_DATA);
3175 oappend (INTERNAL_DISASSEMBLER_ERROR);
3184 if ((sizeflag & AFLAG) || mode_64bit) /* 32 bit address mode */
3199 FETCH_DATA (the_info, codep + 1);
3200 index = (*codep >> 3) & 7;
3201 if (mode_64bit || index != 0x4)
3202 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
3203 scale = (*codep >> 6) & 3;
3205 USED_REX (REX_EXTY);
3206 USED_REX (REX_EXTZ);
3217 if ((base & 7) == 5)
3220 if (mode_64bit && !havesib)
3226 FETCH_DATA (the_info, codep + 1);
3228 if ((disp & 0x80) != 0)
3237 if (mod != 0 || (base & 7) == 5)
3239 print_operand_value (scratchbuf, !riprel, disp);
3240 oappend (scratchbuf);
3248 if (havebase || (havesib && (index != 4 || scale != 0)))
3255 oappend ("BYTE PTR ");
3259 oappend ("WORD PTR ");
3263 USED_REX (REX_MODE64);
3264 if (rex & REX_MODE64)
3265 oappend ("QWORD PTR ");
3266 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
3267 oappend ("DWORD PTR ");
3269 oappend ("WORD PTR ");
3270 used_prefixes |= (prefixes & PREFIX_DATA);
3273 oappend ("DWORD PTR ");
3276 oappend ("QWORD PTR ");
3280 oappend ("QWORD PTR ");
3282 oappend ("DWORD PTR ");
3285 if (sizeflag & DFLAG)
3287 used_prefixes |= (prefixes & PREFIX_DATA);
3288 oappend ("FWORD PTR ");
3291 oappend ("DWORD PTR ");
3294 oappend ("TBYTE PTR ");
3297 oappend ("XMMWORD PTR ");
3303 *obufp++ = open_char;
3304 if (intel_syntax && riprel)
3307 USED_REX (REX_EXTZ);
3308 if (!havesib && (rex & REX_EXTZ))
3311 oappend (mode_64bit && (sizeflag & AFLAG)
3312 ? names64[base] : names32[base]);
3317 if (!intel_syntax || havebase)
3319 *obufp++ = separator_char;
3322 oappend (mode_64bit && (sizeflag & AFLAG)
3323 ? names64[index] : names32[index]);
3325 if (scale != 0 || (!intel_syntax && index != 4))
3327 *obufp++ = scale_char;
3329 sprintf (scratchbuf, "%d", 1 << scale);
3330 oappend (scratchbuf);
3334 if (mod != 0 || (base & 7) == 5)
3336 /* Don't print zero displacements. */
3339 if ((bfd_signed_vma) disp > 0)
3345 print_operand_value (scratchbuf, 0, disp);
3346 oappend (scratchbuf);
3350 *obufp++ = close_char;
3353 else if (intel_syntax)
3355 if (mod != 0 || (base & 7) == 5)
3357 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3358 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3362 oappend (names_seg[ds_reg - es_reg]);
3365 print_operand_value (scratchbuf, 1, disp);
3366 oappend (scratchbuf);
3371 { /* 16 bit address mode */
3378 if ((disp & 0x8000) != 0)
3383 FETCH_DATA (the_info, codep + 1);
3385 if ((disp & 0x80) != 0)
3390 if ((disp & 0x8000) != 0)
3396 if (mod != 0 || (rm & 7) == 6)
3398 print_operand_value (scratchbuf, 0, disp);
3399 oappend (scratchbuf);
3402 if (mod != 0 || (rm & 7) != 6)
3404 *obufp++ = open_char;
3406 oappend (index16[rm + add]);
3407 *obufp++ = close_char;
3414 OP_G (int bytemode, int sizeflag)
3417 USED_REX (REX_EXTX);
3425 oappend (names8rex[reg + add]);
3427 oappend (names8[reg + add]);
3430 oappend (names16[reg + add]);
3433 oappend (names32[reg + add]);
3436 oappend (names64[reg + add]);
3441 USED_REX (REX_MODE64);
3442 if (rex & REX_MODE64)
3443 oappend (names64[reg + add]);
3444 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3445 oappend (names32[reg + add]);
3447 oappend (names16[reg + add]);
3448 used_prefixes |= (prefixes & PREFIX_DATA);
3451 oappend (INTERNAL_DISASSEMBLER_ERROR);
3464 FETCH_DATA (the_info, codep + 8);
3465 a = *codep++ & 0xff;
3466 a |= (*codep++ & 0xff) << 8;
3467 a |= (*codep++ & 0xff) << 16;
3468 a |= (*codep++ & 0xff) << 24;
3469 b = *codep++ & 0xff;
3470 b |= (*codep++ & 0xff) << 8;
3471 b |= (*codep++ & 0xff) << 16;
3472 b |= (*codep++ & 0xff) << 24;
3473 x = a + ((bfd_vma) b << 32);
3481 static bfd_signed_vma
3484 bfd_signed_vma x = 0;
3486 FETCH_DATA (the_info, codep + 4);
3487 x = *codep++ & (bfd_signed_vma) 0xff;
3488 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3489 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3490 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3494 static bfd_signed_vma
3497 bfd_signed_vma x = 0;
3499 FETCH_DATA (the_info, codep + 4);
3500 x = *codep++ & (bfd_signed_vma) 0xff;
3501 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3502 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3503 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3505 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
3515 FETCH_DATA (the_info, codep + 2);
3516 x = *codep++ & 0xff;
3517 x |= (*codep++ & 0xff) << 8;
3522 set_op (bfd_vma op, int riprel)
3524 op_index[op_ad] = op_ad;
3527 op_address[op_ad] = op;
3528 op_riprel[op_ad] = riprel;
3532 /* Mask to get a 32-bit address. */
3533 op_address[op_ad] = op & 0xffffffff;
3534 op_riprel[op_ad] = riprel & 0xffffffff;
3539 OP_REG (int code, int sizeflag)
3543 USED_REX (REX_EXTZ);
3555 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3556 case sp_reg: case bp_reg: case si_reg: case di_reg:
3557 s = names16[code - ax_reg + add];
3559 case es_reg: case ss_reg: case cs_reg:
3560 case ds_reg: case fs_reg: case gs_reg:
3561 s = names_seg[code - es_reg + add];
3563 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3564 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3567 s = names8rex[code - al_reg + add];
3569 s = names8[code - al_reg];
3571 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
3572 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
3575 s = names64[code - rAX_reg + add];
3578 code += eAX_reg - rAX_reg;
3580 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3581 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3582 USED_REX (REX_MODE64);
3583 if (rex & REX_MODE64)
3584 s = names64[code - eAX_reg + add];
3585 else if (sizeflag & DFLAG)
3586 s = names32[code - eAX_reg + add];
3588 s = names16[code - eAX_reg + add];
3589 used_prefixes |= (prefixes & PREFIX_DATA);
3592 s = INTERNAL_DISASSEMBLER_ERROR;
3599 OP_IMREG (int code, int sizeflag)
3611 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3612 case sp_reg: case bp_reg: case si_reg: case di_reg:
3613 s = names16[code - ax_reg];
3615 case es_reg: case ss_reg: case cs_reg:
3616 case ds_reg: case fs_reg: case gs_reg:
3617 s = names_seg[code - es_reg];
3619 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3620 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3623 s = names8rex[code - al_reg];
3625 s = names8[code - al_reg];
3627 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3628 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3629 USED_REX (REX_MODE64);
3630 if (rex & REX_MODE64)
3631 s = names64[code - eAX_reg];
3632 else if (sizeflag & DFLAG)
3633 s = names32[code - eAX_reg];
3635 s = names16[code - eAX_reg];
3636 used_prefixes |= (prefixes & PREFIX_DATA);
3639 s = INTERNAL_DISASSEMBLER_ERROR;
3646 OP_I (int bytemode, int sizeflag)
3649 bfd_signed_vma mask = -1;
3654 FETCH_DATA (the_info, codep + 1);
3666 USED_REX (REX_MODE64);
3667 if (rex & REX_MODE64)
3669 else if (sizeflag & DFLAG)
3679 used_prefixes |= (prefixes & PREFIX_DATA);
3690 oappend (INTERNAL_DISASSEMBLER_ERROR);
3695 scratchbuf[0] = '$';
3696 print_operand_value (scratchbuf + 1, 1, op);
3697 oappend (scratchbuf + intel_syntax);
3698 scratchbuf[0] = '\0';
3702 OP_I64 (int bytemode, int sizeflag)
3705 bfd_signed_vma mask = -1;
3709 OP_I (bytemode, sizeflag);
3716 FETCH_DATA (the_info, codep + 1);
3721 USED_REX (REX_MODE64);
3722 if (rex & REX_MODE64)
3724 else if (sizeflag & DFLAG)
3734 used_prefixes |= (prefixes & PREFIX_DATA);
3741 oappend (INTERNAL_DISASSEMBLER_ERROR);
3746 scratchbuf[0] = '$';
3747 print_operand_value (scratchbuf + 1, 1, op);
3748 oappend (scratchbuf + intel_syntax);
3749 scratchbuf[0] = '\0';
3753 OP_sI (int bytemode, int sizeflag)
3756 bfd_signed_vma mask = -1;
3761 FETCH_DATA (the_info, codep + 1);
3763 if ((op & 0x80) != 0)
3768 USED_REX (REX_MODE64);
3769 if (rex & REX_MODE64)
3771 else if (sizeflag & DFLAG)
3780 if ((op & 0x8000) != 0)
3783 used_prefixes |= (prefixes & PREFIX_DATA);
3788 if ((op & 0x8000) != 0)
3792 oappend (INTERNAL_DISASSEMBLER_ERROR);
3796 scratchbuf[0] = '$';
3797 print_operand_value (scratchbuf + 1, 1, op);
3798 oappend (scratchbuf + intel_syntax);
3802 OP_J (int bytemode, int sizeflag)
3810 FETCH_DATA (the_info, codep + 1);
3812 if ((disp & 0x80) != 0)
3816 if (sizeflag & DFLAG)
3821 /* For some reason, a data16 prefix on a jump instruction
3822 means that the pc is masked to 16 bits after the
3823 displacement is added! */
3828 oappend (INTERNAL_DISASSEMBLER_ERROR);
3831 disp = (start_pc + codep - start_codep + disp) & mask;
3833 print_operand_value (scratchbuf, 1, disp);
3834 oappend (scratchbuf);
3838 OP_SEG (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3840 oappend (names_seg[reg]);
3844 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
3848 if (sizeflag & DFLAG)
3858 used_prefixes |= (prefixes & PREFIX_DATA);
3860 sprintf (scratchbuf, "0x%x,0x%x", seg, offset);
3862 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
3863 oappend (scratchbuf);
3867 OP_OFF (int bytemode ATTRIBUTE_UNUSED, int sizeflag)
3873 if ((sizeflag & AFLAG) || mode_64bit)
3880 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3881 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3883 oappend (names_seg[ds_reg - es_reg]);
3887 print_operand_value (scratchbuf, 1, off);
3888 oappend (scratchbuf);
3892 OP_OFF64 (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3898 OP_OFF (bytemode, sizeflag);
3908 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3909 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3911 oappend (names_seg[ds_reg - es_reg]);
3915 print_operand_value (scratchbuf, 1, off);
3916 oappend (scratchbuf);
3920 ptr_reg (int code, int sizeflag)
3924 *obufp++ = open_char;
3925 used_prefixes |= (prefixes & PREFIX_ADDR);
3928 if (!(sizeflag & AFLAG))
3929 s = names32[code - eAX_reg];
3931 s = names64[code - eAX_reg];
3933 else if (sizeflag & AFLAG)
3934 s = names32[code - eAX_reg];
3936 s = names16[code - eAX_reg];
3938 *obufp++ = close_char;
3943 OP_ESreg (int code, int sizeflag)
3949 USED_REX (REX_MODE64);
3950 used_prefixes |= (prefixes & PREFIX_DATA);
3951 if (rex & REX_MODE64)
3952 oappend ("QWORD PTR ");
3953 else if ((sizeflag & DFLAG))
3954 oappend ("DWORD PTR ");
3956 oappend ("WORD PTR ");
3959 oappend ("BYTE PTR ");
3962 oappend ("%es:" + intel_syntax);
3963 ptr_reg (code, sizeflag);
3967 OP_DSreg (int code, int sizeflag)
3971 if (codep[-1] != 0xd7 && (codep[-1] & 1))
3973 USED_REX (REX_MODE64);
3974 used_prefixes |= (prefixes & PREFIX_DATA);
3975 if (rex & REX_MODE64)
3976 oappend ("QWORD PTR ");
3977 else if ((sizeflag & DFLAG))
3978 oappend ("DWORD PTR ");
3980 oappend ("WORD PTR ");
3983 oappend ("BYTE PTR ");
3993 prefixes |= PREFIX_DS;
3995 ptr_reg (code, sizeflag);
3999 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4004 USED_REX (REX_EXTX);
4007 else if (!mode_64bit && (prefixes & PREFIX_LOCK))
4009 used_prefixes |= PREFIX_LOCK;
4012 sprintf (scratchbuf, "%%cr%d", reg + add);
4013 oappend (scratchbuf + intel_syntax);
4017 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4020 USED_REX (REX_EXTX);
4024 sprintf (scratchbuf, "db%d", reg + add);
4026 sprintf (scratchbuf, "%%db%d", reg + add);
4027 oappend (scratchbuf);
4031 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4033 sprintf (scratchbuf, "%%tr%d", reg);
4034 oappend (scratchbuf + intel_syntax);
4038 OP_Rd (int bytemode, int sizeflag)
4041 OP_E (bytemode, sizeflag);
4047 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4049 used_prefixes |= (prefixes & PREFIX_DATA);
4050 if (prefixes & PREFIX_DATA)
4053 USED_REX (REX_EXTX);
4056 sprintf (scratchbuf, "%%xmm%d", reg + add);
4059 sprintf (scratchbuf, "%%mm%d", reg);
4060 oappend (scratchbuf + intel_syntax);
4064 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4067 USED_REX (REX_EXTX);
4070 sprintf (scratchbuf, "%%xmm%d", reg + add);
4071 oappend (scratchbuf + intel_syntax);
4075 OP_EM (int bytemode, int sizeflag)
4079 if (intel_syntax && bytemode == v_mode)
4081 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
4082 used_prefixes |= (prefixes & PREFIX_DATA);
4084 OP_E (bytemode, sizeflag);
4088 /* Skip mod/rm byte. */
4091 used_prefixes |= (prefixes & PREFIX_DATA);
4092 if (prefixes & PREFIX_DATA)
4096 USED_REX (REX_EXTZ);
4099 sprintf (scratchbuf, "%%xmm%d", rm + add);
4102 sprintf (scratchbuf, "%%mm%d", rm);
4103 oappend (scratchbuf + intel_syntax);
4107 OP_EX (int bytemode, int sizeflag)
4112 if (intel_syntax && bytemode == v_mode)
4114 switch (prefixes & (PREFIX_DATA|PREFIX_REPZ|PREFIX_REPNZ))
4116 case 0: bytemode = x_mode; break;
4117 case PREFIX_REPZ: bytemode = d_mode; used_prefixes |= PREFIX_REPZ; break;
4118 case PREFIX_DATA: bytemode = x_mode; used_prefixes |= PREFIX_DATA; break;
4119 case PREFIX_REPNZ: bytemode = q_mode; used_prefixes |= PREFIX_REPNZ; break;
4120 default: bytemode = 0; break;
4123 OP_E (bytemode, sizeflag);
4126 USED_REX (REX_EXTZ);
4130 /* Skip mod/rm byte. */
4133 sprintf (scratchbuf, "%%xmm%d", rm + add);
4134 oappend (scratchbuf + intel_syntax);
4138 OP_MS (int bytemode, int sizeflag)
4141 OP_EM (bytemode, sizeflag);
4147 OP_XS (int bytemode, int sizeflag)
4150 OP_EX (bytemode, sizeflag);
4156 OP_M (int bytemode, int sizeflag)
4159 BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */
4161 OP_E (bytemode, sizeflag);
4165 OP_0f07 (int bytemode, int sizeflag)
4167 if (mod != 3 || rm != 0)
4170 OP_E (bytemode, sizeflag);
4174 OP_0fae (int bytemode, int sizeflag)
4179 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
4181 if (reg < 5 || rm != 0)
4183 BadOp (); /* bad sfence, mfence, or lfence */
4189 BadOp (); /* bad clflush */
4193 OP_E (bytemode, sizeflag);
4197 NOP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4199 /* NOP with REPZ prefix is called PAUSE. */
4200 if (prefixes == PREFIX_REPZ)
4201 strcpy (obuf, "pause");
4204 static const char *const Suffix3DNow[] = {
4205 /* 00 */ NULL, NULL, NULL, NULL,
4206 /* 04 */ NULL, NULL, NULL, NULL,
4207 /* 08 */ NULL, NULL, NULL, NULL,
4208 /* 0C */ "pi2fw", "pi2fd", NULL, NULL,
4209 /* 10 */ NULL, NULL, NULL, NULL,
4210 /* 14 */ NULL, NULL, NULL, NULL,
4211 /* 18 */ NULL, NULL, NULL, NULL,
4212 /* 1C */ "pf2iw", "pf2id", NULL, NULL,
4213 /* 20 */ NULL, NULL, NULL, NULL,
4214 /* 24 */ NULL, NULL, NULL, NULL,
4215 /* 28 */ NULL, NULL, NULL, NULL,
4216 /* 2C */ NULL, NULL, NULL, NULL,
4217 /* 30 */ NULL, NULL, NULL, NULL,
4218 /* 34 */ NULL, NULL, NULL, NULL,
4219 /* 38 */ NULL, NULL, NULL, NULL,
4220 /* 3C */ NULL, NULL, NULL, NULL,
4221 /* 40 */ NULL, NULL, NULL, NULL,
4222 /* 44 */ NULL, NULL, NULL, NULL,
4223 /* 48 */ NULL, NULL, NULL, NULL,
4224 /* 4C */ NULL, NULL, NULL, NULL,
4225 /* 50 */ NULL, NULL, NULL, NULL,
4226 /* 54 */ NULL, NULL, NULL, NULL,
4227 /* 58 */ NULL, NULL, NULL, NULL,
4228 /* 5C */ NULL, NULL, NULL, NULL,
4229 /* 60 */ NULL, NULL, NULL, NULL,
4230 /* 64 */ NULL, NULL, NULL, NULL,
4231 /* 68 */ NULL, NULL, NULL, NULL,
4232 /* 6C */ NULL, NULL, NULL, NULL,
4233 /* 70 */ NULL, NULL, NULL, NULL,
4234 /* 74 */ NULL, NULL, NULL, NULL,
4235 /* 78 */ NULL, NULL, NULL, NULL,
4236 /* 7C */ NULL, NULL, NULL, NULL,
4237 /* 80 */ NULL, NULL, NULL, NULL,
4238 /* 84 */ NULL, NULL, NULL, NULL,
4239 /* 88 */ NULL, NULL, "pfnacc", NULL,
4240 /* 8C */ NULL, NULL, "pfpnacc", NULL,
4241 /* 90 */ "pfcmpge", NULL, NULL, NULL,
4242 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
4243 /* 98 */ NULL, NULL, "pfsub", NULL,
4244 /* 9C */ NULL, NULL, "pfadd", NULL,
4245 /* A0 */ "pfcmpgt", NULL, NULL, NULL,
4246 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
4247 /* A8 */ NULL, NULL, "pfsubr", NULL,
4248 /* AC */ NULL, NULL, "pfacc", NULL,
4249 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
4250 /* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
4251 /* B8 */ NULL, NULL, NULL, "pswapd",
4252 /* BC */ NULL, NULL, NULL, "pavgusb",
4253 /* C0 */ NULL, NULL, NULL, NULL,
4254 /* C4 */ NULL, NULL, NULL, NULL,
4255 /* C8 */ NULL, NULL, NULL, NULL,
4256 /* CC */ NULL, NULL, NULL, NULL,
4257 /* D0 */ NULL, NULL, NULL, NULL,
4258 /* D4 */ NULL, NULL, NULL, NULL,
4259 /* D8 */ NULL, NULL, NULL, NULL,
4260 /* DC */ NULL, NULL, NULL, NULL,
4261 /* E0 */ NULL, NULL, NULL, NULL,
4262 /* E4 */ NULL, NULL, NULL, NULL,
4263 /* E8 */ NULL, NULL, NULL, NULL,
4264 /* EC */ NULL, NULL, NULL, NULL,
4265 /* F0 */ NULL, NULL, NULL, NULL,
4266 /* F4 */ NULL, NULL, NULL, NULL,
4267 /* F8 */ NULL, NULL, NULL, NULL,
4268 /* FC */ NULL, NULL, NULL, NULL,
4272 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4274 const char *mnemonic;
4276 FETCH_DATA (the_info, codep + 1);
4277 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4278 place where an 8-bit immediate would normally go. ie. the last
4279 byte of the instruction. */
4280 obufp = obuf + strlen (obuf);
4281 mnemonic = Suffix3DNow[*codep++ & 0xff];
4286 /* Since a variable sized modrm/sib chunk is between the start
4287 of the opcode (0x0f0f) and the opcode suffix, we need to do
4288 all the modrm processing first, and don't know until now that
4289 we have a bad opcode. This necessitates some cleaning up. */
4296 static const char *simd_cmp_op[] = {
4308 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4310 unsigned int cmp_type;
4312 FETCH_DATA (the_info, codep + 1);
4313 obufp = obuf + strlen (obuf);
4314 cmp_type = *codep++ & 0xff;
4317 char suffix1 = 'p', suffix2 = 's';
4318 used_prefixes |= (prefixes & PREFIX_REPZ);
4319 if (prefixes & PREFIX_REPZ)
4323 used_prefixes |= (prefixes & PREFIX_DATA);
4324 if (prefixes & PREFIX_DATA)
4328 used_prefixes |= (prefixes & PREFIX_REPNZ);
4329 if (prefixes & PREFIX_REPNZ)
4330 suffix1 = 's', suffix2 = 'd';
4333 sprintf (scratchbuf, "cmp%s%c%c",
4334 simd_cmp_op[cmp_type], suffix1, suffix2);
4335 used_prefixes |= (prefixes & PREFIX_REPZ);
4336 oappend (scratchbuf);
4340 /* We have a bad extension byte. Clean up. */
4348 SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
4350 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4351 forms of these instructions. */
4354 char *p = obuf + strlen (obuf);
4357 *(p - 1) = *(p - 2);
4358 *(p - 2) = *(p - 3);
4359 *(p - 3) = extrachar;
4364 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
4366 if (mod == 3 && reg == 1 && rm <= 1)
4368 /* Override "sidt". */
4369 char *p = obuf + strlen (obuf) - 4;
4371 /* We might have a suffix. */
4377 /* mwait %eax,%ecx */
4378 strcpy (p, "mwait");
4380 strcpy (op1out, names32[0]);
4384 /* monitor %eax,%ecx,%edx" */
4385 strcpy (p, "monitor");
4389 strcpy (op1out, names32[0]);
4390 else if (!(prefixes & PREFIX_ADDR))
4391 strcpy (op1out, names64[0]);
4394 strcpy (op1out, names32[0]);
4395 used_prefixes |= PREFIX_ADDR;
4397 strcpy (op3out, names32[2]);
4402 strcpy (op2out, names32[1]);
4413 INVLPG_Fixup (int bytemode, int sizeflag)
4426 OP_E (bytemode, sizeflag);
4429 /* Override "invlpg". */
4430 strcpy (obuf + strlen (obuf) - 6, alt);
4437 /* Throw away prefixes and 1st. opcode byte. */
4438 codep = insn_codep + 1;
.