3 * sh4mem.c is responsible for the SH4's access to memory (including memory
4 * mapped I/O), using the page maps created in mem.c
6 * Copyright (c) 2005 Nathan Keynes.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
19 #define MODULE sh4_module
26 #include "dreamcast.h"
27 #include "sh4/sh4core.h"
28 #include "sh4/sh4mmio.h"
29 #include "sh4/xltcache.h"
30 #include "pvr2/pvr2.h"
33 #define OC_BASE 0x1C000000
34 #define OC_TOP 0x20000000
36 #define TRANSLATE_VIDEO_64BIT_ADDRESS(a) ( (((a)&0x00FFFFF8)>>1)|(((a)&0x00000004)<<20)|((a)&0x03)|0x05000000 )
39 #define CHECK_READ_WATCH( addr, size ) \
40 if( mem_is_watched(addr,size,WATCH_READ) != NULL ) { \
41 WARN( "Watch triggered at %08X by %d byte read", addr, size ); \
44 #define CHECK_WRITE_WATCH( addr, size, val ) \
45 if( mem_is_watched(addr,size,WATCH_WRITE) != NULL ) { \
46 WARN( "Watch triggered at %08X by %d byte write <= %0*X", addr, size, size*2, val ); \
50 #define CHECK_READ_WATCH( addr, size )
51 #define CHECK_WRITE_WATCH( addr, size, val )
54 #ifdef ENABLE_TRACE_IO
55 #define TRACE_IO( str, p, r, ... ) if(io_rgn[(uint32_t)p]->trace_flag && !MMIO_NOTRACE_BYNUM((uint32_t)p,r)) \
56 TRACE( str " [%s.%s: %s]", __VA_ARGS__, \
57 MMIO_NAME_BYNUM((uint32_t)p), MMIO_REGID_BYNUM((uint32_t)p, r), \
58 MMIO_REGDESC_BYNUM((uint32_t)p, r) )
59 #define TRACE_P4IO( str, io, r, ... ) if(io->trace_flag && !MMIO_NOTRACE_IOBYNUM(io,r)) \
60 TRACE( str " [%s.%s: %s]", __VA_ARGS__, \
61 io->id, MMIO_REGID_IOBYNUM(io, r), \
62 MMIO_REGDESC_IOBYNUM(io, r) )
64 #define TRACE_IO( str, p, r, ... )
65 #define TRACE_P4IO( str, io, r, ... )
68 extern struct mem_region mem_rgn[];
69 extern struct mmio_region *P4_io[];
71 int32_t sh4_read_p4( sh4addr_t addr )
73 struct mmio_region *io = P4_io[(addr&0x1FFFFFFF)>>19];
75 switch( addr & 0x1F000000 ) {
76 case 0x00000000: case 0x01000000: case 0x02000000: case 0x03000000:
77 /* Store queue - readable? */
80 case 0x10000000: return mmu_icache_addr_read( addr );
81 case 0x11000000: return mmu_icache_data_read( addr );
82 case 0x12000000: return mmu_itlb_addr_read( addr );
83 case 0x13000000: return mmu_itlb_data_read( addr );
84 case 0x14000000: return mmu_ocache_addr_read( addr );
85 case 0x15000000: return mmu_ocache_data_read( addr );
86 case 0x16000000: return mmu_utlb_addr_read( addr );
87 case 0x17000000: return mmu_utlb_data_read( addr );
89 WARN( "Attempted read from unknown or invalid P4 region: %08X", addr );
93 int32_t val = io->io_read( addr&0xFFF );
94 TRACE_P4IO( "Long read %08X <= %08X", io, (addr&0xFFF), val, addr );
99 void sh4_write_p4( sh4addr_t addr, int32_t val )
101 struct mmio_region *io = P4_io[(addr&0x1FFFFFFF)>>19];
103 switch( addr & 0x1F000000 ) {
104 case 0x00000000: case 0x01000000: case 0x02000000: case 0x03000000:
106 SH4_WRITE_STORE_QUEUE( addr, val );
108 case 0x10000000: mmu_icache_addr_write( addr, val ); break;
109 case 0x11000000: mmu_icache_data_write( addr, val ); break;
110 case 0x12000000: mmu_itlb_addr_write( addr, val ); break;
111 case 0x13000000: mmu_itlb_data_write( addr, val ); break;
112 case 0x14000000: mmu_ocache_addr_write( addr, val ); break;
113 case 0x15000000: mmu_ocache_data_write( addr, val ); break;
114 case 0x16000000: mmu_utlb_addr_write( addr, val ); break;
115 case 0x17000000: mmu_utlb_data_write( addr, val ); break;
117 WARN( "Attempted write to unknown P4 region: %08X", addr );
120 TRACE_P4IO( "Long write %08X => %08X", io, (addr&0xFFF), val, addr );
121 io->io_write( addr&0xFFF, val );
125 int32_t sh4_read_phys_word( sh4addr_t addr )
128 if( addr >= 0xE0000000 ) /* P4 Area, handled specially */
129 return SIGNEXT16(sh4_read_p4( addr ));
131 if( (addr&0x1F800000) == 0x04000000 ) {
132 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
135 page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
136 if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */
138 WARN( "Attempted word read to missing page: %08X",
142 return SIGNEXT16(io_rgn[(uintptr_t)page]->io_read(addr&0xFFF));
144 return SIGNEXT16(*(int16_t *)(page+(addr&0xFFF)));
149 * Convenience function to read a quad-word (implemented as two long reads).
151 int64_t sh4_read_quad( sh4addr_t addr )
153 return ((int64_t)((uint32_t)sh4_read_long(addr))) |
154 (((int64_t)((uint32_t)sh4_read_long(addr+4))) << 32);
157 int32_t sh4_read_long( sh4addr_t addr )
161 CHECK_READ_WATCH(addr,4);
163 if( addr >= 0xE0000000 ) { /* P4 Area, handled specially */
164 return ZEROEXT32(sh4_read_p4( addr ));
165 } else if( (addr&0x1C000000) == 0x0C000000 ) {
166 return ZEROEXT32(*(int32_t *)(sh4_main_ram + (addr&0x00FFFFFF)));
167 } else if( (addr&0x1F800000) == 0x04000000 ) {
168 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
169 pvr2_render_buffer_invalidate(addr, FALSE);
170 } else if( (addr&0x1F800000) == 0x05000000 ) {
171 pvr2_render_buffer_invalidate(addr, FALSE);
174 page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
175 if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */
178 WARN( "Attempted long read to missing page: %08X", addr );
181 val = io_rgn[(uintptr_t)page]->io_read(addr&0xFFF);
182 TRACE_IO( "Long read %08X <= %08X", page, (addr&0xFFF), val, addr );
183 return ZEROEXT32(val);
185 return ZEROEXT32(*(int32_t *)(page+(addr&0xFFF)));
189 int32_t sh4_read_word( sh4addr_t addr )
193 CHECK_READ_WATCH(addr,2);
195 if( addr >= 0xE0000000 ) { /* P4 Area, handled specially */
196 return ZEROEXT32(SIGNEXT16(sh4_read_p4( addr )));
197 } else if( (addr&0x1C000000) == 0x0C000000 ) {
198 return ZEROEXT32(SIGNEXT16(*(int16_t *)(sh4_main_ram + (addr&0x00FFFFFF))));
199 } else if( (addr&0x1F800000) == 0x04000000 ) {
200 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
201 pvr2_render_buffer_invalidate(addr, FALSE);
202 } else if( (addr&0x1F800000) == 0x05000000 ) {
203 pvr2_render_buffer_invalidate(addr, FALSE);
206 page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
207 if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */
210 WARN( "Attempted word read to missing page: %08X", addr );
213 val = SIGNEXT16(io_rgn[(uintptr_t)page]->io_read(addr&0xFFF));
214 TRACE_IO( "Word read %04X <= %08X", page, (addr&0xFFF), val&0xFFFF, addr );
215 return ZEROEXT32(val);
217 return ZEROEXT32(SIGNEXT16(*(int16_t *)(page+(addr&0xFFF))));
221 int32_t sh4_read_byte( sh4addr_t addr )
225 CHECK_READ_WATCH(addr,1);
227 if( addr >= 0xE0000000 ) { /* P4 Area, handled specially */
228 return ZEROEXT32(SIGNEXT8(sh4_read_p4( addr )));
229 } else if( (addr&0x1C000000) == 0x0C000000 ) {
230 return ZEROEXT32(SIGNEXT8(*(int8_t *)(sh4_main_ram + (addr&0x00FFFFFF))));
231 } else if( (addr&0x1F800000) == 0x04000000 ) {
232 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
233 pvr2_render_buffer_invalidate(addr, FALSE);
234 } else if( (addr&0x1F800000) == 0x05000000 ) {
235 pvr2_render_buffer_invalidate(addr, FALSE);
239 page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
240 if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */
243 WARN( "Attempted byte read to missing page: %08X", addr );
246 val = SIGNEXT8(io_rgn[(uintptr_t)page]->io_read(addr&0xFFF));
247 TRACE_IO( "Byte read %02X <= %08X", page, (addr&0xFFF), val&0xFF, addr );
248 return ZEROEXT32(val);
250 return ZEROEXT32(SIGNEXT8(*(int8_t *)(page+(addr&0xFFF))));
255 * Convenience function to write a quad-word (implemented as two long writes).
257 void sh4_write_quad( sh4addr_t addr, uint64_t val )
259 sh4_write_long( addr, (uint32_t)val );
260 sh4_write_long( addr+4, (uint32_t)(val>>32) );
263 void sh4_write_long( sh4addr_t addr, uint32_t val )
267 CHECK_WRITE_WATCH(addr,4,val);
269 if( addr >= 0xE0000000 ) {
270 sh4_write_p4( addr, val );
272 } else if( (addr&0x1C000000) == 0x0C000000 ) {
273 *(uint32_t *)(sh4_main_ram + (addr&0x00FFFFFF)) = val;
274 xlat_invalidate_long(addr);
276 } else if( (addr&0x1F800000) == 0x04000000 ||
277 (addr&0x1F800000) == 0x11000000 ) {
278 texcache_invalidate_page(addr& 0x7FFFFF);
279 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
280 pvr2_render_buffer_invalidate(addr, TRUE);
281 } else if( (addr&0x1F800000) == 0x05000000 ) {
282 pvr2_render_buffer_invalidate(addr, TRUE);
285 if( (addr&0x1FFFFFFF) < 0x200000 ) {
286 WARN( "Attempted write to read-only memory: %08X => %08X", val, addr);
290 if( (addr&0x1F800000) == 0x00800000 )
291 asic_g2_write_word();
293 page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
294 if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */
296 if( (addr & 0x1F000000) >= 0x04000000 &&
297 (addr & 0x1F000000) < 0x07000000 )
299 WARN( "Long write to missing page: %08X => %08X", val, addr );
302 TRACE_IO( "Long write %08X => %08X", page, (addr&0xFFF), val, addr );
303 io_rgn[(uintptr_t)page]->io_write(addr&0xFFF, val);
305 *(uint32_t *)(page+(addr&0xFFF)) = val;
309 void sh4_write_word( sh4addr_t addr, uint32_t val )
313 CHECK_WRITE_WATCH(addr,2,val);
315 if( addr >= 0xE0000000 ) {
316 sh4_write_p4( addr, (int16_t)val );
318 } else if( (addr&0x1C000000) == 0x0C000000 ) {
319 *(uint16_t *)(sh4_main_ram + (addr&0x00FFFFFF)) = val;
320 xlat_invalidate_word(addr);
322 } else if( (addr&0x1F800000) == 0x04000000 ||
323 (addr&0x1F800000) == 0x11000000 ) {
324 texcache_invalidate_page(addr& 0x7FFFFF);
325 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
326 pvr2_render_buffer_invalidate(addr, TRUE);
327 } else if( (addr&0x1F800000) == 0x05000000 ) {
328 pvr2_render_buffer_invalidate(addr, TRUE);
331 if( (addr&0x1FFFFFFF) < 0x200000 ) {
332 WARN( "Attempted write to read-only memory: %08X => %08X", val, addr);
336 page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
337 if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */
339 WARN( "Attempted word write to missing page: %08X", addr );
342 TRACE_IO( "Word write %04X => %08X", page, (addr&0xFFF), val&0xFFFF, addr );
343 io_rgn[(uintptr_t)page]->io_write(addr&0xFFF, val);
345 *(uint16_t *)(page+(addr&0xFFF)) = val;
349 void sh4_write_byte( sh4addr_t addr, uint32_t val )
353 CHECK_WRITE_WATCH(addr,1,val);
355 if( addr >= 0xE0000000 ) {
356 sh4_write_p4( addr, (int8_t)val );
358 } else if( (addr&0x1C000000) == 0x0C000000 ) {
359 *(uint8_t *)(sh4_main_ram + (addr&0x00FFFFFF)) = val;
360 xlat_invalidate_word(addr);
362 } else if( (addr&0x1F800000) == 0x04000000 ||
363 (addr&0x1F800000) == 0x11000000 ) {
364 texcache_invalidate_page(addr& 0x7FFFFF);
365 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
366 pvr2_render_buffer_invalidate(addr, TRUE);
367 } else if( (addr&0x1F800000) == 0x05000000 ) {
368 pvr2_render_buffer_invalidate(addr, TRUE);
371 if( (addr&0x1FFFFFFF) < 0x200000 ) {
372 WARN( "Attempted write to read-only memory: %08X => %08X", val, addr);
376 page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
377 if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */
379 WARN( "Attempted byte write to missing page: %08X", addr );
382 TRACE_IO( "Byte write %02X => %08X", page, (addr&0xFFF), val&0xFF, addr );
383 io_rgn[(uintptr_t)page]->io_write( (addr&0xFFF), val);
385 *(uint8_t *)(page+(addr&0xFFF)) = val;
391 /* FIXME: Handle all the many special cases when the range doesn't fall cleanly
392 * into the same memory block
394 void mem_copy_from_sh4( sh4ptr_t dest, sh4addr_t srcaddr, size_t count ) {
395 if( srcaddr >= 0x04000000 && srcaddr < 0x05000000 ) {
396 pvr2_vram64_read( dest, srcaddr, count );
398 sh4ptr_t src = mem_get_region(srcaddr);
400 WARN( "Attempted block read from unknown address %08X", srcaddr );
402 memcpy( dest, src, count );
407 void mem_copy_to_sh4( sh4addr_t destaddr, sh4ptr_t src, size_t count ) {
408 if( destaddr >= 0x10000000 && destaddr < 0x14000000 ) {
409 pvr2_dma_write( destaddr, src, count );
411 } else if( (destaddr & 0x1F800000) == 0x05000000 ) {
412 pvr2_render_buffer_invalidate( destaddr, TRUE );
413 } else if( (destaddr & 0x1F800000) == 0x04000000 ) {
414 pvr2_vram64_write( destaddr, src, count );
417 sh4ptr_t dest = mem_get_region(destaddr);
419 WARN( "Attempted block write to unknown address %08X", destaddr );
421 xlat_invalidate_block( destaddr, count );
422 memcpy( dest, src, count );
426 void sh4_flush_store_queue( sh4addr_t addr )
428 /* Store queue operation */
429 if( IS_MMU_ENABLED() ) {
432 int queue = (addr&0x20)>>2;
433 sh4ptr_t src = (sh4ptr_t)&sh4r.store_queue[queue];
434 uint32_t hi = (MMIO_READ( MMU, (queue == 0 ? QACR0 : QACR1) ) & 0x1C) << 24;
435 uint32_t target = (addr&0x03FFFFE0) | hi;
436 mem_copy_to_sh4( target, src, 32 );
439 sh4ptr_t sh4_get_region_by_vma( sh4addr_t vma )
441 uint64_t ppa = mmu_vma_to_phys_read(vma);
446 sh4addr_t addr = (sh4addr_t)ppa;
447 sh4ptr_t page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
448 if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */
451 return page+(addr&0xFFF);
.