lxdream 0.9.1| filename | src/pvr2/pvr2.h |
| changeset | 19:9da7a8e38f9d |
| prev | 1:eea311cfd33e |
| next | 31:495e480360d7 |
| author | nkeynes |
| date | Thu Dec 22 07:38:12 2005 +0000 (18 years ago) |
| permissions | -rw-r--r-- |
| last change | Implement 95% of the SCIF serial interface Implement basic load_bin_file function to try to load demos directly Update TMU to run all 3 timers, start on general timing |
| view | annotate | diff | log | raw |
1 #include "mmio.h"
3 MMIO_REGION_BEGIN( 0x005F8000, PVR2, "Power VR/2" )
4 LONG_PORT( 0x000, PVRID, PORT_MR, 0x17FD11DB, "PVR2 Core ID" )
5 LONG_PORT( 0x004, PVRVER, PORT_MR, 0x00000011, "PVR2 Core Version" )
6 LONG_PORT( 0x008, PVRRST, PORT_MR, 0, "PVR2 Reset" )
7 LONG_PORT( 0x014, RENDST, PORT_W, 0, "Start render" )
8 LONG_PORT( 0x020, OBJBASE, PORT_MRW, 0, "Object buffer base offset" )
9 LONG_PORT( 0x02C, TILEBASE, PORT_MRW, 0, "Tile buffer base offset" )
10 LONG_PORT( 0x040, PVRBCOL, PORT_MRW, 0, "Border Colour (RGB)" )
11 LONG_PORT( 0x044, DISPMODE, PORT_MRW, 0, "Display Mode" )
12 LONG_PORT( 0x048, RENDMODE, PORT_MRW, 0, "Rendering Mode" )
13 LONG_PORT( 0x04C, RENDSIZE, PORT_MRW, 0, "Rendering width (bytes/2)" )
14 LONG_PORT( 0x050, DISPADDR1, PORT_MRW, 0, "Video memory base 1" )
15 LONG_PORT( 0x054, DISPADDR2, PORT_MRW, 0, "Video memory base 2" )
16 LONG_PORT( 0x05C, DISPSIZE, PORT_MRW, 0, "Display size" )
17 LONG_PORT( 0x060, RENDADDR1, PORT_MRW, 0, "Rendering memory base 1" )
18 LONG_PORT( 0x064, RENDADDR2, PORT_MRW, 0, "Rendering memory base 2" )
19 LONG_PORT( 0x068, HCLIP, PORT_MRW, 0, "Horizontal clipping area" )
20 LONG_PORT( 0x06C, VCLIP, PORT_MRW, 0, "Vertical clipping area" )
21 LONG_PORT( 0x074, SHADOW, PORT_MRW, 0, "Shadowing" )
22 LONG_PORT( 0x078, OBJCLIP, PORT_MRW, 0, "Object clip distance (float32)" )
23 LONG_PORT( 0x084, TSPCLIP, PORT_MRW, 0, "Texture clip distance (float32)" )
24 LONG_PORT( 0x088, BGPLANEZ, PORT_MRW, 0, "Background plane depth (float32)" )
25 LONG_PORT( 0x08C, BGPLANECFG, PORT_MRW, 0, "Background plane config" )
26 LONG_PORT( 0x0B0, FGTBLCOL, PORT_MRW, 0, "Fog table colour" )
27 LONG_PORT( 0x0B4, FGVRTCOL, PORT_MRW, 0, "Fog vertex colour" )
28 LONG_PORT( 0x0B8, FGCOEFF, PORT_MRW, 0, "Fog density coefficient (float16)" )
29 LONG_PORT( 0x0BC, CLAMPHI, PORT_MRW, 0, "Clamp high colour" )
30 LONG_PORT( 0x0C0, CLAMPLO, PORT_MRW, 0, "Clamp low colour" )
31 LONG_PORT( 0x0C4, GUNPOS, PORT_MRW, 0, "Lightgun position" )
32 LONG_PORT( 0x0CC, EVTPOS, PORT_MRW, 0, "Raster event position" )
33 LONG_PORT( 0x0D0, VIDCFG, PORT_MRW, 0, "Sync configuration & enable" )
34 LONG_PORT( 0x0D4, HBORDER, PORT_MRW, 0, "Horizontal border area" )
35 LONG_PORT( 0x0D8, REFRESH, PORT_MRW, 0, "Refresh rates?" )
36 LONG_PORT( 0x0DC, VBORDER, PORT_MRW, 0, "Vertical border area" )
37 LONG_PORT( 0x0E0, SYNCPOS, PORT_MRW, 0, "Sync pulse timing" )
38 LONG_PORT( 0x0E4, TSPCFG, PORT_MRW, 0, "Texture modulo width" )
39 LONG_PORT( 0x0E8, VIDCFG2, PORT_MRW, 0, "Video configuration 2" )
40 LONG_PORT( 0x0F0, VPOS, PORT_MRW, 0, "Vertical display position" )
41 LONG_PORT( 0x0F4, SCALERCFG, PORT_MRW, 0, "Scaler configuration (?)" )
42 LONG_PORT( 0x10C, BEAMPOS, PORT_R, 0, "Raster beam position" )
43 LONG_PORT( 0x124, TAOPBST, PORT_MRW, 0, "TA Object Pointer Buffer start" )
44 LONG_PORT( 0x128, TAOBST, PORT_MRW, 0, "TA Object Buffer start" )
45 LONG_PORT( 0x12C, TAOPBEN, PORT_MRW, 0, "TA Object Pointer Buffer end" )
46 LONG_PORT( 0x130, TAOBEN, PORT_MRW, 0, "TA Object Buffer end" )
47 LONG_PORT( 0x134, TAOPBPOS, PORT_MRW, 0, "TA Object Pointer Buffer position" )
48 LONG_PORT( 0x138, TAOBPOS, PORT_MRW, 0, "TA Object Buffer position" )
49 LONG_PORT( 0x13C, TATBSZ, PORT_MRW, 0, "TA Tile Buffer size" )
50 LONG_PORT( 0x140, TAOPBCFG, PORT_MRW, 0, "TA Object Pointer Buffer config" )
51 LONG_PORT( 0x144, TAINIT, PORT_MRW, 0, "TA Initialize" )
52 LONG_PORT( 0x164, TAOPLST, PORT_MRW, 0, "TA Object Pointer List start" )
53 MMIO_REGION_END
56 #define DISPMODE_DE 0x00000001 /* Display enable */
57 #define DISPMODE_SD 0x00000002 /* Scan double */
58 #define DISPMODE_COL 0x0000000C /* Colour mode */
59 #define DISPMODE_CD 0x08000000 /* Clock double */
61 #define MODE_RGB15 0x00000000
62 #define MODE_RGB16 0x00000040
63 #define MODE_RGB24 0x00000080
64 #define MODE_RGB32 0x000000C0
66 #define DISPSIZE_MODULO 0x3FF00000 /* line skip +1 (32-bit words)*/
67 #define DISPSIZE_LPF 0x000FFC00 /* lines per field */
68 #define DISPSIZE_PPL 0x000003FF /* pixel words (32 bit) per line */
70 #define VIDCFG_VP 0x00000001 /* V-sync polarity */
71 #define VIDCFG_HP 0x00000002 /* H-sync polarity */
72 #define VIDCFG_I 0x00000010 /* Interlace enable */
73 #define VIDCFG_BS 0x000000C0 /* Broadcast standard */
74 #define VIDCFG_VO 0x00000100 /* Video output enable */
76 #define BS_NTSC 0x00000000
77 #define BS_PAL 0x00000040
78 #define BS_PALM 0x00000080 /* ? */
79 #define BS_PALN 0x000000C0 /* ? */
81 void pvr2_next_frame( void );
82 void pvr2_set_base_address( uint32_t );
.