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lxdream.org :: lxdream/src/pvr2/pvr2.h
lxdream 0.9.1
released Jun 29
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filename src/pvr2/pvr2.h
changeset 736:a02d1475ccfd
prev677:3ee62740ff8f
next753:1fe39c3a9bbc
author nkeynes
date Mon Jul 14 07:44:42 2008 +0000 (11 years ago)
permissions -rw-r--r--
last change Re-indent everything consistently
Fix include guards for consistency as well
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     1 /**
     2  * $Id$
     3  *
     4  * PVR2 (video chip) functions and macros.
     5  *
     6  * Copyright (c) 2005 Nathan Keynes.
     7  *
     8  * This program is free software; you can redistribute it and/or modify
     9  * it under the terms of the GNU General Public License as published by
    10  * the Free Software Foundation; either version 2 of the License, or
    11  * (at your option) any later version.
    12  *
    13  * This program is distributed in the hope that it will be useful,
    14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    16  * GNU General Public License for more details.
    17  */
    19 #ifndef lxdream_pvr2_H
    20 #define lxdream_pvr2_H 1
    22 #include <stdio.h>
    23 #include "lxdream.h"
    24 #include "mem.h"
    25 #include "display.h"
    27 #ifdef __cplusplus
    28 extern "C" {
    29 #endif
    31 typedef unsigned int pvraddr_t;
    32 typedef unsigned int pvr64addr_t;
    34 #define DISPMODE_ENABLE      0x00000001 /* Display enable */
    35 #define DISPMODE_LINEDOUBLE  0x00000002 /* scanline double */
    36 #define DISPMODE_COLFMT      0x0000000C /* Colour mode */
    37 #define DISPMODE_CLOCKDIV    0x08000000 /* Clock divide-by-2 */
    39 #define DISPSIZE_MODULO 0x3FF00000 /* line skip +1 (32-bit words)*/
    40 #define DISPSIZE_LPF    0x000FFC00 /* lines per field */
    41 #define DISPSIZE_PPL    0x000003FF /* pixel words (32 bit) per line */
    43 #define DISPCFG_VP 0x00000001 /* V-sync polarity */
    44 #define DISPCFG_HP 0x00000002 /* H-sync polarity */
    45 #define DISPCFG_I  0x00000010 /* Interlace enable */
    46 #define DISPCFG_BS 0x000000C0 /* Broadcast standard */
    47 #define DISPCFG_VO 0x00000100 /* Video output enable */
    49 #define DISPSYNC_LINE_MASK  0x000003FF
    50 #define DISPSYNC_EVEN_FIELD 0x00000000
    51 #define DISPSYNC_ODD_FIELD  0x00000400
    52 #define DISPSYNC_ACTIVE     0x00000800
    53 #define DISPSYNC_HSYNC      0x00001000
    54 #define DISPSYNC_VSYNC      0x00002000
    56 #define BS_NTSC 0x00000000
    57 #define BS_PAL  0x00000040
    58 #define BS_PALM 0x00000080 /* ? */
    59 #define BS_PALN 0x000000C0 /* ? */
    61 #define PVR2_RAM_BASE 0x05000000
    62 #define PVR2_RAM_BASE_INT 0x04000000
    63 #define PVR2_RAM_SIZE (8 * 1024 * 1024)
    64 #define PVR2_RAM_PAGES (PVR2_RAM_SIZE>>12)
    65 #define PVR2_RAM_MASK 0x7FFFFF
    67 #define RENDER_ZONLY  0
    68 #define RENDER_NORMAL 1     /* Render non-modified polygons */
    69 #define RENDER_CHEAPMOD 2   /* Render cheap-modified polygons */
    70 #define RENDER_FULLMOD 3    /* Render the fully-modified version of the polygons */
    72 void pvr2_next_frame( void );
    73 void pvr2_set_base_address( uint32_t );
    74 int pvr2_get_frame_count( void );
    75 void pvr2_redraw_display();
    76 gboolean pvr2_save_next_scene( const gchar *filename );
    78 #define PVR2_CMD_END_OF_LIST 0x00
    79 #define PVR2_CMD_USER_CLIP   0x20
    80 #define PVR2_CMD_POLY_OPAQUE 0x80
    81 #define PVR2_CMD_MOD_OPAQUE  0x81
    82 #define PVR2_CMD_POLY_TRANS  0x82
    83 #define PVR2_CMD_MOD_TRANS   0x83
    84 #define PVR2_CMD_POLY_PUNCHOUT 0x84
    85 #define PVR2_CMD_VERTEX      0xE0
    86 #define PVR2_CMD_VERTEX_LAST 0xF0
    88 #define PVR2_POLY_TEXTURED 0x00000008
    89 #define PVR2_POLY_SPECULAR 0x00000004
    90 #define PVR2_POLY_SHADED   0x00000002
    91 #define PVR2_POLY_UV_16BIT 0x00000001
    93 #define PVR2_POLY_MODE_CLAMP_RGB 0x00200000
    94 #define PVR2_POLY_MODE_ALPHA    0x00100000
    95 #define PVR2_POLY_MODE_TEXALPHA 0x00080000
    96 #define PVR2_POLY_MODE_FLIP_S   0x00040000
    97 #define PVR2_POLY_MODE_FLIP_T   0x00020000
    98 #define PVR2_POLY_MODE_CLAMP_S  0x00010000
    99 #define PVR2_POLY_MODE_CLAMP_T  0x00008000
   101 #define PVR2_POLY_FOG_LOOKUP    0x00000000
   102 #define PVR2_POLY_FOG_VERTEX    0x00400000
   103 #define PVR2_POLY_FOG_DISABLED  0x00800000
   104 #define PVR2_POLY_FOG_LOOKUP2   0x00C00000
   107 #define PVR2_TEX_FORMAT_ARGB1555 0x00000000
   108 #define PVR2_TEX_FORMAT_RGB565   0x08000000
   109 #define PVR2_TEX_FORMAT_ARGB4444 0x10000000
   110 #define PVR2_TEX_FORMAT_YUV422   0x18000000
   111 #define PVR2_TEX_FORMAT_BUMPMAP  0x20000000
   112 #define PVR2_TEX_FORMAT_IDX4     0x28000000
   113 #define PVR2_TEX_FORMAT_IDX8     0x30000000
   115 #define PVR2_TEX_MIPMAP      0x80000000
   116 #define PVR2_TEX_COMPRESSED  0x40000000
   117 #define PVR2_TEX_FORMAT_MASK 0x38000000
   118 #define PVR2_TEX_UNTWIDDLED  0x04000000
   119 #define PVR2_TEX_STRIDE      0x02000000
   120 #define PVR2_TEX_IS_PALETTE(mode) ( (mode & PVR2_TEX_FORMAT_MASK) == PVR2_TEX_FORMAT_IDX4 || (mode&PVR2_TEX_FORMAT_MASK) == PVR2_TEX_FORMAT_IDX8 )
   123 #define PVR2_TEX_ADDR(x) ( ((x)&0x01FFFFF)<<3 );
   124 #define PVR2_TEX_IS_MIPMAPPED(x) ( ((x) & 0x84000000) == 0x80000000 )
   125 #define PVR2_TEX_IS_COMPRESSED(x) ( (x) & PVR2_TEX_COMPRESSED )
   126 #define PVR2_TEX_IS_TWIDDLED(x) (((x) & PVR2_TEX_UNTWIDDLED) == 0)
   127 #define PVR2_TEX_IS_STRIDE(x) (((x) & 0x06000000) == 0x06000000)
   129 /****************************** Frame Buffer *****************************/
   131 /**
   132  * Write a block of data to an address in the DMA range (0x10000000 - 
   133  * 0x13FFFFFF), ie TA, YUV, or texture ram.
   134  */
   135 void pvr2_dma_write( sh4addr_t dest, unsigned char *src, uint32_t length );
   137 /**
   138  * Write to the interleaved memory address space (aka 64-bit address space).
   139  */
   140 void pvr2_vram64_write( sh4addr_t dest, unsigned char *src, uint32_t length );
   142 /**
   143  * Write to the interleaved memory address space (aka 64-bit address space),
   144  * using a line length and stride.
   145  */
   146 void pvr2_vram64_write_stride( sh4addr_t dest, unsigned char *src, uint32_t line_bytes,
   147                                uint32_t line_stride_bytes, uint32_t line_count );
   149 /**
   150  * Read from the interleaved memory address space (aka 64-bit address space)
   151  */
   152 void pvr2_vram64_read( unsigned char *dest, sh4addr_t src, uint32_t length );
   154 /**
   155  * Read a twiddled image from interleaved memory address space (aka 64-bit address
   156  * space), writing the image to the destination buffer in detwiddled format. 
   157  * Width and height must be powers of 2
   158  * This version reads 4-bit pixels.
   159  */
   160 void pvr2_vram64_read_twiddled_4( unsigned char *dest, sh4addr_t src, uint32_t width, uint32_t height );
   163 /**
   164  * Read a twiddled image from interleaved memory address space (aka 64-bit address
   165  * space), writing the image to the destination buffer in detwiddled format. 
   166  * Width and height must be powers of 2
   167  * This version reads 8-bit pixels.
   168  */
   169 void pvr2_vram64_read_twiddled_8( unsigned char *dest, sh4addr_t src, uint32_t width, uint32_t height );
   171 /**
   172  * Read a twiddled image from interleaved memory address space (aka 64-bit address
   173  * space), writing the image to the destination buffer in detwiddled format. 
   174  * Width and height must be powers of 2, and src must be 16-bit aligned.
   175  * This version reads 16-bit pixels.
   176  */
   177 void pvr2_vram64_read_twiddled_16( unsigned char *dest, sh4addr_t src, uint32_t width, uint32_t height );
   179 /**
   180  * Read an image from the interleaved memory address space (aka 64-bit address space) 
   181  * where the source and destination line sizes may differ. Note that both byte
   182  * counts must be a multiple of 4, and the src address must be 32-bit aligned.
   183  */
   184 void pvr2_vram64_read_stride( unsigned char *dest, uint32_t dest_line_bytes, sh4addr_t srcaddr,
   185                               uint32_t src_line_bytes, uint32_t line_count );
   186 /**
   187  * Dump a portion of vram to a stream from the interleaved memory address 
   188  * space.
   189  */
   190 void pvr2_vram64_dump( sh4addr_t addr, uint32_t length, FILE *f );
   192 /**
   193  * Flush the indicated render buffer back to PVR. Caller is responsible for
   194  * tracking whether there is actually anything in the buffer.
   195  *
   196  * @param buffer A render buffer indicating the address to store to, and the
   197  * format the data needs to be in.
   198  * @param backBuffer TRUE to flush the back buffer, FALSE for 
   199  * the front buffer.
   200  */
   201 void pvr2_render_buffer_copy_to_sh4( render_buffer_t buffer );
   203 /**
   204  * Invalidate any caching on the supplied SH4 address
   205  */
   206 gboolean pvr2_render_buffer_invalidate( sh4addr_t addr, gboolean isWrite );
   209 /**************************** Tile Accelerator ***************************/
   210 /**
   211  * Process the data in the supplied buffer as an array of TA command lists.
   212  * Any excess bytes are held pending until a complete list is sent
   213  */
   214 void pvr2_ta_write( unsigned char *buf, uint32_t length );
   217 /**
   218  * (Re)initialize the tile accelerator in preparation for the next scene.
   219  * Normally called immediately before commencing polygon transmission.
   220  */
   221 void pvr2_ta_init( void );
   223 void pvr2_ta_reset( void );
   225 void pvr2_ta_save_state( FILE *f );
   227 int pvr2_ta_load_state( FILE *f );
   229 /****************************** YUV Converter ****************************/
   231 /**
   232  * Process a block of YUV data.
   233  */
   234 void pvr2_yuv_write( unsigned char *buf, uint32_t length );
   236 /**
   237  * Initialize the YUV converter.
   238  */
   239 void pvr2_yuv_init( uint32_t target_addr );
   241 void pvr2_yuv_set_config( uint32_t config );
   243 void pvr2_yuv_save_state( FILE *f );
   245 int pvr2_yuv_load_state( FILE *f );
   247 /********************************* Renderer ******************************/
   249 /**
   250  * Render the current scene stored in PVR ram to the GL back buffer.
   251  */
   252 void pvr2_scene_render( render_buffer_t buffer );
   254 /**
   255  * Perform the initial once-off GL setup, usually immediately after the GL
   256  * context is first bound.
   257  */
   258 void pvr2_setup_gl_context();
   260 void render_backplane( uint32_t *polygon, uint32_t width, uint32_t height, uint32_t mode );
   262 void render_autosort_tile( pvraddr_t tile_entry, int render_mode );
   264 void render_set_context( uint32_t *context, int render_mode );
   266 void gl_render_tilelist( pvraddr_t tile_entry );
   268 /**
   269  * Structure to hold a complete unpacked vertex (excluding modifier
   270  * volume parameters - generate separate vertexes in that case).
   271  */
   272 struct vertex_unpacked {
   273     float x,y,z;
   274     float u,v;            /* Texture coordinates */
   275     float rgba[4];        /* Fragment colour (RGBA order) */
   276     float offset_rgba[4]; /* Offset color (RGBA order) */
   277 };
   279 /****************************** Texture Cache ****************************/
   281 /**
   282  * Initialize the texture cache.
   283  */
   284 void texcache_init( void );
   286 /**
   287  * Initialize the GL side of the texture cache (texture ids and such).
   288  */
   289 void texcache_gl_init( void );
   291 /**
   292  * Flush all textures and delete. The cache will be non-functional until
   293  * the next call to texcache_init(). This would typically be done if
   294  * switching GL targets.
   295  */    
   296 void texcache_shutdown( void );
   298 /**
   299  * Flush (ie free) all textures.
   300  */
   301 void texcache_flush( void );
   303 /**
   304  * Flush all palette-based textures (if any)
   305  */
   306 void texcache_invalidate_palette(void);
   308 /**
   309  * Evict all textures contained in the page identified by a texture address.
   310  */
   311 void texcache_invalidate_page( uint32_t texture_addr );
   313 /**
   314  * Return a texture ID for the texture specified at the supplied address
   315  * and given parameters (the same sequence of bytes could in theory have
   316  * multiple interpretations). We use the texture address as the primary
   317  * index, but allow for multiple instances at each address. The texture
   318  * will be bound to the GL_TEXTURE_2D target before being returned.
   319  * 
   320  * If the texture has already been bound, return the ID to which it was
   321  * bound. Otherwise obtain an unused texture ID and set it up appropriately.
   322  */
   323 GLuint texcache_get_texture( uint32_t texture_word, int width, int height );
   325 void pvr2_check_palette_changed(void);
   327 int pvr2_render_save_scene( const gchar *filename );
   330 /************************* Rendering support macros **************************/
   331 #define POLY1_DEPTH_MODE(poly1) ( pvr2_poly_depthmode[(poly1)>>29] )
   332 #define POLY1_DEPTH_WRITE(poly1) (((poly1)&0x04000000) == 0 )
   333 #define POLY1_CULL_MODE(poly1) (((poly1)>>27)&0x03)
   334 #define POLY1_CULL_ENABLE(poly1) (((poly1)>>28)&0x01)
   335 #define POLY1_TEXTURED(poly1) (((poly1)&0x02000000))
   336 #define POLY1_SPECULAR(poly1) (((poly1)&0x01000000))
   337 #define POLY1_GOURAUD_SHADED(poly1) ((poly1)&0x00800000)
   338 #define POLY1_SHADE_MODEL(poly1) (((poly1)&0x00800000) ? GL_SMOOTH : GL_FLAT)
   339 #define POLY1_UV16(poly1)   (((poly1)&0x00400000))
   340 #define POLY1_SINGLE_TILE(poly1) (((poly1)&0x00200000))
   342 #define POLY2_SRC_BLEND(poly2) ( pvr2_poly_srcblend[(poly2) >> 29] )
   343 #define POLY2_DEST_BLEND(poly2) ( pvr2_poly_dstblend[((poly2)>>26)&0x07] )
   344 #define POLY2_SRC_BLEND_TARGET(poly2)    ((poly2)&0x02000000)
   345 #define POLY2_DEST_BLEND_TARGET(poly2)   ((poly2)&0x01000000)
   346 #define POLY2_FOG_MODE(poly2)            ((poly2)&0x00C00000)
   347 #define POLY2_COLOUR_CLAMP_ENABLE(poly2) ((poly2)&0x00200000)
   348 #define POLY2_ALPHA_ENABLE(poly2)        ((poly2)&0x00100000)
   349 #define POLY2_TEX_ALPHA_ENABLE(poly2)   (((poly2)&0x00080000) == 0 )
   350 #define POLY2_TEX_MIRROR_U(poly2)        ((poly2)&0x00040000)
   351 #define POLY2_TEX_MIRROR_V(poly2)        ((poly2)&0x00020000)
   352 #define POLY2_TEX_CLAMP_U(poly2)         ((poly2)&0x00010000)
   353 #define POLY2_TEX_CLAMP_V(poly2)         ((poly2)&0x00008000)
   354 #define POLY2_TEX_WIDTH(poly2) ( 1<< ((((poly2) >> 3) & 0x07 ) + 3) )
   355 #define POLY2_TEX_HEIGHT(poly2) ( 1<< (((poly2) & 0x07 ) + 3) )
   356 #define POLY2_TEX_BLEND(poly2) (((poly2) >> 6)&0x03)
   357 extern int pvr2_poly_depthmode[8];
   358 extern int pvr2_poly_srcblend[8];
   359 extern int pvr2_poly_dstblend[8];
   360 extern int pvr2_poly_texblend[4];
   361 extern int pvr2_render_colour_format[8];
   363 #define CULL_NONE 0
   364 #define CULL_SMALL 1
   365 #define CULL_CCW 2
   366 #define CULL_CW 3
   368 #define SEGMENT_END         0x80000000
   369 #define SEGMENT_ZCLEAR      0x40000000
   370 #define SEGMENT_SORT_TRANS  0x20000000
   371 #define SEGMENT_START       0x10000000
   372 #define SEGMENT_X(c)        (((c) >> 2) & 0x3F)
   373 #define SEGMENT_Y(c)        (((c) >> 8) & 0x3F)
   374 #define NO_POINTER          0x80000000
   375 #define IS_TILE_PTR(p)      ( ((p)&NO_POINTER) == 0 )
   376 #define IS_LAST_SEGMENT(s)  (((s)->control) & SEGMENT_END)
   378 struct tile_segment {
   379     uint32_t control;
   380     pvraddr_t opaque_ptr;
   381     pvraddr_t opaquemod_ptr;
   382     pvraddr_t trans_ptr;
   383     pvraddr_t transmod_ptr;
   384     pvraddr_t punchout_ptr;
   385 };
   387 #ifdef __cplusplus
   388 }
   389 #endif
   391 #endif /* !lxdream_pvr2_H */
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