4 * SH4 CPU definition and disassembly functions
6 * Copyright (c) 2005 Nathan Keynes.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
19 #include "sh4/sh4core.h"
20 #include "sh4/sh4dasm.h"
23 #define UNIMP(ir) snprintf( buf, len, "??? " )
26 const struct reg_desc_struct sh4_reg_map[] =
27 { {"R0", REG_INT, &sh4r.r[0]}, {"R1", REG_INT, &sh4r.r[1]},
28 {"R2", REG_INT, &sh4r.r[2]}, {"R3", REG_INT, &sh4r.r[3]},
29 {"R4", REG_INT, &sh4r.r[4]}, {"R5", REG_INT, &sh4r.r[5]},
30 {"R6", REG_INT, &sh4r.r[6]}, {"R7", REG_INT, &sh4r.r[7]},
31 {"R8", REG_INT, &sh4r.r[8]}, {"R9", REG_INT, &sh4r.r[9]},
32 {"R10",REG_INT, &sh4r.r[10]}, {"R11",REG_INT, &sh4r.r[11]},
33 {"R12",REG_INT, &sh4r.r[12]}, {"R13",REG_INT, &sh4r.r[13]},
34 {"R14",REG_INT, &sh4r.r[14]}, {"R15",REG_INT, &sh4r.r[15]},
35 {"SR", REG_INT, &sh4r.sr}, {"GBR", REG_INT, &sh4r.gbr},
36 {"SSR",REG_INT, &sh4r.ssr}, {"SPC", REG_INT, &sh4r.spc},
37 {"SGR",REG_INT, &sh4r.sgr}, {"DBR", REG_INT, &sh4r.dbr},
38 {"VBR",REG_INT, &sh4r.vbr},
39 {"PC", REG_INT, &sh4r.pc}, {"PR", REG_INT, &sh4r.pr},
40 {"MACL",REG_INT, &sh4r.mac},{"MACH",REG_INT, ((uint32_t *)&sh4r.mac)+1},
41 {"FPUL", REG_INT, &sh4r.fpul.i}, {"FPSCR", REG_INT, &sh4r.fpscr},
45 const struct cpu_desc_struct sh4_cpu_desc =
46 { "SH4", sh4_disasm_instruction, sh4_execute_instruction, sh4_has_page,
47 sh4_set_breakpoint, sh4_clear_breakpoint, sh4_get_breakpoint, 2,
48 (char *)&sh4r, sizeof(sh4r), sh4_reg_map,
51 uint32_t sh4_disasm_instruction( sh4vma_t pc, char *buf, int len, char *opcode )
53 sh4addr_t addr = mmu_vma_to_phys_disasm(pc);
54 uint16_t ir = sh4_read_word(addr);
56 #define UNDEF(ir) snprintf( buf, len, "???? " );
57 #define RN(ir) ((ir&0x0F00)>>8)
58 #define RN_BANK(ir) ((ir&0x0070)>>4)
59 #define RM(ir) ((ir&0x00F0)>>4)
60 #define DISP4(ir) (ir&0x000F) /* 4-bit displacements are *not* sign extended */
61 #define DISP8(ir) (ir&0x00FF)
62 #define PCDISP8(ir) SIGNEXT8(ir&0x00FF)
63 #define UIMM8(ir) (ir&0x00FF)
64 #define IMM8(ir) SIGNEXT8(ir&0x00FF)
65 #define DISP12(ir) SIGNEXT12(ir&0x0FFF)
66 #define FVN(ir) ((ir&0x0C00)>>10)
67 #define FVM(ir) ((ir&0x0300)>>8)
69 sprintf( opcode, "%02X %02X", ir&0xFF, ir>>8 );
71 switch( (ir&0xF000) >> 12 ) {
75 switch( (ir&0x80) >> 7 ) {
77 switch( (ir&0x70) >> 4 ) {
80 uint32_t Rn = ((ir>>8)&0xF);
81 snprintf( buf, len, "STC SR, R%d", Rn );
86 uint32_t Rn = ((ir>>8)&0xF);
87 snprintf( buf, len, "STC GBR, R%d", Rn );
92 uint32_t Rn = ((ir>>8)&0xF);
93 snprintf( buf, len, "STC VBR, R%d", Rn );
98 uint32_t Rn = ((ir>>8)&0xF);
99 snprintf( buf, len, "STC SSR, R%d", Rn );
104 uint32_t Rn = ((ir>>8)&0xF);
105 snprintf( buf, len, "STC SPC, R%d", Rn );
114 { /* STC Rm_BANK, Rn */
115 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm_BANK = ((ir>>4)&0x7);
116 snprintf( buf, len, "STC R%d_BANK, R%d", Rm_BANK, Rn );
122 switch( (ir&0xF0) >> 4 ) {
125 uint32_t Rn = ((ir>>8)&0xF);
126 snprintf( buf, len, "BSRF R%d", Rn );
131 uint32_t Rn = ((ir>>8)&0xF);
132 snprintf( buf, len, "BRAF R%d", Rn );
137 uint32_t Rn = ((ir>>8)&0xF);
138 snprintf( buf, len, "PREF R%d", Rn );
143 uint32_t Rn = ((ir>>8)&0xF);
144 snprintf( buf, len, "OCBI @R%d", Rn );
149 uint32_t Rn = ((ir>>8)&0xF);
150 snprintf( buf, len, "OCBP @R%d", Rn );
155 uint32_t Rn = ((ir>>8)&0xF);
156 snprintf( buf, len, "OCBWB @R%d", Rn );
160 { /* MOVCA.L R0, @Rn */
161 uint32_t Rn = ((ir>>8)&0xF);
162 snprintf( buf, len, "MOVCA.L R0, @R%d", Rn );
171 { /* MOV.B Rm, @(R0, Rn) */
172 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
173 snprintf( buf, len, "MOV.B R%d, @(R0, R%d)", Rm, Rn );
177 { /* MOV.W Rm, @(R0, Rn) */
178 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
179 snprintf( buf, len, "MOV.W R%d, @(R0, R%d)", Rm, Rn );
183 { /* MOV.L Rm, @(R0, Rn) */
184 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
185 snprintf( buf, len, "MOV.L R%d, @(R0, R%d)", Rm, Rn );
190 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
191 snprintf( buf, len, "MUL.L R%d, R%d", Rm, Rn );
195 switch( (ir&0xFF0) >> 4 ) {
198 snprintf( buf, len, "CLRT " );
203 snprintf( buf, len, "SETT " );
208 snprintf( buf, len, "CLRMAC " );
213 snprintf( buf, len, "LDTLB " );
218 snprintf( buf, len, "CLRS " );
223 snprintf( buf, len, "SETS " );
232 switch( (ir&0xF0) >> 4 ) {
235 snprintf( buf, len, "NOP " );
240 snprintf( buf, len, "DIV0U " );
245 uint32_t Rn = ((ir>>8)&0xF);
246 snprintf( buf, len, "MOVT R%d", Rn );
255 switch( (ir&0xF0) >> 4 ) {
258 uint32_t Rn = ((ir>>8)&0xF);
259 snprintf( buf, len, "STS MACH, R%d", Rn );
264 uint32_t Rn = ((ir>>8)&0xF);
265 snprintf( buf, len, "STS MACL, R%d", Rn );
270 uint32_t Rn = ((ir>>8)&0xF);
271 snprintf( buf, len, "STS PR, R%d", Rn );
276 uint32_t Rn = ((ir>>8)&0xF);
277 snprintf( buf, len, "STC SGR, R%d", Rn );
282 uint32_t Rn = ((ir>>8)&0xF);
283 snprintf( buf, len, "STS FPUL, R%d", Rn );
287 { /* STS FPSCR, Rn */
288 uint32_t Rn = ((ir>>8)&0xF);
289 snprintf( buf, len, "STS FPSCR, R%d", Rn );
294 uint32_t Rn = ((ir>>8)&0xF);
295 snprintf( buf, len, "STC DBR, R%d", Rn );
304 switch( (ir&0xFF0) >> 4 ) {
307 snprintf( buf, len, "RTS " );
312 snprintf( buf, len, "SLEEP " );
317 snprintf( buf, len, "RTE " );
326 { /* MOV.B @(R0, Rm), Rn */
327 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
328 snprintf( buf, len, "MOV.B @(R0, R%d), R%d", Rm, Rn );
332 { /* MOV.W @(R0, Rm), Rn */
333 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
334 snprintf( buf, len, "MOV.W @(R0, R%d), R%d", Rm, Rn );
338 { /* MOV.L @(R0, Rm), Rn */
339 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
340 snprintf( buf, len, "MOV.L @(R0, R%d), R%d", Rm, Rn );
344 { /* MAC.L @Rm+, @Rn+ */
345 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
346 snprintf( buf, len, "MAC.L @R%d+, @R%d+", Rm, Rn );
355 { /* MOV.L Rm, @(disp, Rn) */
356 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<2;
357 snprintf( buf, len, "MOV.L R%d, @(%d, R%d)", Rm, disp, Rn );
363 { /* MOV.B Rm, @Rn */
364 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
365 snprintf( buf, len, "MOV.B R%d, @R%d", Rm, Rn );
369 { /* MOV.W Rm, @Rn */
370 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
371 snprintf( buf, len, "MOV.W R%d, @R%d", Rm, Rn );
375 { /* MOV.L Rm, @Rn */
376 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
377 snprintf( buf, len, "MOV.L R%d, @R%d", Rm, Rn );
381 { /* MOV.B Rm, @-Rn */
382 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
383 snprintf( buf, len, "MOV.B R%d, @-R%d", Rm, Rn );
387 { /* MOV.W Rm, @-Rn */
388 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
389 snprintf( buf, len, "MOV.W R%d, @-R%d", Rm, Rn );
393 { /* MOV.L Rm, @-Rn */
394 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
395 snprintf( buf, len, "MOV.L R%d, @-R%d", Rm, Rn );
400 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
401 snprintf( buf, len, "DIV0S R%d, R%d", Rm, Rn );
406 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
407 snprintf( buf, len, "TST R%d, R%d", Rm, Rn );
412 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
413 snprintf( buf, len, "AND R%d, R%d", Rm, Rn );
418 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
419 snprintf( buf, len, "XOR R%d, R%d", Rm, Rn );
424 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
425 snprintf( buf, len, "OR R%d, R%d", Rm, Rn );
429 { /* CMP/STR Rm, Rn */
430 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
431 snprintf( buf, len, "CMP/STR R%d, R%d", Rm, Rn );
436 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
437 snprintf( buf, len, "XTRCT R%d, R%d", Rm, Rn );
441 { /* MULU.W Rm, Rn */
442 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
443 snprintf( buf, len, "MULU.W R%d, R%d", Rm, Rn );
447 { /* MULS.W Rm, Rn */
448 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
449 snprintf( buf, len, "MULS.W R%d, R%d", Rm, Rn );
460 { /* CMP/EQ Rm, Rn */
461 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
462 snprintf( buf, len, "CMP/EQ R%d, R%d", Rm, Rn );
466 { /* CMP/HS Rm, Rn */
467 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
468 snprintf( buf, len, "CMP/HS R%d, R%d", Rm, Rn );
472 { /* CMP/GE Rm, Rn */
473 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
474 snprintf( buf, len, "CMP/GE R%d, R%d", Rm, Rn );
479 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
480 snprintf( buf, len, "DIV1 R%d, R%d", Rm, Rn );
484 { /* DMULU.L Rm, Rn */
485 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
486 snprintf( buf, len, "DMULU.L R%d, R%d", Rm, Rn );
490 { /* CMP/HI Rm, Rn */
491 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
492 snprintf( buf, len, "CMP/HI R%d, R%d", Rm, Rn );
496 { /* CMP/GT Rm, Rn */
497 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
498 snprintf( buf, len, "CMP/GT R%d, R%d", Rm, Rn );
503 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
504 snprintf( buf, len, "SUB R%d, R%d", Rm, Rn );
509 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
510 snprintf( buf, len, "SUBC R%d, R%d", Rm, Rn );
515 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
516 snprintf( buf, len, "SUBV R%d, R%d", Rm, Rn );
521 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
522 snprintf( buf, len, "ADD R%d, R%d", Rm, Rn );
526 { /* DMULS.L Rm, Rn */
527 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
528 snprintf( buf, len, "DMULS.L R%d, R%d", Rm, Rn );
533 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
534 snprintf( buf, len, "ADDC R%d, R%d", Rm, Rn );
539 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
540 snprintf( buf, len, "ADDV R%d, R%d", Rm, Rn );
551 switch( (ir&0xF0) >> 4 ) {
554 uint32_t Rn = ((ir>>8)&0xF);
555 snprintf( buf, len, "SHLL R%d", Rn );
560 uint32_t Rn = ((ir>>8)&0xF);
561 snprintf( buf, len, "DT R%d", Rn );
566 uint32_t Rn = ((ir>>8)&0xF);
567 snprintf( buf, len, "SHAL R%d", Rn );
576 switch( (ir&0xF0) >> 4 ) {
579 uint32_t Rn = ((ir>>8)&0xF);
580 snprintf( buf, len, "SHLR R%d", Rn );
585 uint32_t Rn = ((ir>>8)&0xF);
586 snprintf( buf, len, "CMP/PZ R%d", Rn );
591 uint32_t Rn = ((ir>>8)&0xF);
592 snprintf( buf, len, "SHAR R%d", Rn );
601 switch( (ir&0xF0) >> 4 ) {
603 { /* STS.L MACH, @-Rn */
604 uint32_t Rn = ((ir>>8)&0xF);
605 snprintf( buf, len, "STS.L MACH, @-R%d", Rn );
609 { /* STS.L MACL, @-Rn */
610 uint32_t Rn = ((ir>>8)&0xF);
611 snprintf( buf, len, "STS.L MACL, @-R%d", Rn );
615 { /* STS.L PR, @-Rn */
616 uint32_t Rn = ((ir>>8)&0xF);
617 snprintf( buf, len, "STS.L PR, @-R%d", Rn );
621 { /* STC.L SGR, @-Rn */
622 uint32_t Rn = ((ir>>8)&0xF);
623 snprintf( buf, len, "STC.L SGR, @-R%d", Rn );
627 { /* STS.L FPUL, @-Rn */
628 uint32_t Rn = ((ir>>8)&0xF);
629 snprintf( buf, len, "STS.L FPUL, @-R%d", Rn );
633 { /* STS.L FPSCR, @-Rn */
634 uint32_t Rn = ((ir>>8)&0xF);
635 snprintf( buf, len, "STS.L FPSCR, @-R%d", Rn );
639 { /* STC.L DBR, @-Rn */
640 uint32_t Rn = ((ir>>8)&0xF);
641 snprintf( buf, len, "STC.L DBR, @-R%d", Rn );
650 switch( (ir&0x80) >> 7 ) {
652 switch( (ir&0x70) >> 4 ) {
654 { /* STC.L SR, @-Rn */
655 uint32_t Rn = ((ir>>8)&0xF);
656 snprintf( buf, len, "STC.L SR, @-R%d", Rn );
660 { /* STC.L GBR, @-Rn */
661 uint32_t Rn = ((ir>>8)&0xF);
662 snprintf( buf, len, "STC.L GBR, @-R%d", Rn );
666 { /* STC.L VBR, @-Rn */
667 uint32_t Rn = ((ir>>8)&0xF);
668 snprintf( buf, len, "STC.L VBR, @-R%d", Rn );
672 { /* STC.L SSR, @-Rn */
673 uint32_t Rn = ((ir>>8)&0xF);
674 snprintf( buf, len, "STC.L SSR, @-R%d", Rn );
678 { /* STC.L SPC, @-Rn */
679 uint32_t Rn = ((ir>>8)&0xF);
680 snprintf( buf, len, "STC.L SPC, @-R%d", Rn );
689 { /* STC.L Rm_BANK, @-Rn */
690 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm_BANK = ((ir>>4)&0x7);
691 snprintf( buf, len, "STC.L @-R%d_BANK, @-R%d", Rm_BANK, Rn );
697 switch( (ir&0xF0) >> 4 ) {
700 uint32_t Rn = ((ir>>8)&0xF);
701 snprintf( buf, len, "ROTL R%d", Rn );
706 uint32_t Rn = ((ir>>8)&0xF);
707 snprintf( buf, len, "ROTCL R%d", Rn );
716 switch( (ir&0xF0) >> 4 ) {
719 uint32_t Rn = ((ir>>8)&0xF);
720 snprintf( buf, len, "ROTR R%d", Rn );
725 uint32_t Rn = ((ir>>8)&0xF);
726 snprintf( buf, len, "CMP/PL R%d", Rn );
731 uint32_t Rn = ((ir>>8)&0xF);
732 snprintf( buf, len, "ROTCR R%d", Rn );
741 switch( (ir&0xF0) >> 4 ) {
743 { /* LDS.L @Rm+, MACH */
744 uint32_t Rm = ((ir>>8)&0xF);
745 snprintf( buf, len, "LDS.L @R%d+, MACH", Rm );
749 { /* LDS.L @Rm+, MACL */
750 uint32_t Rm = ((ir>>8)&0xF);
751 snprintf( buf, len, "LDS.L @R%d+, MACL", Rm );
755 { /* LDS.L @Rm+, PR */
756 uint32_t Rm = ((ir>>8)&0xF);
757 snprintf( buf, len, "LDS.L @R%d+, PR", Rm );
761 { /* LDC.L @Rm+, SGR */
762 uint32_t Rm = ((ir>>8)&0xF);
763 snprintf( buf, len, "LDC.L @R%d+, SGR", Rm );
767 { /* LDS.L @Rm+, FPUL */
768 uint32_t Rm = ((ir>>8)&0xF);
769 snprintf( buf, len, "LDS.L @R%d+, FPUL", Rm );
773 { /* LDS.L @Rm+, FPSCR */
774 uint32_t Rm = ((ir>>8)&0xF);
775 snprintf( buf, len, "LDS.L @R%d+, FPSCR", Rm );
779 { /* LDC.L @Rm+, DBR */
780 uint32_t Rm = ((ir>>8)&0xF);
781 snprintf( buf, len, "LDC.L @R%d+, DBR", Rm );
790 switch( (ir&0x80) >> 7 ) {
792 switch( (ir&0x70) >> 4 ) {
794 { /* LDC.L @Rm+, SR */
795 uint32_t Rm = ((ir>>8)&0xF);
796 snprintf( buf, len, "LDC.L @R%d+, SR", Rm );
800 { /* LDC.L @Rm+, GBR */
801 uint32_t Rm = ((ir>>8)&0xF);
802 snprintf( buf, len, "LDC.L @R%d+, GBR", Rm );
806 { /* LDC.L @Rm+, VBR */
807 uint32_t Rm = ((ir>>8)&0xF);
808 snprintf( buf, len, "LDC.L @R%d+, VBR", Rm );
812 { /* LDC.L @Rm+, SSR */
813 uint32_t Rm = ((ir>>8)&0xF);
814 snprintf( buf, len, "LDC.L @R%d+, SSR", Rm );
818 { /* LDC.L @Rm+, SPC */
819 uint32_t Rm = ((ir>>8)&0xF);
820 snprintf( buf, len, "LDC.L @R%d+, SPC", Rm );
829 { /* LDC.L @Rm+, Rn_BANK */
830 uint32_t Rm = ((ir>>8)&0xF); uint32_t Rn_BANK = ((ir>>4)&0x7);
831 snprintf( buf, len, "LDC.L @R%d+, @R%d+_BANK", Rm, Rn_BANK );
837 switch( (ir&0xF0) >> 4 ) {
840 uint32_t Rn = ((ir>>8)&0xF);
841 snprintf( buf, len, "SHLL2 R%d", Rn );
846 uint32_t Rn = ((ir>>8)&0xF);
847 snprintf( buf, len, "SHLL8 R%d", Rn );
852 uint32_t Rn = ((ir>>8)&0xF);
853 snprintf( buf, len, "SHLL16 R%d", Rn );
862 switch( (ir&0xF0) >> 4 ) {
865 uint32_t Rn = ((ir>>8)&0xF);
866 snprintf( buf, len, "SHLR2 R%d", Rn );
871 uint32_t Rn = ((ir>>8)&0xF);
872 snprintf( buf, len, "SHLR8 R%d", Rn );
877 uint32_t Rn = ((ir>>8)&0xF);
878 snprintf( buf, len, "SHLR16 R%d", Rn );
887 switch( (ir&0xF0) >> 4 ) {
890 uint32_t Rm = ((ir>>8)&0xF);
891 snprintf( buf, len, "LDS R%d, MACH", Rm );
896 uint32_t Rm = ((ir>>8)&0xF);
897 snprintf( buf, len, "LDS R%d, MACL", Rm );
902 uint32_t Rm = ((ir>>8)&0xF);
903 snprintf( buf, len, "LDS R%d, PR", Rm );
908 uint32_t Rm = ((ir>>8)&0xF);
909 snprintf( buf, len, "LDC R%d, SGR", Rm );
914 uint32_t Rm = ((ir>>8)&0xF);
915 snprintf( buf, len, "LDS R%d, FPUL", Rm );
919 { /* LDS Rm, FPSCR */
920 uint32_t Rm = ((ir>>8)&0xF);
921 snprintf( buf, len, "LDS R%d, FPSCR", Rm );
926 uint32_t Rm = ((ir>>8)&0xF);
927 snprintf( buf, len, "LDC R%d, DBR", Rm );
936 switch( (ir&0xF0) >> 4 ) {
939 uint32_t Rn = ((ir>>8)&0xF);
940 snprintf( buf, len, "JSR @R%d", Rn );
945 uint32_t Rn = ((ir>>8)&0xF);
946 snprintf( buf, len, "TAS.B R%d", Rn );
951 uint32_t Rn = ((ir>>8)&0xF);
952 snprintf( buf, len, "JMP @R%d", Rn );
962 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
963 snprintf( buf, len, "SHAD R%d, R%d", Rm, Rn );
968 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
969 snprintf( buf, len, "SHLD R%d, R%d", Rm, Rn );
973 switch( (ir&0x80) >> 7 ) {
975 switch( (ir&0x70) >> 4 ) {
978 uint32_t Rm = ((ir>>8)&0xF);
979 snprintf( buf, len, "LDC R%d, SR", Rm );
984 uint32_t Rm = ((ir>>8)&0xF);
985 snprintf( buf, len, "LDC R%d, GBR", Rm );
990 uint32_t Rm = ((ir>>8)&0xF);
991 snprintf( buf, len, "LDC R%d, VBR", Rm );
996 uint32_t Rm = ((ir>>8)&0xF);
997 snprintf( buf, len, "LDC R%d, SSR", Rm );
1002 uint32_t Rm = ((ir>>8)&0xF);
1003 snprintf( buf, len, "LDC R%d, SPC", Rm );
1012 { /* LDC Rm, Rn_BANK */
1013 uint32_t Rm = ((ir>>8)&0xF); uint32_t Rn_BANK = ((ir>>4)&0x7);
1014 snprintf( buf, len, "LDC R%d, R%d_BANK", Rm, Rn_BANK );
1020 { /* MAC.W @Rm+, @Rn+ */
1021 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1022 snprintf( buf, len, "MAC.W @R%d+, @R%d+", Rm, Rn );
1028 { /* MOV.L @(disp, Rm), Rn */
1029 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<2;
1030 snprintf( buf, len, "MOV.L @(%d, R%d), R%d", disp, Rm, Rn );
1036 { /* MOV.B @Rm, Rn */
1037 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1038 snprintf( buf, len, "MOV.B @R%d, R%d", Rm, Rn );
1042 { /* MOV.W @Rm, Rn */
1043 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1044 snprintf( buf, len, "MOV.W @R%d, R%d", Rm, Rn );
1048 { /* MOV.L @Rm, Rn */
1049 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1050 snprintf( buf, len, "MOV.L @R%d, R%d", Rm, Rn );
1055 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1056 snprintf( buf, len, "MOV R%d, R%d", Rm, Rn );
1060 { /* MOV.B @Rm+, Rn */
1061 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1062 snprintf( buf, len, "MOV.B @R%d+, R%d", Rm, Rn );
1066 { /* MOV.W @Rm+, Rn */
1067 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1068 snprintf( buf, len, "MOV.W @R%d+, R%d", Rm, Rn );
1072 { /* MOV.L @Rm+, Rn */
1073 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1074 snprintf( buf, len, "MOV.L @R%d+, R%d", Rm, Rn );
1079 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1080 snprintf( buf, len, "NOT R%d, R%d", Rm, Rn );
1084 { /* SWAP.B Rm, Rn */
1085 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1086 snprintf( buf, len, "SWAP.B R%d, R%d", Rm, Rn );
1090 { /* SWAP.W Rm, Rn */
1091 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1092 snprintf( buf, len, "SWAP.W R%d, R%d", Rm, Rn );
1097 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1098 snprintf( buf, len, "NEGC R%d, R%d", Rm, Rn );
1103 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1104 snprintf( buf, len, "NEG R%d, R%d", Rm, Rn );
1108 { /* EXTU.B Rm, Rn */
1109 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1110 snprintf( buf, len, "EXTU.B R%d, R%d", Rm, Rn );
1114 { /* EXTU.W Rm, Rn */
1115 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1116 snprintf( buf, len, "EXTU.W R%d, R%d", Rm, Rn );
1120 { /* EXTS.B Rm, Rn */
1121 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1122 snprintf( buf, len, "EXTS.B R%d, R%d", Rm, Rn );
1126 { /* EXTS.W Rm, Rn */
1127 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1128 snprintf( buf, len, "EXTS.W R%d, R%d", Rm, Rn );
1134 { /* ADD #imm, Rn */
1135 uint32_t Rn = ((ir>>8)&0xF); int32_t imm = SIGNEXT8(ir&0xFF);
1136 snprintf( buf, len, "ADD #%d, R%d", imm, Rn );
1140 switch( (ir&0xF00) >> 8 ) {
1142 { /* MOV.B R0, @(disp, Rn) */
1143 uint32_t Rn = ((ir>>4)&0xF); uint32_t disp = (ir&0xF);
1144 snprintf( buf, len, "MOV.B R0, @(%d, R%d)", disp, Rn );
1148 { /* MOV.W R0, @(disp, Rn) */
1149 uint32_t Rn = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<1;
1150 snprintf( buf, len, "MOV.W R0, @(%d, R%d)", disp, Rn );
1154 { /* MOV.B @(disp, Rm), R0 */
1155 uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF);
1156 snprintf( buf, len, "MOV.B @(%d, R%d), R0", disp, Rm );
1160 { /* MOV.W @(disp, Rm), R0 */
1161 uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<1;
1162 snprintf( buf, len, "MOV.W @(%d, R%d), R0", disp, Rm );
1166 { /* CMP/EQ #imm, R0 */
1167 int32_t imm = SIGNEXT8(ir&0xFF);
1168 snprintf( buf, len, "CMP/EQ #%d, R0", imm );
1173 int32_t disp = SIGNEXT8(ir&0xFF)<<1;
1174 snprintf( buf, len, "BT $%xh", disp+pc+4 );
1179 int32_t disp = SIGNEXT8(ir&0xFF)<<1;
1180 snprintf( buf, len, "BF $%xh", disp+pc+4 );
1185 int32_t disp = SIGNEXT8(ir&0xFF)<<1;
1186 snprintf( buf, len, "BT/S $%xh", disp+pc+4 );
1191 int32_t disp = SIGNEXT8(ir&0xFF)<<1;
1192 snprintf( buf, len, "BF/S $%xh", disp+pc+4 );
1201 { /* MOV.W @(disp, PC), Rn */
1202 uint32_t Rn = ((ir>>8)&0xF); uint32_t disp = (ir&0xFF)<<1;
1203 snprintf( buf, len, "MOV.W @($%xh), R%d ; <- #%08x", disp + pc + 4, Rn, sh4_read_word(disp+addr+4) );
1208 int32_t disp = SIGNEXT12(ir&0xFFF)<<1;
1209 snprintf( buf, len, "BRA $%xh", disp+pc+4 );
1214 int32_t disp = SIGNEXT12(ir&0xFFF)<<1;
1215 snprintf( buf, len, "BSR $%xh", disp+pc+4 );
1219 switch( (ir&0xF00) >> 8 ) {
1221 { /* MOV.B R0, @(disp, GBR) */
1222 uint32_t disp = (ir&0xFF);
1223 snprintf( buf, len, "MOV.B R0, @(%d, GBR)", disp );
1227 { /* MOV.W R0, @(disp, GBR) */
1228 uint32_t disp = (ir&0xFF)<<1;
1229 snprintf( buf, len, "MOV.W R0, @(%d, GBR)", disp);
1233 { /* MOV.L R0, @(disp, GBR) */
1234 uint32_t disp = (ir&0xFF)<<2;
1235 snprintf( buf, len, "MOV.L R0, @(%d, GBR)", disp );
1240 uint32_t imm = (ir&0xFF);
1241 snprintf( buf, len, "TRAPA #%d", imm );
1245 { /* MOV.B @(disp, GBR), R0 */
1246 uint32_t disp = (ir&0xFF);
1247 snprintf( buf, len, "MOV.B @(%d, GBR), R0", disp );
1251 { /* MOV.W @(disp, GBR), R0 */
1252 uint32_t disp = (ir&0xFF)<<1;
1253 snprintf( buf, len, "MOV.W @(%d, GBR), R0", disp );
1257 { /* MOV.L @(disp, GBR), R0 */
1258 uint32_t disp = (ir&0xFF)<<2;
1259 snprintf( buf, len, "MOV.L @(%d, GBR), R0",disp );
1263 { /* MOVA @(disp, PC), R0 */
1264 uint32_t disp = (ir&0xFF)<<2;
1265 snprintf( buf, len, "MOVA @($%xh), R0", disp + (pc&0xFFFFFFFC) + 4 );
1269 { /* TST #imm, R0 */
1270 uint32_t imm = (ir&0xFF);
1271 snprintf( buf, len, "TST #%d, R0", imm );
1275 { /* AND #imm, R0 */
1276 uint32_t imm = (ir&0xFF);
1277 snprintf( buf, len, "AND #%d, R0", imm );
1281 { /* XOR #imm, R0 */
1282 uint32_t imm = (ir&0xFF);
1283 snprintf( buf, len, "XOR #%d, R0", imm );
1288 uint32_t imm = (ir&0xFF);
1289 snprintf( buf, len, "OR #%d, R0", imm );
1293 { /* TST.B #imm, @(R0, GBR) */
1294 uint32_t imm = (ir&0xFF);
1295 snprintf( buf, len, "TST.B #%d, @(R0, GBR)", imm );
1299 { /* AND.B #imm, @(R0, GBR) */
1300 uint32_t imm = (ir&0xFF);
1301 snprintf( buf, len, "AND.B #%d, @(R0, GBR)", imm );
1305 { /* XOR.B #imm, @(R0, GBR) */
1306 uint32_t imm = (ir&0xFF);
1307 snprintf( buf, len, "XOR.B #%d, @(R0, GBR)", imm );
1311 { /* OR.B #imm, @(R0, GBR) */
1312 uint32_t imm = (ir&0xFF);
1313 snprintf( buf, len, "OR.B #%d, @(R0, GBR)", imm );
1319 { /* MOV.L @(disp, PC), Rn */
1320 uint32_t Rn = ((ir>>8)&0xF); uint32_t disp = (ir&0xFF)<<2;
1321 snprintf( buf, len, "MOV.L @($%xh), R%d ; <- #%08x", disp + (pc & 0xFFFFFFFC) + 4, Rn, sh4_read_long(disp+(addr&0xFFFFFFFC)+4) );
1325 { /* MOV #imm, Rn */
1326 uint32_t Rn = ((ir>>8)&0xF); int32_t imm = SIGNEXT8(ir&0xFF);
1327 snprintf( buf, len, "MOV #%d, R%d", imm, Rn );
1333 { /* FADD FRm, FRn */
1334 uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
1335 snprintf( buf, len, "FADD FR%d, FR%d", FRm, FRn );
1339 { /* FSUB FRm, FRn */
1340 uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
1341 snprintf( buf, len, "FSUB FR%d, FR%d", FRm, FRn );
1345 { /* FMUL FRm, FRn */
1346 uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
1347 snprintf( buf, len, "FMUL FR%d, FR%d", FRm, FRn );
1351 { /* FDIV FRm, FRn */
1352 uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
1353 snprintf( buf, len, "FDIV FR%d, FR%d", FRm, FRn );
1357 { /* FCMP/EQ FRm, FRn */
1358 uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
1359 snprintf( buf, len, "FCMP/EQ FR%d, FR%d", FRm, FRn );
1363 { /* FCMP/GT FRm, FRn */
1364 uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
1365 snprintf( buf, len, "FCMP/QT FR%d, FR%d", FRm, FRn );
1369 { /* FMOV @(R0, Rm), FRn */
1370 uint32_t FRn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1371 snprintf( buf, len, "FMOV @(R0, R%d), FR%d", Rm, FRn );
1375 { /* FMOV FRm, @(R0, Rn) */
1376 uint32_t Rn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
1377 snprintf( buf, len, "FMOV FR%d, @(R0, R%d)", FRm, Rn );
1381 { /* FMOV @Rm, FRn */
1382 uint32_t FRn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1383 snprintf( buf, len, "FMOV @R%d, FR%d", Rm, FRn );
1387 { /* FMOV @Rm+, FRn */
1388 uint32_t FRn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1389 snprintf( buf, len, "FMOV @R%d+, FR%d", Rm, FRn );
1393 { /* FMOV FRm, @Rn */
1394 uint32_t Rn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
1395 snprintf( buf, len, "FMOV FR%d, @R%d", FRm, Rn );
1399 { /* FMOV FRm, @-Rn */
1400 uint32_t Rn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
1401 snprintf( buf, len, "FMOV FR%d, @-R%d", FRm, Rn );
1405 { /* FMOV FRm, FRn */
1406 uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
1407 snprintf( buf, len, "FMOV FR%d, FR%d", FRm, FRn );
1411 switch( (ir&0xF0) >> 4 ) {
1413 { /* FSTS FPUL, FRn */
1414 uint32_t FRn = ((ir>>8)&0xF);
1415 snprintf( buf, len, "FSTS FPUL, FR%d", FRn );
1419 { /* FLDS FRm, FPUL */
1420 uint32_t FRm = ((ir>>8)&0xF);
1421 snprintf( buf, len, "FLDS FR%d, FPUL", FRm );
1425 { /* FLOAT FPUL, FRn */
1426 uint32_t FRn = ((ir>>8)&0xF);
1427 snprintf( buf, len, "FLOAT FPUL, FR%d", FRn );
1431 { /* FTRC FRm, FPUL */
1432 uint32_t FRm = ((ir>>8)&0xF);
1433 snprintf( buf, len, "FTRC FR%d, FPUL", FRm );
1438 uint32_t FRn = ((ir>>8)&0xF);
1439 snprintf( buf, len, "FNEG FR%d", FRn );
1444 uint32_t FRn = ((ir>>8)&0xF);
1445 snprintf( buf, len, "FABS FR%d", FRn );
1450 uint32_t FRn = ((ir>>8)&0xF);
1451 snprintf( buf, len, "FSQRT FR%d", FRn );
1456 uint32_t FRn = ((ir>>8)&0xF);
1457 snprintf( buf, len, "FSRRA FR%d", FRn );
1462 uint32_t FRn = ((ir>>8)&0xF);
1463 snprintf( buf, len, "FLDI0 FR%d", FRn );
1468 uint32_t FRn = ((ir>>8)&0xF);
1469 snprintf( buf, len, "FLDI1 FR%d", FRn );
1473 { /* FCNVSD FPUL, FRn */
1474 uint32_t FRn = ((ir>>8)&0xF);
1475 snprintf( buf, len, "FCNVSD FPUL, FR%d", FRn );
1479 { /* FCNVDS FRm, FPUL */
1480 uint32_t FRm = ((ir>>8)&0xF);
1481 snprintf( buf, len, "FCNVDS FR%d, FPUL", FRm );
1485 { /* FIPR FVm, FVn */
1486 uint32_t FVn = ((ir>>10)&0x3); uint32_t FVm = ((ir>>8)&0x3);
1487 snprintf( buf, len, "FIPR FV%d, FV%d", FVm, FVn );
1491 switch( (ir&0x100) >> 8 ) {
1493 { /* FSCA FPUL, FRn */
1494 uint32_t FRn = ((ir>>9)&0x7)<<1;
1495 snprintf( buf, len, "FSCA FPUL, FR%d", FRn );
1499 switch( (ir&0x200) >> 9 ) {
1501 { /* FTRV XMTRX, FVn */
1502 uint32_t FVn = ((ir>>10)&0x3);
1503 snprintf( buf, len, "FTRV XMTRX, FV%d", FVn );
1507 switch( (ir&0xC00) >> 10 ) {
1510 snprintf( buf, len, "FSCHG " );
1515 snprintf( buf, len, "FRCHG " );
1520 snprintf( buf, len, "UNDEF " );
1538 { /* FMAC FR0, FRm, FRn */
1539 uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
1540 snprintf( buf, len, "FMAC FR0, FR%d, FR%d", FRm, FRn );
1554 void sh4_disasm_region( FILE *f, int from, int to )
1560 for( pc = from; pc < to; pc+=2 ) {
1562 sh4_disasm_instruction( pc,
1563 buf, sizeof(buf), opcode );
1564 fprintf( f, " %08x: %s %s\n", pc, opcode, buf );
1568 void sh4_dump_region( int from, int to )
1570 sh4_disasm_region( stdout, from, to );
.