lxdream 0.9.1| filename | src/sh4/ia64abi.h |
| changeset | 577:a181aeacd6e8 |
| prev | 571:9bc09948d0f2 |
| next | 580:508dc852a8eb |
| author | nkeynes |
| date | Mon Jan 14 10:23:49 2008 +0000 (16 years ago) |
| branch | lxdream-mmu |
| permissions | -rw-r--r-- |
| last change | Remove asm file and convert to inline (easier to cope with platform conventions) Add breakpoint support Add MMU store-queue support |
| view | annotate | diff | log | raw |
1 /**
2 * $Id$
3 *
4 * Provides the implementation for the ia32 ABI (eg prologue, epilogue, and
5 * calling conventions)
6 *
7 * Copyright (c) 2007 Nathan Keynes.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 */
20 #ifndef __lxdream_x86_64abi_H
21 #define __lxdream_x86_64abi_H 1
24 #define load_ptr( reg, ptr ) load_imm64( reg, (uint64_t)ptr );
26 /**
27 * Note: clobbers EAX to make the indirect call - this isn't usually
28 * a problem since the callee will usually clobber it anyway.
29 * Size: 12 bytes
30 */
31 #define CALL_FUNC0_SIZE 12
32 static inline void call_func0( void *ptr )
33 {
34 load_imm64(R_EAX, (uint64_t)ptr);
35 CALL_r32(R_EAX);
36 }
38 #define CALL_FUNC1_SIZE 14
39 static inline void call_func1( void *ptr, int arg1 )
40 {
41 MOV_r32_r32(arg1, R_EDI);
42 call_func0(ptr);
43 }
45 #define CALL_FUNC2_SIZE 16
46 static inline void call_func2( void *ptr, int arg1, int arg2 )
47 {
48 MOV_r32_r32(arg1, R_EDI);
49 MOV_r32_r32(arg2, R_ESI);
50 call_func0(ptr);
51 }
53 #define MEM_WRITE_DOUBLE_SIZE 35
54 /**
55 * Write a double (64-bit) value into memory, with the first word in arg2a, and
56 * the second in arg2b
57 */
58 static inline void MEM_WRITE_DOUBLE( int addr, int arg2a, int arg2b )
59 {
60 PUSH_r32(arg2b);
61 PUSH_r32(addr);
62 call_func2(sh4_write_long, addr, arg2a);
63 POP_r32(R_EDI);
64 POP_r32(R_ESI);
65 ADD_imm8s_r32(4, R_EDI);
66 call_func0(sh4_write_long);
67 }
69 #define MEM_READ_DOUBLE_SIZE 43
70 /**
71 * Read a double (64-bit) value from memory, writing the first word into arg2a
72 * and the second into arg2b. The addr must not be in EAX
73 */
74 static inline void MEM_READ_DOUBLE( int addr, int arg2a, int arg2b )
75 {
76 REXW(); SUB_imm8s_r32( 8, R_ESP );
77 PUSH_r32(addr);
78 call_func1(sh4_read_long, addr);
79 POP_r32(R_EDI);
80 PUSH_r32(R_EAX);
81 ADD_imm8s_r32(4, R_EDI);
82 call_func0(sh4_read_long);
83 MOV_r32_r32(R_EAX, arg2b);
84 POP_r32(arg2a);
85 REXW(); ADD_imm8s_r32( 8, R_ESP );
86 }
89 /**
90 * Emit the 'start of block' assembly. Sets up the stack frame and save
91 * SI/DI as required
92 */
93 void sh4_translate_begin_block( sh4addr_t pc )
94 {
95 PUSH_r32(R_EBP);
96 /* mov &sh4r, ebp */
97 load_ptr( R_EBP, &sh4r );
99 sh4_x86.in_delay_slot = FALSE;
100 sh4_x86.priv_checked = FALSE;
101 sh4_x86.fpuen_checked = FALSE;
102 sh4_x86.branch_taken = FALSE;
103 sh4_x86.backpatch_posn = 0;
104 sh4_x86.recovery_posn = 0;
105 sh4_x86.block_start_pc = pc;
106 sh4_x86.tlb_on = IS_MMU_ENABLED();
107 sh4_x86.tstate = TSTATE_NONE;
108 }
110 /**
111 * Exit the block with sh4r.pc already written
112 * Bytes: 15
113 */
114 void exit_block_pcset( sh4addr_t pc )
115 {
116 load_imm32( R_ECX, ((pc - sh4_x86.block_start_pc)>>1)*sh4_cpu_period ); // 5
117 ADD_r32_sh4r( R_ECX, REG_OFFSET(slice_cycle) ); // 6
118 load_spreg( R_EAX, REG_OFFSET(pc) );
119 if( sh4_x86.tlb_on ) {
120 call_func1(xlat_get_code_by_vma,R_EAX);
121 } else {
122 call_func1(xlat_get_code,R_EAX);
123 }
124 POP_r32(R_EBP);
125 RET();
126 }
128 #define EXIT_BLOCK_SIZE(pc) (25 + (IS_IN_ICACHE(pc)?10:CALL_FUNC1_SIZE))
129 /**
130 * Exit the block to an absolute PC
131 */
132 void exit_block( sh4addr_t pc, sh4addr_t endpc )
133 {
134 load_imm32( R_ECX, pc ); // 5
135 store_spreg( R_ECX, REG_OFFSET(pc) ); // 3
136 if( IS_IN_ICACHE(pc) ) {
137 REXW(); MOV_moff32_EAX( xlat_get_lut_entry(pc) );
138 } else if( sh4_x86.tlb_on ) {
139 call_func1(xlat_get_code_by_vma, R_ECX);
140 } else {
141 call_func1(xlat_get_code,R_ECX);
142 }
143 REXW(); AND_imm8s_r32( 0xFC, R_EAX ); // 4
144 load_imm32( R_ECX, ((endpc - sh4_x86.block_start_pc)>>1)*sh4_cpu_period ); // 5
145 ADD_r32_sh4r( R_ECX, REG_OFFSET(slice_cycle) ); // 6
146 POP_r32(R_EBP);
147 RET();
148 }
151 #define EXIT_BLOCK_REL_SIZE(pc) (28 + (IS_IN_ICACHE(pc)?10:CALL_FUNC1_SIZE))
153 /**
154 * Exit the block to a relative PC
155 */
156 void exit_block_rel( sh4addr_t pc, sh4addr_t endpc )
157 {
158 load_imm32( R_ECX, pc - sh4_x86.block_start_pc ); // 5
159 ADD_sh4r_r32( R_PC, R_ECX );
160 store_spreg( R_ECX, REG_OFFSET(pc) ); // 3
161 if( IS_IN_ICACHE(pc) ) {
162 MOV_moff32_EAX( xlat_get_lut_entry(GET_ICACHE_PHYS(pc)) ); // 5
163 } else if( sh4_x86.tlb_on ) {
164 call_func1(xlat_get_code_by_vma,R_ECX);
165 } else {
166 call_func1(xlat_get_code,R_ECX);
167 }
168 REXW(); AND_imm8s_r32( 0xFC, R_EAX ); // 4
169 load_imm32( R_ECX, ((endpc - sh4_x86.block_start_pc)>>1)*sh4_cpu_period ); // 5
170 ADD_r32_sh4r( R_ECX, REG_OFFSET(slice_cycle) ); // 6
171 POP_r32(R_EBP);
172 RET();
173 }
175 /**
176 * Write the block trailer (exception handling block)
177 */
178 void sh4_translate_end_block( sh4addr_t pc ) {
179 if( sh4_x86.branch_taken == FALSE ) {
180 // Didn't exit unconditionally already, so write the termination here
181 exit_block_rel( pc, pc );
182 }
183 if( sh4_x86.backpatch_posn != 0 ) {
184 unsigned int i;
185 // Raise exception
186 uint8_t *end_ptr = xlat_output;
187 MOV_r32_r32( R_EDX, R_ECX );
188 ADD_r32_r32( R_EDX, R_ECX );
189 ADD_r32_sh4r( R_ECX, R_PC );
190 MOV_moff32_EAX( &sh4_cpu_period );
191 MUL_r32( R_EDX );
192 ADD_r32_sh4r( R_EAX, REG_OFFSET(slice_cycle) );
194 call_func0( sh4_raise_exception );
195 load_spreg( R_EAX, R_PC );
196 if( sh4_x86.tlb_on ) {
197 call_func1(xlat_get_code_by_vma,R_EAX);
198 } else {
199 call_func1(xlat_get_code,R_EAX);
200 }
201 POP_r32(R_EBP);
202 RET();
204 // Exception already raised - just cleanup
205 uint8_t *preexc_ptr = xlat_output;
206 MOV_r32_r32( R_EDX, R_ECX );
207 ADD_r32_r32( R_EDX, R_ECX );
208 ADD_r32_sh4r( R_ECX, R_SPC );
209 MOV_moff32_EAX( &sh4_cpu_period );
210 MUL_r32( R_EDX );
211 ADD_r32_sh4r( R_EAX, REG_OFFSET(slice_cycle) );
212 load_spreg( R_EDI, R_PC );
213 if( sh4_x86.tlb_on ) {
214 call_func0(xlat_get_code_by_vma);
215 } else {
216 call_func0(xlat_get_code);
217 }
218 POP_r32(R_EBP);
219 RET();
221 for( i=0; i< sh4_x86.backpatch_posn; i++ ) {
222 *sh4_x86.backpatch_list[i].fixup_addr =
223 xlat_output - ((uint8_t *)sh4_x86.backpatch_list[i].fixup_addr) - 4;
224 if( sh4_x86.backpatch_list[i].exc_code == -1 ) {
225 load_imm32( R_EDX, sh4_x86.backpatch_list[i].fixup_icount );
226 int rel = preexc_ptr - xlat_output;
227 JMP_rel(rel);
228 } else {
229 load_imm32( R_EDI, sh4_x86.backpatch_list[i].exc_code );
230 load_imm32( R_EDX, sh4_x86.backpatch_list[i].fixup_icount );
231 int rel = end_ptr - xlat_output;
232 JMP_rel(rel);
233 }
234 }
235 }
236 }
239 void *xlat_get_native_pc()
240 {
241 void *result = NULL;
242 asm(
243 "mov %%rbp, %%rax\n\t"
244 "mov $0x8, %%ecx\n\t"
245 "mov %1, %%rdx\n"
246 "frame_loop: test %%rax, %%rax\n\t"
247 "je frame_not_found\n\t"
248 "cmpq (%%rax), %%rdx\n\t"
249 "je frame_found\n\t"
250 "sub $0x1, %%ecx\n\t"
251 "je frame_not_found\n\t"
252 "movq (%%rax), %%rax\n\t"
253 "jmp frame_loop\n"
254 "frame_found: movq 0x4(%%rax), %0\n"
255 "frame_not_found:"
256 : "=r" (result)
257 : "r" (&sh4r)
258 : "rax", "rcx", "rdx" );
259 return result;
260 }
262 #endif
.