lxdream 0.9.1| filename | src/sh4/sh4stat.in |
| changeset | 561:533f6b478071 |
| prev | 500:848e66eee418 |
| next | 671:a530ea88eebd |
| author | nkeynes |
| date | Mon Jan 14 10:23:49 2008 +0000 (16 years ago) |
| branch | lxdream-mmu |
| permissions | -rw-r--r-- |
| last change | Remove asm file and convert to inline (easier to cope with platform conventions) Add breakpoint support Add MMU store-queue support |
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1 /**
2 * $Id$
3 *
4 * Support module for collecting instruction stats
5 *
6 * Copyright (c) 2005 Nathan Keynes.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
19 #include "dream.h"
20 #include "sh4stat.h"
21 #include "sh4core.h"
23 static uint64_t sh4_stats[SH4_INSTRUCTION_COUNT+1];
24 static uint64_t sh4_stats_total;
25 static const char *sh4_stats_names[] = {
26 "???",
27 "ADD Rm, Rn",
28 "ADD #imm, Rn",
29 "ADDC Rm, Rn",
30 "ADDV Rm, Rn",
31 "AND Rm, Rn",
32 "AND #imm, R0",
33 "AND.B #imm, @(R0, GBR)",
34 "BF disp",
35 "BF/S disp",
36 "BRA disp",
37 "BRAF Rn",
38 "BSR disp",
39 "BSRF Rn",
40 "BT disp",
41 "BT/S disp",
42 "CLRMAC",
43 "CLRS",
44 "CLRT",
45 "CMP/EQ Rm, Rn",
46 "CMP/EQ #imm, R0",
47 "CMP/GE Rm, Rn",
48 "CMP/GT Rm, Rn",
49 "CMP/HI Rm, Rn",
50 "CMP/HS Rm, Rn",
51 "CMP/PL Rn",
52 "CMP/PZ Rn",
53 "CMP/STR Rm, Rn",
54 "DIV0S Rm, Rn",
55 "DIV0U",
56 "DIV1 Rm, Rn",
57 "DMULS.L Rm, Rn",
58 "DMULU.L Rm, Rn",
59 "DT Rn",
60 "EXTS.B Rm, Rn",
61 "EXTS.W Rm, Rn",
62 "EXTU.B Rm, Rn",
63 "EXTU.W Rm, Rn",
64 "FABS FRn",
65 "FADD FRm, FRn",
66 "FCMP/EQ FRm, FRn",
67 "FCMP/GT FRm, FRn",
68 "FCNVDS FRm, FPUL",
69 "FCNVSD FPUL, FRn",
70 "FDIV FRm, FRn",
71 "FIPR FVm, FVn",
72 "FLDS FRm, FPUL",
73 "FLDI0 FRn",
74 "FLDI1 FRn",
75 "FLOAT FPUL, FRn",
76 "FMAC FR0, FRm, FRn",
77 "FMOV FRm, FRn",
78 "FMOV FRm, @Rn",
79 "FMOV FRm, @-Rn",
80 "FMOV FRm, @(R0, Rn)",
81 "FMOV @Rm, FRn",
82 "FMOV @Rm+, FRn",
83 "FMOV @(R0, Rm), FRn",
84 "FMUL FRm, FRn",
85 "FNEG FRn",
86 "FRCHG",
87 "FSCA FPUL, FRn",
88 "FSCHG",
89 "FSQRT FRn",
90 "FSRRA FRn",
91 "FSTS FPUL, FRn",
92 "FSUB FRm, FRn",
93 "FTRC FRm, FPUL",
94 "FTRV XMTRX, FVn",
95 "JMP @Rn",
96 "JSR @Rn",
97 "LDC Rm, SR",
98 "LDC Rm, *",
99 "LDC.L @Rm+, SR",
100 "LDC.L @Rm+, *",
101 "LDS Rm, *",
102 "LDS.L @Rm+, *",
103 "LDTLB",
104 "MAC.L @Rm+, @Rn+",
105 "MAC.W @Rm+, @Rn+",
106 "MOV Rm, Rn",
107 "MOV #imm, Rn",
108 "MOV.B ...",
109 "MOV.L ...",
110 "MOV.L @(disp, PC)",
111 "MOV.W ...",
112 "MOVA @(disp, PC), R0",
113 "MOVCA.L R0, @Rn",
114 "MOVT Rn",
115 "MUL.L Rm, Rn",
116 "MULS.W Rm, Rn",
117 "MULU.W Rm, Rn",
118 "NEG Rm, Rn",
119 "NEGC Rm, Rn",
120 "NOP",
121 "NOT Rm, Rn",
122 "OCBI @Rn",
123 "OCBP @Rn",
124 "OCBWB @Rn",
125 "OR Rm, Rn",
126 "OR #imm, R0",
127 "OR.B #imm, @(R0, GBR)",
128 "PREF @Rn",
129 "ROTCL Rn",
130 "ROTCR Rn",
131 "ROTL Rn",
132 "ROTR Rn",
133 "RTE",
134 "RTS",
135 "SETS",
136 "SETT",
137 "SHAD Rm, Rn",
138 "SHAL Rn",
139 "SHAR Rn",
140 "SHLD Rm, Rn",
141 "SHLL* Rn",
142 "SHLR* Rn",
143 "SLEEP",
144 "STC SR, Rn",
145 "STC *, Rn",
146 "STC.L SR, @-Rn",
147 "STC.L *, @-Rn",
148 "STS *, Rn",
149 "STS.L *, @-Rn",
150 "SUB Rm, Rn",
151 "SUBC Rm, Rn",
152 "SUBV Rm, Rn",
153 "SWAP.B Rm, Rn",
154 "SWAP.W Rm, Rn",
155 "TAS.B @Rn",
156 "TRAPA #imm",
157 "TST Rm, Rn",
158 "TST #imm, R0",
159 "TST.B #imm, @(R0, GBR)",
160 "XOR Rm, Rn",
161 "XOR #imm, R0",
162 "XOR.B #imm, @(R0, GBR)",
163 "XTRCT Rm, Rn",
164 "UNDEF"
165 };
167 void sh4_stats_reset( void )
168 {
169 int i;
170 for( i=0; i<= I_UNDEF; i++ ) {
171 sh4_stats[i] = 0;
172 }
173 sh4_stats_total = 0;
174 }
176 void sh4_stats_print( FILE *out )
177 {
178 int i;
179 for( i=0; i<= I_UNDEF; i++ ) {
180 fprintf( out, "%-20s\t%d\t%.2f%%\n", sh4_stats_names[i], (uint32_t)sh4_stats[i], ((double)sh4_stats[i])*100.0/(double)sh4_stats_total );
181 }
182 fprintf( out, "Total: %lld\n", sh4_stats_total );
183 }
185 void sh4_stats_add( uint32_t pc )
186 {
187 uint16_t ir = sh4_read_word(pc);
188 #define UNDEF() sh4_stats[0]++
189 %%
190 ADD Rm, Rn {: sh4_stats[I_ADD]++; :}
191 ADD #imm, Rn {: sh4_stats[I_ADDI]++; :}
192 ADDC Rm, Rn {: sh4_stats[I_ADDC]++; :}
193 ADDV Rm, Rn {: sh4_stats[I_ADDV]++; :}
194 AND Rm, Rn {: sh4_stats[I_AND]++; :}
195 AND #imm, R0 {: sh4_stats[I_ANDI]++; :}
196 AND.B #imm, @(R0, GBR) {: sh4_stats[I_ANDB]++; :}
197 BF disp {: sh4_stats[I_BF]++; :}
198 BF/S disp {: sh4_stats[I_BFS]++; :}
199 BRA disp {: sh4_stats[I_BRA]++; :}
200 BRAF Rn {: sh4_stats[I_BRAF]++; :}
201 BSR disp {: sh4_stats[I_BSR]++; :}
202 BSRF Rn {: sh4_stats[I_BSRF]++; :}
203 BT disp {: sh4_stats[I_BT]++; :}
204 BT/S disp {: sh4_stats[I_BTS]++; :}
205 CLRMAC {: sh4_stats[I_CLRMAC]++; :}
206 CLRS {: sh4_stats[I_CLRS]++; :}
207 CLRT {: sh4_stats[I_CLRT]++; :}
208 CMP/EQ Rm, Rn {: sh4_stats[I_CMPEQ]++; :}
209 CMP/EQ #imm, R0 {: sh4_stats[I_CMPEQI]++; :}
210 CMP/GE Rm, Rn {: sh4_stats[I_CMPGE]++; :}
211 CMP/GT Rm, Rn {: sh4_stats[I_CMPGT]++; :}
212 CMP/HI Rm, Rn {: sh4_stats[I_CMPHI]++; :}
213 CMP/HS Rm, Rn {: sh4_stats[I_CMPHS]++; :}
214 CMP/PL Rn {: sh4_stats[I_CMPPL]++; :}
215 CMP/PZ Rn {: sh4_stats[I_CMPPZ]++; :}
216 CMP/STR Rm, Rn {: sh4_stats[I_CMPSTR]++; :}
217 DIV0S Rm, Rn {: sh4_stats[I_DIV0S]++; :}
218 DIV0U {: sh4_stats[I_DIV0U]++; :}
219 DIV1 Rm, Rn {: sh4_stats[I_DIV1]++; :}
220 DMULS.L Rm, Rn {: sh4_stats[I_DMULS]++; :}
221 DMULU.L Rm, Rn {: sh4_stats[I_DMULU]++; :}
222 DT Rn {: sh4_stats[I_DT]++; :}
223 EXTS.B Rm, Rn {: sh4_stats[I_EXTSB]++; :}
224 EXTS.W Rm, Rn {: sh4_stats[I_EXTSW]++; :}
225 EXTU.B Rm, Rn {: sh4_stats[I_EXTUB]++; :}
226 EXTU.W Rm, Rn {: sh4_stats[I_EXTUW]++; :}
227 FABS FRn {: sh4_stats[I_FABS]++; :}
228 FADD FRm, FRn {: sh4_stats[I_FADD]++; :}
229 FCMP/EQ FRm, FRn {: sh4_stats[I_FCMPEQ]++; :}
230 FCMP/GT FRm, FRn {: sh4_stats[I_FCMPGT]++; :}
231 FCNVDS FRm, FPUL {: sh4_stats[I_FCNVDS]++; :}
232 FCNVSD FPUL, FRn {: sh4_stats[I_FCNVSD]++; :}
233 FDIV FRm, FRn {: sh4_stats[I_FDIV]++; :}
234 FIPR FVm, FVn {: sh4_stats[I_FIPR]++; :}
235 FLDS FRm, FPUL {: sh4_stats[I_FLDS]++; :}
236 FLDI0 FRn {: sh4_stats[I_FLDI0]++; :}
237 FLDI1 FRn {: sh4_stats[I_FLDI1]++; :}
238 FLOAT FPUL, FRn {: sh4_stats[I_FLOAT]++; :}
239 FMAC FR0, FRm, FRn {: sh4_stats[I_FMAC]++; :}
240 FMOV FRm, FRn {: sh4_stats[I_FMOV1]++; :}
241 FMOV FRm, @Rn {: sh4_stats[I_FMOV2]++; :}
242 FMOV FRm, @-Rn {: sh4_stats[I_FMOV3]++; :}
243 FMOV FRm, @(R0, Rn) {: sh4_stats[I_FMOV4]++; :}
244 FMOV @Rm, FRn {: sh4_stats[I_FMOV5]++; :}
245 FMOV @Rm+, FRn {: sh4_stats[I_FMOV6]++; :}
246 FMOV @(R0, Rm), FRn {: sh4_stats[I_FMOV7]++; :}
247 FMUL FRm, FRn {: sh4_stats[I_FMUL]++; :}
248 FNEG FRn {: sh4_stats[I_FNEG]++; :}
249 FRCHG {: sh4_stats[I_FRCHG]++; :}
250 FSCA FPUL, FRn {: sh4_stats[I_FSCA]++; :}
251 FSCHG {: sh4_stats[I_FSCHG]++; :}
252 FSQRT FRn {: sh4_stats[I_FSQRT]++; :}
253 FSRRA FRn {: sh4_stats[I_FSRRA]++; :}
254 FSTS FPUL, FRn {: sh4_stats[I_FSTS]++; :}
255 FSUB FRm, FRn {: sh4_stats[I_FSUB]++; :}
256 FTRC FRm, FPUL {: sh4_stats[I_FTRC]++; :}
257 FTRV XMTRX, FVn {: sh4_stats[I_FTRV]++; :}
258 JMP @Rn {: sh4_stats[I_JMP]++; :}
259 JSR @Rn {: sh4_stats[I_JSR]++; :}
260 LDC Rm, GBR {: sh4_stats[I_LDC]++; :}
261 LDC Rm, SR {: sh4_stats[I_LDCSR]++; :}
262 LDC Rm, VBR {: sh4_stats[I_LDC]++; :}
263 LDC Rm, SSR {: sh4_stats[I_LDC]++; :}
264 LDC Rm, SGR {: sh4_stats[I_LDC]++; :}
265 LDC Rm, SPC {: sh4_stats[I_LDC]++; :}
266 LDC Rm, DBR {: sh4_stats[I_LDC]++; :}
267 LDC Rm, Rn_BANK {: sh4_stats[I_LDC]++; :}
268 LDC.L @Rm+, GBR {: sh4_stats[I_LDCM]++; :}
269 LDC.L @Rm+, SR {: sh4_stats[I_LDCSRM]++; :}
270 LDC.L @Rm+, VBR {: sh4_stats[I_LDCM]++; :}
271 LDC.L @Rm+, SSR {: sh4_stats[I_LDCM]++; :}
272 LDC.L @Rm+, SGR {: sh4_stats[I_LDCM]++; :}
273 LDC.L @Rm+, SPC {: sh4_stats[I_LDCM]++; :}
274 LDC.L @Rm+, DBR {: sh4_stats[I_LDCM]++; :}
275 LDC.L @Rm+, Rn_BANK {: sh4_stats[I_LDCM]++; :}
276 LDS Rm, FPSCR {: sh4_stats[I_LDS]++; :}
277 LDS.L @Rm+, FPSCR {: sh4_stats[I_LDSM]++; :}
278 LDS Rm, FPUL {: sh4_stats[I_LDS]++; :}
279 LDS.L @Rm+, FPUL {: sh4_stats[I_LDSM]++; :}
280 LDS Rm, MACH {: sh4_stats[I_LDS]++; :}
281 LDS.L @Rm+, MACH {: sh4_stats[I_LDSM]++; :}
282 LDS Rm, MACL {: sh4_stats[I_LDS]++; :}
283 LDS.L @Rm+, MACL {: sh4_stats[I_LDSM]++; :}
284 LDS Rm, PR {: sh4_stats[I_LDS]++; :}
285 LDS.L @Rm+, PR {: sh4_stats[I_LDSM]++; :}
286 LDTLB {: sh4_stats[I_LDTLB]++; :}
287 MAC.L @Rm+, @Rn+ {: sh4_stats[I_MACL]++; :}
288 MAC.W @Rm+, @Rn+ {: sh4_stats[I_MACW]++; :}
289 MOV Rm, Rn {: sh4_stats[I_MOV]++; :}
290 MOV #imm, Rn {: sh4_stats[I_MOVI]++; :}
291 MOV.B Rm, @Rn {: sh4_stats[I_MOVB]++; :}
292 MOV.B Rm, @-Rn {: sh4_stats[I_MOVB]++; :}
293 MOV.B Rm, @(R0, Rn) {: sh4_stats[I_MOVB]++; :}
294 MOV.B R0, @(disp, GBR) {: sh4_stats[I_MOVB]++; :}
295 MOV.B R0, @(disp, Rn) {: sh4_stats[I_MOVB]++; :}
296 MOV.B @Rm, Rn {: sh4_stats[I_MOVB]++; :}
297 MOV.B @Rm+, Rn {: sh4_stats[I_MOVB]++; :}
298 MOV.B @(R0, Rm), Rn {: sh4_stats[I_MOVB]++; :}
299 MOV.B @(disp, GBR), R0 {: sh4_stats[I_MOVB]++; :}
300 MOV.B @(disp, Rm), R0 {: sh4_stats[I_MOVB]++; :}
301 MOV.L Rm, @Rn {: sh4_stats[I_MOVL]++; :}
302 MOV.L Rm, @-Rn {: sh4_stats[I_MOVL]++; :}
303 MOV.L Rm, @(R0, Rn) {: sh4_stats[I_MOVL]++; :}
304 MOV.L R0, @(disp, GBR) {: sh4_stats[I_MOVL]++; :}
305 MOV.L Rm, @(disp, Rn) {: sh4_stats[I_MOVL]++; :}
306 MOV.L @Rm, Rn {: sh4_stats[I_MOVL]++; :}
307 MOV.L @Rm+, Rn {: sh4_stats[I_MOVL]++; :}
308 MOV.L @(R0, Rm), Rn {: sh4_stats[I_MOVL]++; :}
309 MOV.L @(disp, GBR), R0 {: sh4_stats[I_MOVL]++; :}
310 MOV.L @(disp, PC), Rn {: sh4_stats[I_MOVLPC]++; :}
311 MOV.L @(disp, Rm), Rn {: sh4_stats[I_MOVL]++; :}
312 MOV.W Rm, @Rn {: sh4_stats[I_MOVW]++; :}
313 MOV.W Rm, @-Rn {: sh4_stats[I_MOVW]++; :}
314 MOV.W Rm, @(R0, Rn) {: sh4_stats[I_MOVW]++; :}
315 MOV.W R0, @(disp, GBR) {: sh4_stats[I_MOVW]++; :}
316 MOV.W R0, @(disp, Rn) {: sh4_stats[I_MOVW]++; :}
317 MOV.W @Rm, Rn {: sh4_stats[I_MOVW]++; :}
318 MOV.W @Rm+, Rn {: sh4_stats[I_MOVW]++; :}
319 MOV.W @(R0, Rm), Rn {: sh4_stats[I_MOVW]++; :}
320 MOV.W @(disp, GBR), R0 {: sh4_stats[I_MOVW]++; :}
321 MOV.W @(disp, PC), Rn {: sh4_stats[I_MOVW]++; :}
322 MOV.W @(disp, Rm), R0 {: sh4_stats[I_MOVW]++; :}
323 MOVA @(disp, PC), R0 {: sh4_stats[I_MOVA]++; :}
324 MOVCA.L R0, @Rn {: sh4_stats[I_MOVCA]++; :}
325 MOVT Rn {: sh4_stats[I_MOVT]++; :}
326 MUL.L Rm, Rn {: sh4_stats[I_MULL]++; :}
327 MULS.W Rm, Rn {: sh4_stats[I_MULSW]++; :}
328 MULU.W Rm, Rn {: sh4_stats[I_MULUW]++; :}
329 NEG Rm, Rn {: sh4_stats[I_NEG]++; :}
330 NEGC Rm, Rn {: sh4_stats[I_NEGC]++; :}
331 NOP {: sh4_stats[I_NOP]++; :}
332 NOT Rm, Rn {: sh4_stats[I_NOT]++; :}
333 OCBI @Rn {: sh4_stats[I_OCBI]++; :}
334 OCBP @Rn {: sh4_stats[I_OCBP]++; :}
335 OCBWB @Rn {: sh4_stats[I_OCBWB]++; :}
336 OR Rm, Rn {: sh4_stats[I_OR]++; :}
337 OR #imm, R0 {: sh4_stats[I_ORI]++; :}
338 OR.B #imm, @(R0, GBR) {: sh4_stats[I_ORB]++; :}
339 PREF @Rn {: sh4_stats[I_PREF]++; :}
340 ROTCL Rn {: sh4_stats[I_ROTCL]++; :}
341 ROTCR Rn {: sh4_stats[I_ROTCR]++; :}
342 ROTL Rn {: sh4_stats[I_ROTL]++; :}
343 ROTR Rn {: sh4_stats[I_ROTR]++; :}
344 RTE {: sh4_stats[I_RTE]++; :}
345 RTS {: sh4_stats[I_RTS]++; :}
346 SETS {: sh4_stats[I_SETS]++; :}
347 SETT {: sh4_stats[I_SETT]++; :}
348 SHAD Rm, Rn {: sh4_stats[I_SHAD]++; :}
349 SHAL Rn {: sh4_stats[I_SHAL]++; :}
350 SHAR Rn {: sh4_stats[I_SHAR]++; :}
351 SHLD Rm, Rn {: sh4_stats[I_SHLD]++; :}
352 SHLL Rn {: sh4_stats[I_SHLL]++; :}
353 SHLL2 Rn {: sh4_stats[I_SHLL]++; :}
354 SHLL8 Rn {: sh4_stats[I_SHLL]++; :}
355 SHLL16 Rn {: sh4_stats[I_SHLL]++; :}
356 SHLR Rn {: sh4_stats[I_SHLR]++; :}
357 SHLR2 Rn {: sh4_stats[I_SHLR]++; :}
358 SHLR8 Rn {: sh4_stats[I_SHLR]++; :}
359 SHLR16 Rn {: sh4_stats[I_SHLR]++; :}
360 SLEEP {: sh4_stats[I_SLEEP]++; :}
361 STC SR, Rn {: sh4_stats[I_STCSR]++; :}
362 STC GBR, Rn {: sh4_stats[I_STC]++; :}
363 STC VBR, Rn {: sh4_stats[I_STC]++; :}
364 STC SSR, Rn {: sh4_stats[I_STC]++; :}
365 STC SPC, Rn {: sh4_stats[I_STC]++; :}
366 STC SGR, Rn {: sh4_stats[I_STC]++; :}
367 STC DBR, Rn {: sh4_stats[I_STC]++; :}
368 STC Rm_BANK, Rn {: sh4_stats[I_STC]++; :}
369 STC.L SR, @-Rn {: sh4_stats[I_STCSRM]++; :}
370 STC.L VBR, @-Rn {: sh4_stats[I_STCM]++; :}
371 STC.L SSR, @-Rn {: sh4_stats[I_STCM]++; :}
372 STC.L SPC, @-Rn {: sh4_stats[I_STCM]++; :}
373 STC.L SGR, @-Rn {: sh4_stats[I_STCM]++; :}
374 STC.L DBR, @-Rn {: sh4_stats[I_STCM]++; :}
375 STC.L Rm_BANK, @-Rn {: sh4_stats[I_STCM]++; :}
376 STC.L GBR, @-Rn {: sh4_stats[I_STCM]++; :}
377 STS FPSCR, Rn {: sh4_stats[I_STS]++; :}
378 STS.L FPSCR, @-Rn {: sh4_stats[I_STSM]++; :}
379 STS FPUL, Rn {: sh4_stats[I_STS]++; :}
380 STS.L FPUL, @-Rn {: sh4_stats[I_STSM]++; :}
381 STS MACH, Rn {: sh4_stats[I_STS]++; :}
382 STS.L MACH, @-Rn {: sh4_stats[I_STSM]++; :}
383 STS MACL, Rn {: sh4_stats[I_STS]++; :}
384 STS.L MACL, @-Rn {: sh4_stats[I_STSM]++; :}
385 STS PR, Rn {: sh4_stats[I_STS]++; :}
386 STS.L PR, @-Rn {: sh4_stats[I_STSM]++; :}
387 SUB Rm, Rn {: sh4_stats[I_SUB]++; :}
388 SUBC Rm, Rn {: sh4_stats[I_SUBC]++; :}
389 SUBV Rm, Rn {: sh4_stats[I_SUBV]++; :}
390 SWAP.B Rm, Rn {: sh4_stats[I_SWAPB]++; :}
391 SWAP.W Rm, Rn {: sh4_stats[I_SWAPW]++; :}
392 TAS.B @Rn {: sh4_stats[I_TASB]++; :}
393 TRAPA #imm {: sh4_stats[I_TRAPA]++; :}
394 TST Rm, Rn {: sh4_stats[I_TST]++; :}
395 TST #imm, R0 {: sh4_stats[I_TSTI]++; :}
396 TST.B #imm, @(R0, GBR) {: sh4_stats[I_TSTB]++; :}
397 XOR Rm, Rn {: sh4_stats[I_XOR]++; :}
398 XOR #imm, R0 {: sh4_stats[I_XORI]++; :}
399 XOR.B #imm, @(R0, GBR) {: sh4_stats[I_XORB]++; :}
400 XTRCT Rm, Rn {: sh4_stats[I_XTRCT]++; :}
401 UNDEF {: sh4_stats[I_UNDEF]++; :}
402 %%
404 sh4_stats_total++;
405 }
.