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lxdream.org :: lxdream/src/sh4/sh4dasm.c
lxdream 0.9.1
released Jun 29
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filename src/sh4/sh4dasm.c
changeset 669:ab344e42bca9
prev597:87cbdf62aa35
next706:3135a0770e19
author nkeynes
date Mon May 12 10:00:13 2008 +0000 (13 years ago)
permissions -rw-r--r--
last change Cleanup most of the -Wall warnings (getting a bit sloppy...)
Convert FP code to use fixed banks rather than indirect pointer
(3-4% faster this way now)
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     1 /**
     2  * $Id$
     3  * 
     4  * SH4 CPU definition and disassembly functions
     5  *
     6  * Copyright (c) 2005 Nathan Keynes.
     7  *
     8  * This program is free software; you can redistribute it and/or modify
     9  * it under the terms of the GNU General Public License as published by
    10  * the Free Software Foundation; either version 2 of the License, or
    11  * (at your option) any later version.
    12  *
    13  * This program is distributed in the hope that it will be useful,
    14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    16  * GNU General Public License for more details.
    17  */
    19 #include "sh4core.h"
    20 #include "sh4dasm.h"
    21 #include "mem.h"
    23 #define UNIMP(ir) snprintf( buf, len, "???     " )
    26 const struct reg_desc_struct sh4_reg_map[] = 
    27   { {"R0", REG_INT, &sh4r.r[0]}, {"R1", REG_INT, &sh4r.r[1]},
    28     {"R2", REG_INT, &sh4r.r[2]}, {"R3", REG_INT, &sh4r.r[3]},
    29     {"R4", REG_INT, &sh4r.r[4]}, {"R5", REG_INT, &sh4r.r[5]},
    30     {"R6", REG_INT, &sh4r.r[6]}, {"R7", REG_INT, &sh4r.r[7]},
    31     {"R8", REG_INT, &sh4r.r[8]}, {"R9", REG_INT, &sh4r.r[9]},
    32     {"R10",REG_INT, &sh4r.r[10]}, {"R11",REG_INT, &sh4r.r[11]},
    33     {"R12",REG_INT, &sh4r.r[12]}, {"R13",REG_INT, &sh4r.r[13]},
    34     {"R14",REG_INT, &sh4r.r[14]}, {"R15",REG_INT, &sh4r.r[15]},
    35     {"SR", REG_INT, &sh4r.sr}, {"GBR", REG_INT, &sh4r.gbr},
    36     {"SSR",REG_INT, &sh4r.ssr}, {"SPC", REG_INT, &sh4r.spc},
    37     {"SGR",REG_INT, &sh4r.sgr}, {"DBR", REG_INT, &sh4r.dbr},
    38     {"VBR",REG_INT, &sh4r.vbr},
    39     {"PC", REG_INT, &sh4r.pc}, {"PR", REG_INT, &sh4r.pr},
    40     {"MACL",REG_INT, &sh4r.mac},{"MACH",REG_INT, ((uint32_t *)&sh4r.mac)+1},
    41     {"FPUL", REG_INT, &sh4r.fpul.i}, {"FPSCR", REG_INT, &sh4r.fpscr},
    42     {NULL, 0, NULL} };
    45 const struct cpu_desc_struct sh4_cpu_desc = 
    46     { "SH4", sh4_disasm_instruction, sh4_execute_instruction, sh4_has_page, 
    47       sh4_set_breakpoint, sh4_clear_breakpoint, sh4_get_breakpoint, 2,
    48       (char *)&sh4r, sizeof(sh4r), sh4_reg_map,
    49       &sh4r.pc };
    51 uint32_t sh4_disasm_instruction( sh4vma_t pc, char *buf, int len, char *opcode )
    52 {
    53     sh4addr_t addr = mmu_vma_to_phys_disasm(pc);
    54     uint16_t ir = sh4_read_word(addr);
    56 #define UNDEF(ir) snprintf( buf, len, "????    " );
    57 #define RN(ir) ((ir&0x0F00)>>8)
    58 #define RN_BANK(ir) ((ir&0x0070)>>4)
    59 #define RM(ir) ((ir&0x00F0)>>4)
    60 #define DISP4(ir) (ir&0x000F) /* 4-bit displacements are *not* sign extended */
    61 #define DISP8(ir) (ir&0x00FF)
    62 #define PCDISP8(ir) SIGNEXT8(ir&0x00FF)
    63 #define UIMM8(ir) (ir&0x00FF)
    64 #define IMM8(ir) SIGNEXT8(ir&0x00FF)
    65 #define DISP12(ir) SIGNEXT12(ir&0x0FFF)
    66 #define FVN(ir) ((ir&0x0C00)>>10)
    67 #define FVM(ir) ((ir&0x0300)>>8)
    69     sprintf( opcode, "%02X %02X", ir&0xFF, ir>>8 );
    71         switch( (ir&0xF000) >> 12 ) {
    72             case 0x0:
    73                 switch( ir&0xF ) {
    74                     case 0x2:
    75                         switch( (ir&0x80) >> 7 ) {
    76                             case 0x0:
    77                                 switch( (ir&0x70) >> 4 ) {
    78                                     case 0x0:
    79                                         { /* STC SR, Rn */
    80                                         uint32_t Rn = ((ir>>8)&0xF); 
    81                                         snprintf( buf, len, "STC     SR, R%d", Rn );
    82                                         }
    83                                         break;
    84                                     case 0x1:
    85                                         { /* STC GBR, Rn */
    86                                         uint32_t Rn = ((ir>>8)&0xF); 
    87                                         snprintf( buf, len, "STC     GBR, R%d", Rn );
    88                                         }
    89                                         break;
    90                                     case 0x2:
    91                                         { /* STC VBR, Rn */
    92                                         uint32_t Rn = ((ir>>8)&0xF); 
    93                                         snprintf( buf, len, "STC     VBR, R%d", Rn );
    94                                         }
    95                                         break;
    96                                     case 0x3:
    97                                         { /* STC SSR, Rn */
    98                                         uint32_t Rn = ((ir>>8)&0xF); 
    99                                         snprintf( buf, len, "STC     SSR, R%d", Rn );
   100                                         }
   101                                         break;
   102                                     case 0x4:
   103                                         { /* STC SPC, Rn */
   104                                         uint32_t Rn = ((ir>>8)&0xF); 
   105                                         snprintf( buf, len, "STC     SPC, R%d", Rn );
   106                                         }
   107                                         break;
   108                                     default:
   109                                         UNDEF();
   110                                         break;
   111                                 }
   112                                 break;
   113                             case 0x1:
   114                                 { /* STC Rm_BANK, Rn */
   115                                 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm_BANK = ((ir>>4)&0x7); 
   116                                 snprintf( buf, len, "STC     R%d_BANK, R%d", Rm_BANK, Rn );
   117                                 }
   118                                 break;
   119                         }
   120                         break;
   121                     case 0x3:
   122                         switch( (ir&0xF0) >> 4 ) {
   123                             case 0x0:
   124                                 { /* BSRF Rn */
   125                                 uint32_t Rn = ((ir>>8)&0xF); 
   126                                 snprintf( buf, len, "BSRF    R%d", Rn );
   127                                 }
   128                                 break;
   129                             case 0x2:
   130                                 { /* BRAF Rn */
   131                                 uint32_t Rn = ((ir>>8)&0xF); 
   132                                 snprintf( buf, len, "BRAF    R%d", Rn );
   133                                 }
   134                                 break;
   135                             case 0x8:
   136                                 { /* PREF @Rn */
   137                                 uint32_t Rn = ((ir>>8)&0xF); 
   138                                 snprintf( buf, len, "PREF    R%d", Rn );
   139                                 }
   140                                 break;
   141                             case 0x9:
   142                                 { /* OCBI @Rn */
   143                                 uint32_t Rn = ((ir>>8)&0xF); 
   144                                 snprintf( buf, len, "OCBI    @R%d", Rn );
   145                                 }
   146                                 break;
   147                             case 0xA:
   148                                 { /* OCBP @Rn */
   149                                 uint32_t Rn = ((ir>>8)&0xF); 
   150                                 snprintf( buf, len, "OCBP    @R%d", Rn );
   151                                 }
   152                                 break;
   153                             case 0xB:
   154                                 { /* OCBWB @Rn */
   155                                 uint32_t Rn = ((ir>>8)&0xF); 
   156                                 snprintf( buf, len, "OCBWB   @R%d", Rn );
   157                                 }
   158                                 break;
   159                             case 0xC:
   160                                 { /* MOVCA.L R0, @Rn */
   161                                 uint32_t Rn = ((ir>>8)&0xF); 
   162                                 snprintf( buf, len, "MOVCA.L R0, @R%d", Rn );
   163                                 }
   164                                 break;
   165                             default:
   166                                 UNDEF();
   167                                 break;
   168                         }
   169                         break;
   170                     case 0x4:
   171                         { /* MOV.B Rm, @(R0, Rn) */
   172                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   173                         snprintf( buf, len, "MOV.B   R%d, @(R0, R%d)", Rm, Rn );
   174                         }
   175                         break;
   176                     case 0x5:
   177                         { /* MOV.W Rm, @(R0, Rn) */
   178                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   179                         snprintf( buf, len, "MOV.W   R%d, @(R0, R%d)", Rm, Rn );
   180                         }
   181                         break;
   182                     case 0x6:
   183                         { /* MOV.L Rm, @(R0, Rn) */
   184                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   185                         snprintf( buf, len, "MOV.L   R%d, @(R0, R%d)", Rm, Rn );
   186                         }
   187                         break;
   188                     case 0x7:
   189                         { /* MUL.L Rm, Rn */
   190                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   191                         snprintf( buf, len, "MUL.L   R%d, R%d", Rm, Rn );
   192                         }
   193                         break;
   194                     case 0x8:
   195                         switch( (ir&0xFF0) >> 4 ) {
   196                             case 0x0:
   197                                 { /* CLRT */
   198                                 snprintf( buf, len, "CLRT    " );
   199                                 }
   200                                 break;
   201                             case 0x1:
   202                                 { /* SETT */
   203                                 snprintf( buf, len, "SETT    " );
   204                                 }
   205                                 break;
   206                             case 0x2:
   207                                 { /* CLRMAC */
   208                                 snprintf( buf, len, "CLRMAC  " );
   209                                 }
   210                                 break;
   211                             case 0x3:
   212                                 { /* LDTLB */
   213                                 snprintf( buf, len, "LDTLB   " );
   214                                 }
   215                                 break;
   216                             case 0x4:
   217                                 { /* CLRS */
   218                                 snprintf( buf, len, "CLRS    " );
   219                                 }
   220                                 break;
   221                             case 0x5:
   222                                 { /* SETS */
   223                                 snprintf( buf, len, "SETS    " );
   224                                 }
   225                                 break;
   226                             default:
   227                                 UNDEF();
   228                                 break;
   229                         }
   230                         break;
   231                     case 0x9:
   232                         switch( (ir&0xF0) >> 4 ) {
   233                             case 0x0:
   234                                 { /* NOP */
   235                                 snprintf( buf, len, "NOP     " );
   236                                 }
   237                                 break;
   238                             case 0x1:
   239                                 { /* DIV0U */
   240                                 snprintf( buf, len, "DIV0U   " );
   241                                 }
   242                                 break;
   243                             case 0x2:
   244                                 { /* MOVT Rn */
   245                                 uint32_t Rn = ((ir>>8)&0xF); 
   246                                 snprintf( buf, len, "MOVT    R%d", Rn );
   247                                 }
   248                                 break;
   249                             default:
   250                                 UNDEF();
   251                                 break;
   252                         }
   253                         break;
   254                     case 0xA:
   255                         switch( (ir&0xF0) >> 4 ) {
   256                             case 0x0:
   257                                 { /* STS MACH, Rn */
   258                                 uint32_t Rn = ((ir>>8)&0xF); 
   259                                 snprintf( buf, len, "STS     MACH, R%d", Rn );
   260                                 }
   261                                 break;
   262                             case 0x1:
   263                                 { /* STS MACL, Rn */
   264                                 uint32_t Rn = ((ir>>8)&0xF); 
   265                                 snprintf( buf, len, "STS     MACL, R%d", Rn );
   266                                 }
   267                                 break;
   268                             case 0x2:
   269                                 { /* STS PR, Rn */
   270                                 uint32_t Rn = ((ir>>8)&0xF); 
   271                                 snprintf( buf, len, "STS     PR, R%d", Rn );
   272                                 }
   273                                 break;
   274                             case 0x3:
   275                                 { /* STC SGR, Rn */
   276                                 uint32_t Rn = ((ir>>8)&0xF); 
   277                                 snprintf( buf, len, "STC     SGR, R%d", Rn );
   278                                 }
   279                                 break;
   280                             case 0x5:
   281                                 { /* STS FPUL, Rn */
   282                                 uint32_t Rn = ((ir>>8)&0xF); 
   283                                 snprintf( buf, len, "STS     FPUL, R%d", Rn );
   284                                 }
   285                                 break;
   286                             case 0x6:
   287                                 { /* STS FPSCR, Rn */
   288                                 uint32_t Rn = ((ir>>8)&0xF); 
   289                                 snprintf( buf, len, "STS     FPSCR, R%d", Rn );
   290                                 }
   291                                 break;
   292                             case 0xF:
   293                                 { /* STC DBR, Rn */
   294                                 uint32_t Rn = ((ir>>8)&0xF); 
   295                                 snprintf( buf, len, "STC     DBR, R%d", Rn );
   296                                 }
   297                                 break;
   298                             default:
   299                                 UNDEF();
   300                                 break;
   301                         }
   302                         break;
   303                     case 0xB:
   304                         switch( (ir&0xFF0) >> 4 ) {
   305                             case 0x0:
   306                                 { /* RTS */
   307                                 snprintf( buf, len, "RTS     " );
   308                                 }
   309                                 break;
   310                             case 0x1:
   311                                 { /* SLEEP */
   312                                 snprintf( buf, len, "SLEEP   " );
   313                                 }
   314                                 break;
   315                             case 0x2:
   316                                 { /* RTE */
   317                                 snprintf( buf, len, "RTE     " );
   318                                 }
   319                                 break;
   320                             default:
   321                                 UNDEF();
   322                                 break;
   323                         }
   324                         break;
   325                     case 0xC:
   326                         { /* MOV.B @(R0, Rm), Rn */
   327                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   328                         snprintf( buf, len, "MOV.B   @(R0, R%d), R%d", Rm, Rn );
   329                         }
   330                         break;
   331                     case 0xD:
   332                         { /* MOV.W @(R0, Rm), Rn */
   333                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   334                         snprintf( buf, len, "MOV.W   @(R0, R%d), R%d", Rm, Rn );
   335                         }
   336                         break;
   337                     case 0xE:
   338                         { /* MOV.L @(R0, Rm), Rn */
   339                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   340                         snprintf( buf, len, "MOV.L   @(R0, R%d), R%d", Rm, Rn );
   341                         }
   342                         break;
   343                     case 0xF:
   344                         { /* MAC.L @Rm+, @Rn+ */
   345                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   346                         snprintf( buf, len, "MAC.L   @R%d+, @R%d+", Rm, Rn );
   347                         }
   348                         break;
   349                     default:
   350                         UNDEF();
   351                         break;
   352                 }
   353                 break;
   354             case 0x1:
   355                 { /* MOV.L Rm, @(disp, Rn) */
   356                 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<2; 
   357                 snprintf( buf, len, "MOV.L   R%d, @(%d, R%d)", Rm, disp, Rn );
   358                 }
   359                 break;
   360             case 0x2:
   361                 switch( ir&0xF ) {
   362                     case 0x0:
   363                         { /* MOV.B Rm, @Rn */
   364                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   365                         snprintf( buf, len, "MOV.B   R%d, @R%d", Rm, Rn );
   366                         }
   367                         break;
   368                     case 0x1:
   369                         { /* MOV.W Rm, @Rn */
   370                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   371                         snprintf( buf, len, "MOV.W   R%d, @R%d", Rm, Rn );
   372                         }
   373                         break;
   374                     case 0x2:
   375                         { /* MOV.L Rm, @Rn */
   376                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   377                         snprintf( buf, len, "MOV.L   R%d, @R%d", Rm, Rn );
   378                         }
   379                         break;
   380                     case 0x4:
   381                         { /* MOV.B Rm, @-Rn */
   382                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   383                         snprintf( buf, len, "MOV.B   R%d, @-R%d", Rm, Rn );
   384                         }
   385                         break;
   386                     case 0x5:
   387                         { /* MOV.W Rm, @-Rn */
   388                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   389                         snprintf( buf, len, "MOV.W   R%d, @-R%d", Rm, Rn );
   390                         }
   391                         break;
   392                     case 0x6:
   393                         { /* MOV.L Rm, @-Rn */
   394                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   395                         snprintf( buf, len, "MOV.L   R%d, @-R%d", Rm, Rn );
   396                         }
   397                         break;
   398                     case 0x7:
   399                         { /* DIV0S Rm, Rn */
   400                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   401                         snprintf( buf, len, "DIV0S   R%d, R%d", Rm, Rn );
   402                         }
   403                         break;
   404                     case 0x8:
   405                         { /* TST Rm, Rn */
   406                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   407                         snprintf( buf, len, "TST     R%d, R%d", Rm, Rn );
   408                         }
   409                         break;
   410                     case 0x9:
   411                         { /* AND Rm, Rn */
   412                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   413                         snprintf( buf, len, "AND     R%d, R%d", Rm, Rn );
   414                         }
   415                         break;
   416                     case 0xA:
   417                         { /* XOR Rm, Rn */
   418                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   419                         snprintf( buf, len, "XOR     R%d, R%d", Rm, Rn );
   420                         }
   421                         break;
   422                     case 0xB:
   423                         { /* OR Rm, Rn */
   424                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   425                         snprintf( buf, len, "OR      R%d, R%d", Rm, Rn );
   426                         }
   427                         break;
   428                     case 0xC:
   429                         { /* CMP/STR Rm, Rn */
   430                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   431                         snprintf( buf, len, "CMP/STR R%d, R%d", Rm, Rn );
   432                         }
   433                         break;
   434                     case 0xD:
   435                         { /* XTRCT Rm, Rn */
   436                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   437                         snprintf( buf, len, "XTRCT   R%d, R%d", Rm, Rn );
   438                         }
   439                         break;
   440                     case 0xE:
   441                         { /* MULU.W Rm, Rn */
   442                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   443                         snprintf( buf, len, "MULU.W  R%d, R%d", Rm, Rn );
   444                         }
   445                         break;
   446                     case 0xF:
   447                         { /* MULS.W Rm, Rn */
   448                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   449                         snprintf( buf, len, "MULS.W  R%d, R%d", Rm, Rn );
   450                         }
   451                         break;
   452                     default:
   453                         UNDEF();
   454                         break;
   455                 }
   456                 break;
   457             case 0x3:
   458                 switch( ir&0xF ) {
   459                     case 0x0:
   460                         { /* CMP/EQ Rm, Rn */
   461                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   462                         snprintf( buf, len, "CMP/EQ  R%d, R%d", Rm, Rn );
   463                         }
   464                         break;
   465                     case 0x2:
   466                         { /* CMP/HS Rm, Rn */
   467                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   468                         snprintf( buf, len, "CMP/HS  R%d, R%d", Rm, Rn );
   469                         }
   470                         break;
   471                     case 0x3:
   472                         { /* CMP/GE Rm, Rn */
   473                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   474                         snprintf( buf, len, "CMP/GE  R%d, R%d", Rm, Rn );
   475                         }
   476                         break;
   477                     case 0x4:
   478                         { /* DIV1 Rm, Rn */
   479                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   480                         snprintf( buf, len, "DIV1    R%d, R%d", Rm, Rn );
   481                         }
   482                         break;
   483                     case 0x5:
   484                         { /* DMULU.L Rm, Rn */
   485                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   486                         snprintf( buf, len, "DMULU.L R%d, R%d", Rm, Rn );
   487                         }
   488                         break;
   489                     case 0x6:
   490                         { /* CMP/HI Rm, Rn */
   491                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   492                         snprintf( buf, len, "CMP/HI  R%d, R%d", Rm, Rn );
   493                         }
   494                         break;
   495                     case 0x7:
   496                         { /* CMP/GT Rm, Rn */
   497                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   498                         snprintf( buf, len, "CMP/GT  R%d, R%d", Rm, Rn );
   499                         }
   500                         break;
   501                     case 0x8:
   502                         { /* SUB Rm, Rn */
   503                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   504                         snprintf( buf, len, "SUB     R%d, R%d", Rm, Rn );
   505                         }
   506                         break;
   507                     case 0xA:
   508                         { /* SUBC Rm, Rn */
   509                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   510                         snprintf( buf, len, "SUBC    R%d, R%d", Rm, Rn );
   511                         }
   512                         break;
   513                     case 0xB:
   514                         { /* SUBV Rm, Rn */
   515                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   516                         snprintf( buf, len, "SUBV    R%d, R%d", Rm, Rn );
   517                         }
   518                         break;
   519                     case 0xC:
   520                         { /* ADD Rm, Rn */
   521                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   522                         snprintf( buf, len, "ADD     R%d, R%d", Rm, Rn );
   523                         }
   524                         break;
   525                     case 0xD:
   526                         { /* DMULS.L Rm, Rn */
   527                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   528                         snprintf( buf, len, "DMULS.L R%d, R%d", Rm, Rn );
   529                         }
   530                         break;
   531                     case 0xE:
   532                         { /* ADDC Rm, Rn */
   533                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   534                         snprintf( buf, len, "ADDC    R%d, R%d", Rm, Rn );
   535                         }
   536                         break;
   537                     case 0xF:
   538                         { /* ADDV Rm, Rn */
   539                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   540                         snprintf( buf, len, "ADDV    R%d, R%d", Rm, Rn );
   541                         }
   542                         break;
   543                     default:
   544                         UNDEF();
   545                         break;
   546                 }
   547                 break;
   548             case 0x4:
   549                 switch( ir&0xF ) {
   550                     case 0x0:
   551                         switch( (ir&0xF0) >> 4 ) {
   552                             case 0x0:
   553                                 { /* SHLL Rn */
   554                                 uint32_t Rn = ((ir>>8)&0xF); 
   555                                 snprintf( buf, len, "SHLL    R%d", Rn );
   556                                 }
   557                                 break;
   558                             case 0x1:
   559                                 { /* DT Rn */
   560                                 uint32_t Rn = ((ir>>8)&0xF); 
   561                                 snprintf( buf, len, "DT      R%d", Rn );
   562                                 }
   563                                 break;
   564                             case 0x2:
   565                                 { /* SHAL Rn */
   566                                 uint32_t Rn = ((ir>>8)&0xF); 
   567                                 snprintf( buf, len, "SHAL    R%d", Rn );
   568                                 }
   569                                 break;
   570                             default:
   571                                 UNDEF();
   572                                 break;
   573                         }
   574                         break;
   575                     case 0x1:
   576                         switch( (ir&0xF0) >> 4 ) {
   577                             case 0x0:
   578                                 { /* SHLR Rn */
   579                                 uint32_t Rn = ((ir>>8)&0xF); 
   580                                 snprintf( buf, len, "SHLR    R%d", Rn );
   581                                 }
   582                                 break;
   583                             case 0x1:
   584                                 { /* CMP/PZ Rn */
   585                                 uint32_t Rn = ((ir>>8)&0xF); 
   586                                 snprintf( buf, len, "CMP/PZ  R%d", Rn );
   587                                 }
   588                                 break;
   589                             case 0x2:
   590                                 { /* SHAR Rn */
   591                                 uint32_t Rn = ((ir>>8)&0xF); 
   592                                 snprintf( buf, len, "SHAR    R%d", Rn );
   593                                 }
   594                                 break;
   595                             default:
   596                                 UNDEF();
   597                                 break;
   598                         }
   599                         break;
   600                     case 0x2:
   601                         switch( (ir&0xF0) >> 4 ) {
   602                             case 0x0:
   603                                 { /* STS.L MACH, @-Rn */
   604                                 uint32_t Rn = ((ir>>8)&0xF); 
   605                                 snprintf( buf, len, "STS.L   MACH, @-R%d", Rn );
   606                                 }
   607                                 break;
   608                             case 0x1:
   609                                 { /* STS.L MACL, @-Rn */
   610                                 uint32_t Rn = ((ir>>8)&0xF); 
   611                                 snprintf( buf, len, "STS.L   MACL, @-R%d", Rn );
   612                                 }
   613                                 break;
   614                             case 0x2:
   615                                 { /* STS.L PR, @-Rn */
   616                                 uint32_t Rn = ((ir>>8)&0xF); 
   617                                 snprintf( buf, len, "STS.L   PR, @-R%d", Rn );
   618                                 }
   619                                 break;
   620                             case 0x3:
   621                                 { /* STC.L SGR, @-Rn */
   622                                 uint32_t Rn = ((ir>>8)&0xF); 
   623                                 snprintf( buf, len, "STC.L   SGR, @-R%d", Rn );
   624                                 }
   625                                 break;
   626                             case 0x5:
   627                                 { /* STS.L FPUL, @-Rn */
   628                                 uint32_t Rn = ((ir>>8)&0xF); 
   629                                 snprintf( buf, len, "STS.L   FPUL, @-R%d", Rn );
   630                                 }
   631                                 break;
   632                             case 0x6:
   633                                 { /* STS.L FPSCR, @-Rn */
   634                                 uint32_t Rn = ((ir>>8)&0xF); 
   635                                 snprintf( buf, len, "STS.L   FPSCR, @-R%d", Rn );
   636                                 }
   637                                 break;
   638                             case 0xF:
   639                                 { /* STC.L DBR, @-Rn */
   640                                 uint32_t Rn = ((ir>>8)&0xF); 
   641                                 snprintf( buf, len, "STC.L    DBR, @-R%d", Rn );
   642                                 }
   643                                 break;
   644                             default:
   645                                 UNDEF();
   646                                 break;
   647                         }
   648                         break;
   649                     case 0x3:
   650                         switch( (ir&0x80) >> 7 ) {
   651                             case 0x0:
   652                                 switch( (ir&0x70) >> 4 ) {
   653                                     case 0x0:
   654                                         { /* STC.L SR, @-Rn */
   655                                         uint32_t Rn = ((ir>>8)&0xF); 
   656                                         snprintf( buf, len, "STC.L   SR, @-R%d", Rn );
   657                                         }
   658                                         break;
   659                                     case 0x1:
   660                                         { /* STC.L GBR, @-Rn */
   661                                         uint32_t Rn = ((ir>>8)&0xF); 
   662                                         snprintf( buf, len, "STC.L   GBR, @-R%d", Rn );
   663                                         }
   664                                         break;
   665                                     case 0x2:
   666                                         { /* STC.L VBR, @-Rn */
   667                                         uint32_t Rn = ((ir>>8)&0xF); 
   668                                         snprintf( buf, len, "STC.L   VBR, @-R%d", Rn );
   669                                         }
   670                                         break;
   671                                     case 0x3:
   672                                         { /* STC.L SSR, @-Rn */
   673                                         uint32_t Rn = ((ir>>8)&0xF); 
   674                                         snprintf( buf, len, "STC.L   SSR, @-R%d", Rn );
   675                                         }
   676                                         break;
   677                                     case 0x4:
   678                                         { /* STC.L SPC, @-Rn */
   679                                         uint32_t Rn = ((ir>>8)&0xF); 
   680                                         snprintf( buf, len, "STC.L   SPC, @-R%d", Rn );
   681                                         }
   682                                         break;
   683                                     default:
   684                                         UNDEF();
   685                                         break;
   686                                 }
   687                                 break;
   688                             case 0x1:
   689                                 { /* STC.L Rm_BANK, @-Rn */
   690                                 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm_BANK = ((ir>>4)&0x7); 
   691                                 snprintf( buf, len, "STC.L   @-R%d_BANK, @-R%d", Rm_BANK, Rn );
   692                                 }
   693                                 break;
   694                         }
   695                         break;
   696                     case 0x4:
   697                         switch( (ir&0xF0) >> 4 ) {
   698                             case 0x0:
   699                                 { /* ROTL Rn */
   700                                 uint32_t Rn = ((ir>>8)&0xF); 
   701                                 snprintf( buf, len, "ROTL    R%d", Rn );
   702                                 }
   703                                 break;
   704                             case 0x2:
   705                                 { /* ROTCL Rn */
   706                                 uint32_t Rn = ((ir>>8)&0xF); 
   707                                 snprintf( buf, len, "ROTCL   R%d", Rn );
   708                                 }
   709                                 break;
   710                             default:
   711                                 UNDEF();
   712                                 break;
   713                         }
   714                         break;
   715                     case 0x5:
   716                         switch( (ir&0xF0) >> 4 ) {
   717                             case 0x0:
   718                                 { /* ROTR Rn */
   719                                 uint32_t Rn = ((ir>>8)&0xF); 
   720                                 snprintf( buf, len, "ROTR    R%d", Rn );
   721                                 }
   722                                 break;
   723                             case 0x1:
   724                                 { /* CMP/PL Rn */
   725                                 uint32_t Rn = ((ir>>8)&0xF); 
   726                                 snprintf( buf, len, "CMP/PL  R%d", Rn );
   727                                 }
   728                                 break;
   729                             case 0x2:
   730                                 { /* ROTCR Rn */
   731                                 uint32_t Rn = ((ir>>8)&0xF); 
   732                                 snprintf( buf, len, "ROTCR   R%d", Rn );
   733                                 }
   734                                 break;
   735                             default:
   736                                 UNDEF();
   737                                 break;
   738                         }
   739                         break;
   740                     case 0x6:
   741                         switch( (ir&0xF0) >> 4 ) {
   742                             case 0x0:
   743                                 { /* LDS.L @Rm+, MACH */
   744                                 uint32_t Rm = ((ir>>8)&0xF); 
   745                                 snprintf( buf, len, "LDS.L   @R%d+, MACH", Rm );
   746                                 }
   747                                 break;
   748                             case 0x1:
   749                                 { /* LDS.L @Rm+, MACL */
   750                                 uint32_t Rm = ((ir>>8)&0xF); 
   751                                 snprintf( buf, len, "LDS.L   @R%d+, MACL", Rm );
   752                                 }
   753                                 break;
   754                             case 0x2:
   755                                 { /* LDS.L @Rm+, PR */
   756                                 uint32_t Rm = ((ir>>8)&0xF); 
   757                                 snprintf( buf, len, "LDS.L   @R%d+, PR", Rm );
   758                                 }
   759                                 break;
   760                             case 0x3:
   761                                 { /* LDC.L @Rm+, SGR */
   762                                 uint32_t Rm = ((ir>>8)&0xF); 
   763                                 snprintf( buf, len, "LDC.L   @R%d+, SGR", Rm );
   764                                 }
   765                                 break;
   766                             case 0x5:
   767                                 { /* LDS.L @Rm+, FPUL */
   768                                 uint32_t Rm = ((ir>>8)&0xF); 
   769                                 snprintf( buf, len, "LDS.L   @R%d+, FPUL", Rm );
   770                                 }
   771                                 break;
   772                             case 0x6:
   773                                 { /* LDS.L @Rm+, FPSCR */
   774                                 uint32_t Rm = ((ir>>8)&0xF); 
   775                                 snprintf( buf, len, "LDS.L   @R%d+, FPSCR", Rm );
   776                                 }
   777                                 break;
   778                             case 0xF:
   779                                 { /* LDC.L @Rm+, DBR */
   780                                 uint32_t Rm = ((ir>>8)&0xF); 
   781                                 snprintf( buf, len, "LDC.L   @R%d+, DBR", Rm );
   782                                 }
   783                                 break;
   784                             default:
   785                                 UNDEF();
   786                                 break;
   787                         }
   788                         break;
   789                     case 0x7:
   790                         switch( (ir&0x80) >> 7 ) {
   791                             case 0x0:
   792                                 switch( (ir&0x70) >> 4 ) {
   793                                     case 0x0:
   794                                         { /* LDC.L @Rm+, SR */
   795                                         uint32_t Rm = ((ir>>8)&0xF); 
   796                                         snprintf( buf, len, "LDC.L   @R%d+, SR", Rm );
   797                                         }
   798                                         break;
   799                                     case 0x1:
   800                                         { /* LDC.L @Rm+, GBR */
   801                                         uint32_t Rm = ((ir>>8)&0xF); 
   802                                         snprintf( buf, len, "LDC.L   @R%d+, GBR", Rm );
   803                                         }
   804                                         break;
   805                                     case 0x2:
   806                                         { /* LDC.L @Rm+, VBR */
   807                                         uint32_t Rm = ((ir>>8)&0xF); 
   808                                         snprintf( buf, len, "LDC.L   @R%d+, VBR", Rm );
   809                                         }
   810                                         break;
   811                                     case 0x3:
   812                                         { /* LDC.L @Rm+, SSR */
   813                                         uint32_t Rm = ((ir>>8)&0xF); 
   814                                         snprintf( buf, len, "LDC.L   @R%d+, SSR", Rm );
   815                                         }
   816                                         break;
   817                                     case 0x4:
   818                                         { /* LDC.L @Rm+, SPC */
   819                                         uint32_t Rm = ((ir>>8)&0xF); 
   820                                         snprintf( buf, len, "LDC.L   @R%d+, SPC", Rm );
   821                                         }
   822                                         break;
   823                                     default:
   824                                         UNDEF();
   825                                         break;
   826                                 }
   827                                 break;
   828                             case 0x1:
   829                                 { /* LDC.L @Rm+, Rn_BANK */
   830                                 uint32_t Rm = ((ir>>8)&0xF); uint32_t Rn_BANK = ((ir>>4)&0x7); 
   831                                 snprintf( buf, len, "LDC.L   @R%d+, @R%d+_BANK", Rm, Rn_BANK );
   832                                 }
   833                                 break;
   834                         }
   835                         break;
   836                     case 0x8:
   837                         switch( (ir&0xF0) >> 4 ) {
   838                             case 0x0:
   839                                 { /* SHLL2 Rn */
   840                                 uint32_t Rn = ((ir>>8)&0xF); 
   841                                 snprintf( buf, len, "SHLL2   R%d", Rn );
   842                                 }
   843                                 break;
   844                             case 0x1:
   845                                 { /* SHLL8 Rn */
   846                                 uint32_t Rn = ((ir>>8)&0xF); 
   847                                 snprintf( buf, len, "SHLL8   R%d", Rn );
   848                                 }
   849                                 break;
   850                             case 0x2:
   851                                 { /* SHLL16 Rn */
   852                                 uint32_t Rn = ((ir>>8)&0xF); 
   853                                 snprintf( buf, len, "SHLL16  R%d", Rn );
   854                                 }
   855                                 break;
   856                             default:
   857                                 UNDEF();
   858                                 break;
   859                         }
   860                         break;
   861                     case 0x9:
   862                         switch( (ir&0xF0) >> 4 ) {
   863                             case 0x0:
   864                                 { /* SHLR2 Rn */
   865                                 uint32_t Rn = ((ir>>8)&0xF); 
   866                                 snprintf( buf, len, "SHLR2   R%d", Rn );
   867                                 }
   868                                 break;
   869                             case 0x1:
   870                                 { /* SHLR8 Rn */
   871                                 uint32_t Rn = ((ir>>8)&0xF); 
   872                                 snprintf( buf, len, "SHLR8   R%d", Rn );
   873                                 }
   874                                 break;
   875                             case 0x2:
   876                                 { /* SHLR16 Rn */
   877                                 uint32_t Rn = ((ir>>8)&0xF); 
   878                                 snprintf( buf, len, "SHLR16  R%d", Rn );
   879                                 }
   880                                 break;
   881                             default:
   882                                 UNDEF();
   883                                 break;
   884                         }
   885                         break;
   886                     case 0xA:
   887                         switch( (ir&0xF0) >> 4 ) {
   888                             case 0x0:
   889                                 { /* LDS Rm, MACH */
   890                                 uint32_t Rm = ((ir>>8)&0xF); 
   891                                 snprintf( buf, len, "LDS     R%d, MACH", Rm );
   892                                 }
   893                                 break;
   894                             case 0x1:
   895                                 { /* LDS Rm, MACL */
   896                                 uint32_t Rm = ((ir>>8)&0xF); 
   897                                 snprintf( buf, len, "LDS     R%d, MACL", Rm );
   898                                 }
   899                                 break;
   900                             case 0x2:
   901                                 { /* LDS Rm, PR */
   902                                 uint32_t Rm = ((ir>>8)&0xF); 
   903                                 snprintf( buf, len, "LDS     R%d, PR", Rm );
   904                                 }
   905                                 break;
   906                             case 0x3:
   907                                 { /* LDC Rm, SGR */
   908                                 uint32_t Rm = ((ir>>8)&0xF); 
   909                                 snprintf( buf, len, "LDC     R%d, SGR", Rm );
   910                                 }
   911                                 break;
   912                             case 0x5:
   913                                 { /* LDS Rm, FPUL */
   914                                 uint32_t Rm = ((ir>>8)&0xF); 
   915                                 snprintf( buf, len, "LDS     R%d, FPUL", Rm );
   916                                 }
   917                                 break;
   918                             case 0x6:
   919                                 { /* LDS Rm, FPSCR */
   920                                 uint32_t Rm = ((ir>>8)&0xF); 
   921                                 snprintf( buf, len, "LDS     R%d, FPSCR", Rm );
   922                                 }
   923                                 break;
   924                             case 0xF:
   925                                 { /* LDC Rm, DBR */
   926                                 uint32_t Rm = ((ir>>8)&0xF); 
   927                                 snprintf( buf, len, "LDC     R%d, DBR", Rm );
   928                                 }
   929                                 break;
   930                             default:
   931                                 UNDEF();
   932                                 break;
   933                         }
   934                         break;
   935                     case 0xB:
   936                         switch( (ir&0xF0) >> 4 ) {
   937                             case 0x0:
   938                                 { /* JSR @Rn */
   939                                 uint32_t Rn = ((ir>>8)&0xF); 
   940                                 snprintf( buf, len, "JSR     @R%d", Rn );
   941                                 }
   942                                 break;
   943                             case 0x1:
   944                                 { /* TAS.B @Rn */
   945                                 uint32_t Rn = ((ir>>8)&0xF); 
   946                                 snprintf( buf, len, "TAS.B   R%d", Rn );
   947                                 }
   948                                 break;
   949                             case 0x2:
   950                                 { /* JMP @Rn */
   951                                 uint32_t Rn = ((ir>>8)&0xF); 
   952                                 snprintf( buf, len, "JMP     @R%d", Rn );
   953                                 }
   954                                 break;
   955                             default:
   956                                 UNDEF();
   957                                 break;
   958                         }
   959                         break;
   960                     case 0xC:
   961                         { /* SHAD Rm, Rn */
   962                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   963                         snprintf( buf, len, "SHAD    R%d, R%d", Rm, Rn );
   964                         }
   965                         break;
   966                     case 0xD:
   967                         { /* SHLD Rm, Rn */
   968                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
   969                         snprintf( buf, len, "SHLD    R%d, R%d", Rm, Rn );
   970                         }
   971                         break;
   972                     case 0xE:
   973                         switch( (ir&0x80) >> 7 ) {
   974                             case 0x0:
   975                                 switch( (ir&0x70) >> 4 ) {
   976                                     case 0x0:
   977                                         { /* LDC Rm, SR */
   978                                         uint32_t Rm = ((ir>>8)&0xF); 
   979                                         snprintf( buf, len, "LDC     R%d, SR", Rm );
   980                                         }
   981                                         break;
   982                                     case 0x1:
   983                                         { /* LDC Rm, GBR */
   984                                         uint32_t Rm = ((ir>>8)&0xF); 
   985                                         snprintf( buf, len, "LDC     R%d, GBR", Rm );
   986                                         }
   987                                         break;
   988                                     case 0x2:
   989                                         { /* LDC Rm, VBR */
   990                                         uint32_t Rm = ((ir>>8)&0xF); 
   991                                         snprintf( buf, len, "LDC     R%d, VBR", Rm );
   992                                         }
   993                                         break;
   994                                     case 0x3:
   995                                         { /* LDC Rm, SSR */
   996                                         uint32_t Rm = ((ir>>8)&0xF); 
   997                                         snprintf( buf, len, "LDC     R%d, SSR", Rm );
   998                                         }
   999                                         break;
  1000                                     case 0x4:
  1001                                         { /* LDC Rm, SPC */
  1002                                         uint32_t Rm = ((ir>>8)&0xF); 
  1003                                         snprintf( buf, len, "LDC     R%d, SPC", Rm );
  1005                                         break;
  1006                                     default:
  1007                                         UNDEF();
  1008                                         break;
  1010                                 break;
  1011                             case 0x1:
  1012                                 { /* LDC Rm, Rn_BANK */
  1013                                 uint32_t Rm = ((ir>>8)&0xF); uint32_t Rn_BANK = ((ir>>4)&0x7); 
  1014                                 snprintf( buf, len, "LDC     R%d, R%d_BANK", Rm, Rn_BANK );
  1016                                 break;
  1018                         break;
  1019                     case 0xF:
  1020                         { /* MAC.W @Rm+, @Rn+ */
  1021                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
  1022                         snprintf( buf, len, "MAC.W   @R%d+, @R%d+", Rm, Rn );
  1024                         break;
  1026                 break;
  1027             case 0x5:
  1028                 { /* MOV.L @(disp, Rm), Rn */
  1029                 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<2; 
  1030                 snprintf( buf, len, "MOV.L   @(%d, R%d), R%d", disp, Rm, Rn );
  1032                 break;
  1033             case 0x6:
  1034                 switch( ir&0xF ) {
  1035                     case 0x0:
  1036                         { /* MOV.B @Rm, Rn */
  1037                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
  1038                         snprintf( buf, len, "MOV.B   @R%d, R%d", Rm, Rn );
  1040                         break;
  1041                     case 0x1:
  1042                         { /* MOV.W @Rm, Rn */
  1043                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
  1044                         snprintf( buf, len, "MOV.W   @R%d, R%d", Rm, Rn );
  1046                         break;
  1047                     case 0x2:
  1048                         { /* MOV.L @Rm, Rn */
  1049                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
  1050                         snprintf( buf, len, "MOV.L   @R%d, R%d", Rm, Rn );
  1052                         break;
  1053                     case 0x3:
  1054                         { /* MOV Rm, Rn */
  1055                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
  1056                         snprintf( buf, len, "MOV     R%d, R%d", Rm, Rn );
  1058                         break;
  1059                     case 0x4:
  1060                         { /* MOV.B @Rm+, Rn */
  1061                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
  1062                         snprintf( buf, len, "MOV.B   @R%d+, R%d", Rm, Rn );
  1064                         break;
  1065                     case 0x5:
  1066                         { /* MOV.W @Rm+, Rn */
  1067                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
  1068                         snprintf( buf, len, "MOV.W   @R%d+, R%d", Rm, Rn );
  1070                         break;
  1071                     case 0x6:
  1072                         { /* MOV.L @Rm+, Rn */
  1073                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
  1074                         snprintf( buf, len, "MOV.L   @R%d+, R%d", Rm, Rn );
  1076                         break;
  1077                     case 0x7:
  1078                         { /* NOT Rm, Rn */
  1079                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
  1080                         snprintf( buf, len, "NOT     R%d, R%d", Rm, Rn );
  1082                         break;
  1083                     case 0x8:
  1084                         { /* SWAP.B Rm, Rn */
  1085                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
  1086                         snprintf( buf, len, "SWAP.B  R%d, R%d", Rm, Rn );
  1088                         break;
  1089                     case 0x9:
  1090                         { /* SWAP.W Rm, Rn */
  1091                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
  1092                         snprintf( buf, len, "SWAP.W  R%d, R%d", Rm, Rn );
  1094                         break;
  1095                     case 0xA:
  1096                         { /* NEGC Rm, Rn */
  1097                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
  1098                         snprintf( buf, len, "NEGC    R%d, R%d", Rm, Rn );
  1100                         break;
  1101                     case 0xB:
  1102                         { /* NEG Rm, Rn */
  1103                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
  1104                         snprintf( buf, len, "NEG     R%d, R%d", Rm, Rn );
  1106                         break;
  1107                     case 0xC:
  1108                         { /* EXTU.B Rm, Rn */
  1109                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
  1110                         snprintf( buf, len, "EXTU.B  R%d, R%d", Rm, Rn );
  1112                         break;
  1113                     case 0xD:
  1114                         { /* EXTU.W Rm, Rn */
  1115                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
  1116                         snprintf( buf, len, "EXTU.W  R%d, R%d", Rm, Rn );
  1118                         break;
  1119                     case 0xE:
  1120                         { /* EXTS.B Rm, Rn */
  1121                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
  1122                         snprintf( buf, len, "EXTS.B  R%d, R%d", Rm, Rn );
  1124                         break;
  1125                     case 0xF:
  1126                         { /* EXTS.W Rm, Rn */
  1127                         uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
  1128                         snprintf( buf, len, "EXTS.W  R%d, R%d", Rm, Rn );
  1130                         break;
  1132                 break;
  1133             case 0x7:
  1134                 { /* ADD #imm, Rn */
  1135                 uint32_t Rn = ((ir>>8)&0xF); int32_t imm = SIGNEXT8(ir&0xFF); 
  1136                 snprintf( buf, len, "ADD     #%d, R%d", imm, Rn );
  1138                 break;
  1139             case 0x8:
  1140                 switch( (ir&0xF00) >> 8 ) {
  1141                     case 0x0:
  1142                         { /* MOV.B R0, @(disp, Rn) */
  1143                         uint32_t Rn = ((ir>>4)&0xF); uint32_t disp = (ir&0xF); 
  1144                         snprintf( buf, len, "MOV.B   R0, @(%d, R%d)", disp, Rn );
  1146                         break;
  1147                     case 0x1:
  1148                         { /* MOV.W R0, @(disp, Rn) */
  1149                         uint32_t Rn = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<1; 
  1150                         snprintf( buf, len, "MOV.W   R0, @(%d, R%d)", disp, Rn );
  1152                         break;
  1153                     case 0x4:
  1154                         { /* MOV.B @(disp, Rm), R0 */
  1155                         uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF); 
  1156                         snprintf( buf, len, "MOV.B   @(%d, R%d), R0", disp, Rm );
  1158                         break;
  1159                     case 0x5:
  1160                         { /* MOV.W @(disp, Rm), R0 */
  1161                         uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<1; 
  1162                         snprintf( buf, len, "MOV.W   @(%d, R%d), R0", disp, Rm );
  1164                         break;
  1165                     case 0x8:
  1166                         { /* CMP/EQ #imm, R0 */
  1167                         int32_t imm = SIGNEXT8(ir&0xFF); 
  1168                         snprintf( buf, len, "CMP/EQ  #%d, R0", imm );
  1170                         break;
  1171                     case 0x9:
  1172                         { /* BT disp */
  1173                         int32_t disp = SIGNEXT8(ir&0xFF)<<1; 
  1174                         snprintf( buf, len, "BT      $%xh", disp+pc+4 );
  1176                         break;
  1177                     case 0xB:
  1178                         { /* BF disp */
  1179                         int32_t disp = SIGNEXT8(ir&0xFF)<<1; 
  1180                         snprintf( buf, len, "BF      $%xh", disp+pc+4 );
  1182                         break;
  1183                     case 0xD:
  1184                         { /* BT/S disp */
  1185                         int32_t disp = SIGNEXT8(ir&0xFF)<<1; 
  1186                         snprintf( buf, len, "BT/S    $%xh", disp+pc+4 );
  1188                         break;
  1189                     case 0xF:
  1190                         { /* BF/S disp */
  1191                         int32_t disp = SIGNEXT8(ir&0xFF)<<1; 
  1192                         snprintf( buf, len, "BF/S    $%xh", disp+pc+4 );
  1194                         break;
  1195                     default:
  1196                         UNDEF();
  1197                         break;
  1199                 break;
  1200             case 0x9:
  1201                 { /* MOV.W @(disp, PC), Rn */
  1202                 uint32_t Rn = ((ir>>8)&0xF); uint32_t disp = (ir&0xFF)<<1; 
  1203                 snprintf( buf, len, "MOV.W   @($%xh), R%d ; <- #%08x", disp + pc + 4, Rn, sh4_read_word(disp+addr+4) );
  1205                 break;
  1206             case 0xA:
  1207                 { /* BRA disp */
  1208                 int32_t disp = SIGNEXT12(ir&0xFFF)<<1; 
  1209                 snprintf( buf, len, "BRA     $%xh", disp+pc+4 );
  1211                 break;
  1212             case 0xB:
  1213                 { /* BSR disp */
  1214                 int32_t disp = SIGNEXT12(ir&0xFFF)<<1; 
  1215                 snprintf( buf, len, "BSR     $%xh", disp+pc+4 );
  1217                 break;
  1218             case 0xC:
  1219                 switch( (ir&0xF00) >> 8 ) {
  1220                     case 0x0:
  1221                         { /* MOV.B R0, @(disp, GBR) */
  1222                         uint32_t disp = (ir&0xFF); 
  1223                         snprintf( buf, len, "MOV.B   R0, @(%d, GBR)", disp );
  1225                         break;
  1226                     case 0x1:
  1227                         { /* MOV.W R0, @(disp, GBR) */
  1228                         uint32_t disp = (ir&0xFF)<<1; 
  1229                         snprintf( buf, len, "MOV.W   R0, @(%d, GBR)", disp);
  1231                         break;
  1232                     case 0x2:
  1233                         { /* MOV.L R0, @(disp, GBR) */
  1234                         uint32_t disp = (ir&0xFF)<<2; 
  1235                         snprintf( buf, len, "MOV.L   R0, @(%d, GBR)", disp );
  1237                         break;
  1238                     case 0x3:
  1239                         { /* TRAPA #imm */
  1240                         uint32_t imm = (ir&0xFF); 
  1241                         snprintf( buf, len, "TRAPA   #%d", imm );
  1243                         break;
  1244                     case 0x4:
  1245                         { /* MOV.B @(disp, GBR), R0 */
  1246                         uint32_t disp = (ir&0xFF); 
  1247                         snprintf( buf, len, "MOV.B   @(%d, GBR), R0", disp );
  1249                         break;
  1250                     case 0x5:
  1251                         { /* MOV.W @(disp, GBR), R0 */
  1252                         uint32_t disp = (ir&0xFF)<<1; 
  1253                         snprintf( buf, len, "MOV.W   @(%d, GBR), R0", disp );
  1255                         break;
  1256                     case 0x6:
  1257                         { /* MOV.L @(disp, GBR), R0 */
  1258                         uint32_t disp = (ir&0xFF)<<2; 
  1259                         snprintf( buf, len, "MOV.L   @(%d, GBR), R0",disp );
  1261                         break;
  1262                     case 0x7:
  1263                         { /* MOVA @(disp, PC), R0 */
  1264                         uint32_t disp = (ir&0xFF)<<2; 
  1265                         snprintf( buf, len, "MOVA    @($%xh), R0", disp + (pc&0xFFFFFFFC) + 4 );
  1267                         break;
  1268                     case 0x8:
  1269                         { /* TST #imm, R0 */
  1270                         uint32_t imm = (ir&0xFF); 
  1271                         snprintf( buf, len, "TST     #%d, R0", imm );
  1273                         break;
  1274                     case 0x9:
  1275                         { /* AND #imm, R0 */
  1276                         uint32_t imm = (ir&0xFF); 
  1277                         snprintf( buf, len, "AND     #%d, R0", imm );
  1279                         break;
  1280                     case 0xA:
  1281                         { /* XOR #imm, R0 */
  1282                         uint32_t imm = (ir&0xFF); 
  1283                         snprintf( buf, len, "XOR     #%d, R0", imm );
  1285                         break;
  1286                     case 0xB:
  1287                         { /* OR #imm, R0 */
  1288                         uint32_t imm = (ir&0xFF); 
  1289                         snprintf( buf, len, "OR      #%d, R0", imm );
  1291                         break;
  1292                     case 0xC:
  1293                         { /* TST.B #imm, @(R0, GBR) */
  1294                         uint32_t imm = (ir&0xFF); 
  1295                         snprintf( buf, len, "TST.B   #%d, @(R0, GBR)", imm );
  1297                         break;
  1298                     case 0xD:
  1299                         { /* AND.B #imm, @(R0, GBR) */
  1300                         uint32_t imm = (ir&0xFF); 
  1301                         snprintf( buf, len, "AND.B   #%d, @(R0, GBR)", imm );
  1303                         break;
  1304                     case 0xE:
  1305                         { /* XOR.B #imm, @(R0, GBR) */
  1306                         uint32_t imm = (ir&0xFF); 
  1307                         snprintf( buf, len, "XOR.B   #%d, @(R0, GBR)", imm );
  1309                         break;
  1310                     case 0xF:
  1311                         { /* OR.B #imm, @(R0, GBR) */
  1312                         uint32_t imm = (ir&0xFF); 
  1313                         snprintf( buf, len, "OR.B    #%d, @(R0, GBR)", imm );
  1315                         break;
  1317                 break;
  1318             case 0xD:
  1319                 { /* MOV.L @(disp, PC), Rn */
  1320                 uint32_t Rn = ((ir>>8)&0xF); uint32_t disp = (ir&0xFF)<<2; 
  1321                 snprintf( buf, len, "MOV.L   @($%xh), R%d ; <- #%08x", disp + (pc & 0xFFFFFFFC) + 4, Rn, sh4_read_long(disp+(addr&0xFFFFFFFC)+4) );
  1323                 break;
  1324             case 0xE:
  1325                 { /* MOV #imm, Rn */
  1326                 uint32_t Rn = ((ir>>8)&0xF); int32_t imm = SIGNEXT8(ir&0xFF); 
  1327                 snprintf( buf, len, "MOV     #%d, R%d", imm, Rn );
  1329                 break;
  1330             case 0xF:
  1331                 switch( ir&0xF ) {
  1332                     case 0x0:
  1333                         { /* FADD FRm, FRn */
  1334                         uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF); 
  1335                         snprintf( buf, len, "FADD    FR%d, FR%d", FRm, FRn );
  1337                         break;
  1338                     case 0x1:
  1339                         { /* FSUB FRm, FRn */
  1340                         uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF); 
  1341                         snprintf( buf, len, "FSUB    FR%d, FR%d", FRm, FRn );
  1343                         break;
  1344                     case 0x2:
  1345                         { /* FMUL FRm, FRn */
  1346                         uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF); 
  1347                         snprintf( buf, len, "FMUL    FR%d, FR%d", FRm, FRn );
  1349                         break;
  1350                     case 0x3:
  1351                         { /* FDIV FRm, FRn */
  1352                         uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF); 
  1353                         snprintf( buf, len, "FDIV    FR%d, FR%d", FRm, FRn );
  1355                         break;
  1356                     case 0x4:
  1357                         { /* FCMP/EQ FRm, FRn */
  1358                         uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF); 
  1359                         snprintf( buf, len, "FCMP/EQ FR%d, FR%d", FRm, FRn );
  1361                         break;
  1362                     case 0x5:
  1363                         { /* FCMP/GT FRm, FRn */
  1364                         uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF); 
  1365                         snprintf( buf, len, "FCMP/QT FR%d, FR%d", FRm, FRn );
  1367                         break;
  1368                     case 0x6:
  1369                         { /* FMOV @(R0, Rm), FRn */
  1370                         uint32_t FRn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
  1371                         snprintf( buf, len, "FMOV    @(R0, R%d), FR%d", Rm, FRn );
  1373                         break;
  1374                     case 0x7:
  1375                         { /* FMOV FRm, @(R0, Rn) */
  1376                         uint32_t Rn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF); 
  1377                         snprintf( buf, len, "FMOV    FR%d, @(R0, R%d)", FRm, Rn );
  1379                         break;
  1380                     case 0x8:
  1381                         { /* FMOV @Rm, FRn */
  1382                         uint32_t FRn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
  1383                         snprintf( buf, len, "FMOV    @R%d, FR%d", Rm, FRn );
  1385                         break;
  1386                     case 0x9:
  1387                         { /* FMOV @Rm+, FRn */
  1388                         uint32_t FRn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 
  1389                         snprintf( buf, len, "FMOV    @R%d+, FR%d", Rm, FRn );
  1391                         break;
  1392                     case 0xA:
  1393                         { /* FMOV FRm, @Rn */
  1394                         uint32_t Rn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF); 
  1395                         snprintf( buf, len, "FMOV    FR%d, @R%d", FRm, Rn );
  1397                         break;
  1398                     case 0xB:
  1399                         { /* FMOV FRm, @-Rn */
  1400                         uint32_t Rn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF); 
  1401                         snprintf( buf, len, "FMOV    FR%d, @-R%d", FRm, Rn );
  1403                         break;
  1404                     case 0xC:
  1405                         { /* FMOV FRm, FRn */
  1406                         uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF); 
  1407                         snprintf( buf, len, "FMOV    FR%d, FR%d", FRm, FRn );
  1409                         break;
  1410                     case 0xD:
  1411                         switch( (ir&0xF0) >> 4 ) {
  1412                             case 0x0:
  1413                                 { /* FSTS FPUL, FRn */
  1414                                 uint32_t FRn = ((ir>>8)&0xF); 
  1415                                 snprintf( buf, len, "FSTS    FPUL, FR%d", FRn );
  1417                                 break;
  1418                             case 0x1:
  1419                                 { /* FLDS FRm, FPUL */
  1420                                 uint32_t FRm = ((ir>>8)&0xF); 
  1421                                 snprintf( buf, len, "FLDS    FR%d, FPUL", FRm );
  1423                                 break;
  1424                             case 0x2:
  1425                                 { /* FLOAT FPUL, FRn */
  1426                                 uint32_t FRn = ((ir>>8)&0xF); 
  1427                                 snprintf( buf, len, "FLOAT   FPUL, FR%d", FRn );
  1429                                 break;
  1430                             case 0x3:
  1431                                 { /* FTRC FRm, FPUL */
  1432                                 uint32_t FRm = ((ir>>8)&0xF); 
  1433                                 snprintf( buf, len, "FTRC    FR%d, FPUL", FRm );
  1435                                 break;
  1436                             case 0x4:
  1437                                 { /* FNEG FRn */
  1438                                 uint32_t FRn = ((ir>>8)&0xF); 
  1439                                 snprintf( buf, len, "FNEG    FR%d", FRn );
  1441                                 break;
  1442                             case 0x5:
  1443                                 { /* FABS FRn */
  1444                                 uint32_t FRn = ((ir>>8)&0xF); 
  1445                                 snprintf( buf, len, "FABS    FR%d", FRn );
  1447                                 break;
  1448                             case 0x6:
  1449                                 { /* FSQRT FRn */
  1450                                 uint32_t FRn = ((ir>>8)&0xF); 
  1451                                 snprintf( buf, len, "FSQRT   FR%d", FRn );
  1453                                 break;
  1454                             case 0x7:
  1455                                 { /* FSRRA FRn */
  1456                                 uint32_t FRn = ((ir>>8)&0xF); 
  1457                                 snprintf( buf, len, "FSRRA   FR%d", FRn );
  1459                                 break;
  1460                             case 0x8:
  1461                                 { /* FLDI0 FRn */
  1462                                 uint32_t FRn = ((ir>>8)&0xF); 
  1463                                 snprintf( buf, len, "FLDI0   FR%d", FRn );
  1465                                 break;
  1466                             case 0x9:
  1467                                 { /* FLDI1 FRn */
  1468                                 uint32_t FRn = ((ir>>8)&0xF); 
  1469                                 snprintf( buf, len, "FLDI1   FR%d", FRn );
  1471                                 break;
  1472                             case 0xA:
  1473                                 { /* FCNVSD FPUL, FRn */
  1474                                 uint32_t FRn = ((ir>>8)&0xF); 
  1475                                 snprintf( buf, len, "FCNVSD  FPUL, FR%d", FRn );
  1477                                 break;
  1478                             case 0xB:
  1479                                 { /* FCNVDS FRm, FPUL */
  1480                                 uint32_t FRm = ((ir>>8)&0xF); 
  1481                                 snprintf( buf, len, "FCNVDS  FR%d, FPUL", FRm );
  1483                                 break;
  1484                             case 0xE:
  1485                                 { /* FIPR FVm, FVn */
  1486                                 uint32_t FVn = ((ir>>10)&0x3); uint32_t FVm = ((ir>>8)&0x3); 
  1487                                 snprintf( buf, len, "FIPR    FV%d, FV%d", FVm, FVn );
  1489                                 break;
  1490                             case 0xF:
  1491                                 switch( (ir&0x100) >> 8 ) {
  1492                                     case 0x0:
  1493                                         { /* FSCA FPUL, FRn */
  1494                                         uint32_t FRn = ((ir>>9)&0x7)<<1; 
  1495                                         snprintf( buf, len, "FSCA    FPUL, FR%d", FRn );
  1497                                         break;
  1498                                     case 0x1:
  1499                                         switch( (ir&0x200) >> 9 ) {
  1500                                             case 0x0:
  1501                                                 { /* FTRV XMTRX, FVn */
  1502                                                 uint32_t FVn = ((ir>>10)&0x3); 
  1503                                                 snprintf( buf, len, "FTRV    XMTRX, FV%d", FVn );
  1505                                                 break;
  1506                                             case 0x1:
  1507                                                 switch( (ir&0xC00) >> 10 ) {
  1508                                                     case 0x0:
  1509                                                         { /* FSCHG */
  1510                                                         snprintf( buf, len, "FSCHG   " );
  1512                                                         break;
  1513                                                     case 0x2:
  1514                                                         { /* FRCHG */
  1515                                                         snprintf( buf, len, "FRCHG   " );
  1517                                                         break;
  1518                                                     case 0x3:
  1519                                                         { /* UNDEF */
  1520                                                         snprintf( buf, len, "UNDEF   " );
  1522                                                         break;
  1523                                                     default:
  1524                                                         UNDEF();
  1525                                                         break;
  1527                                                 break;
  1529                                         break;
  1531                                 break;
  1532                             default:
  1533                                 UNDEF();
  1534                                 break;
  1536                         break;
  1537                     case 0xE:
  1538                         { /* FMAC FR0, FRm, FRn */
  1539                         uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF); 
  1540                         snprintf( buf, len, "FMAC    FR0, FR%d, FR%d", FRm, FRn );
  1542                         break;
  1543                     default:
  1544                         UNDEF();
  1545                         break;
  1547                 break;
  1550     return pc+2;
  1554 void sh4_disasm_region( FILE *f, int from, int to )
  1556     int pc;
  1557     char buf[80];
  1558     char opcode[16];
  1560     for( pc = from; pc < to; pc+=2 ) {
  1561         buf[0] = '\0';
  1562         sh4_disasm_instruction( pc,
  1563                                 buf, sizeof(buf), opcode );
  1564         fprintf( f, "  %08x:  %s  %s\n", pc, opcode, buf );
.