2 * $Id: ide.h,v 1.3 2005-12-27 12:41:33 nkeynes Exp $
4 * This file defines the interface and structures of the dreamcast's IDE
5 * port. Note that the register definitions are in asic.h, as the registers
6 * fall into the general ASIC ranges (and I don't want to use smaller pages
7 * at this stage). The registers here are exactly as per the ATA
8 * specifications, which makes things a little easier.
10 * Copyright (c) 2005 Nathan Keynes.
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
28 struct ide_registers {
29 uint8_t status; /* A05F709C + A05F7018 Read-only */
30 uint8_t control; /* A05F7018 Write-only 01110 */
31 uint8_t error; /* A05F7084 Read-only 10001 */
32 uint8_t feature; /* A05F7084 Write-only 10001 */
33 uint8_t count; /* A05F7088 Read/Write 10010 */
34 uint8_t disc; /* A05F708C Read-only 10011 */
35 uint8_t lba0; /* A05F708C Write-only 10011 (NB: Presumed, TBV */
36 uint8_t lba1; /* A05F7090 Read/Write 10100 */
37 uint8_t lba2; /* A05F7094 Read/Write 10101 */
38 uint8_t device; /* A05F7098 Read/Write 10110 */
39 uint8_t command; /* A05F709C Write-only 10111 */
41 /* We don't keep the data register per se, rather the currently pending
42 * data is kept here and read out a byte at a time (in PIO mode) or all at
43 * once (in DMA mode). The IDE routines are responsible for managing this
44 * memory. If dataptr == NULL, there is no data available.
47 uint16_t *readptr, *writeptr;
51 #define IDE_ST_BUSY 0x80
52 #define IDE_ST_READY 0x40
53 #define IDE_ST_SERV 0x10
54 #define IDE_ST_DATA 0x08
55 #define IDE_ST_ERROR 0x01
57 #define IDE_CTL_RESET 0x04
58 #define IDE_CTL_IRQEN 0x02 /* IRQ enabled when == 0 */
60 #define IDE_CMD_RESET_DEVICE 0x08
61 #define IDE_CMD_PACKET 0xA0
62 #define IDE_CMD_IDENTIFY_PACKET_DEVICE 0xA1
63 #define IDE_CMD_SERVICE 0xA2
64 #define IDE_CMD_SET_FEATURE 0xEF
66 #define IDE_FEAT_SET_TRANSFER_MODE 0x03
68 #define IDE_XFER_PIO 0x00
69 #define IDE_XFER_PIO_FLOW 0x08
70 #define IDE_XFER_MULTI_DMA 0x20
71 #define IDE_XFER_ULTRA_DMA 0x40
73 /* The disc register indicates the current contents of the drive. When open
76 #define IDE_DISC_AUDIO 0x00
77 #define IDE_DISC_NONE 0x06
78 #define IDE_DISC_CDROM 0x20
79 #define IDE_DISC_GDROM 0x80
80 #define IDE_DISC_READY 0x01 /* ored with above */
81 #define IDE_DISC_IDLE 0x02 /* ie spun-down */
83 #define PKT_CMD_RESET 0x00 /* Wild-ass guess */
84 #define PKT_CMD_IDENTIFY 0x11
86 extern struct ide_registers idereg;
88 /* Note: control can be written at any time - all other registers are writable
89 * only when ide_can_write_regs() is true
91 #define ide_can_write_regs() ((idereg.status&0x88)==0)
94 * a) Writing the command register
95 * b) Reading the status (but not altstatus) register
96 * (whether this actually has any effect an the ASIC event is TBD)
98 void ide_clear_interrupt(void);
100 void ide_reset(void);
102 uint16_t ide_read_data_pio(void);
103 void ide_write_data_pio( uint16_t value );
104 void ide_write_buffer( char * );
106 void ide_write_command( uint8_t command );
107 void ide_write_control( uint8_t value );
.