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lxdream.org :: lxdream/src/sh4/x86op.h
lxdream 0.9.1
released Jun 29
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filename src/sh4/x86op.h
changeset 359:c588dce7ebde
next361:be3de4ecd954
author nkeynes
date Thu Aug 23 12:33:27 2007 +0000 (13 years ago)
permissions -rw-r--r--
last change Commit decoder generator
Translator work in progress
Fix mac.l, mac.w in emu core
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     1 /**
     2  * $Id: x86op.h,v 1.1 2007-08-23 12:33:27 nkeynes Exp $
     3  * 
     4  * Definitions of x86 opcodes for use by the translator.
     5  *
     6  * Copyright (c) 2007 Nathan Keynes.
     7  *
     8  * This program is free software; you can redistribute it and/or modify
     9  * it under the terms of the GNU General Public License as published by
    10  * the Free Software Foundation; either version 2 of the License, or
    11  * (at your option) any later version.
    12  *
    13  * This program is distributed in the hope that it will be useful,
    14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    16  * GNU General Public License for more details.
    17  */
    19 #ifndef __lxdream_x86op_H
    20 #define __lxdream_x86op_H
    22 #define R_NONE -1
    23 #define R_EAX 0
    24 #define R_ECX 1
    25 #define R_EDX 2
    26 #define R_EBX 3
    27 #define R_ESP 4
    28 #define R_EBP 5
    29 #define R_ESI 6 
    30 #define R_EDI 7 
    32 #define R_AL 0
    33 #define R_CL 1
    34 #define R_DL 2
    35 #define R_BL 3
    36 #define R_AH 4
    37 #define R_CH 5
    38 #define R_DH 6
    39 #define R_BH 7
    42 #define OP(x) *xlat_output++ = x
    43 #define OP32(x) *((uint32_t *)xlat_output) = x; xlat_output+=2
    45 /* Offset of a reg relative to the sh4r structure */
    46 #define REG_OFFSET(reg)  (((char *)&sh4r.reg) - ((char *)&sh4r))
    48 #define R_T   REG_OFFSET(t)
    49 #define R_GBR REG_OFFSET(gbr)
    50 #define R_SSR REG_OFFSET(ssr)
    51 #define R_SPC REG_OFFSET(spc)
    52 #define R_VBR REG_OFFSET(vbr)
    53 #define R_MACH REG_OFFSET(mac)+4
    54 #define R_MACL REG_OFFSET(mac)
    55 #define R_PR REG_OFFSET(pr)
    56 #define R_SGR REG_OFFSET(sgr)
    57 #define R_FPUL REG_OFFSET(fpul)
    58 #define R_FPSCR REG_OFFSET(fpscr)
    59 #define R_DBR REG_OFFSET(dbr)
    61 /**************** Basic X86 operations *********************/
    62 /* Note: operands follow SH4 convention (source, dest) rather than x86 
    63  * conventions (dest, source)
    64  */
    66 /* Two-reg modrm form - first arg is the r32 reg, second arg is the r/m32 reg */
    67 #define MODRM_r32_rm32(r1,r2) OP(0xC0 | (r1<<3) | r2)
    68 #define MODRM_rm32_r32(r1,r2) OP(0xC0 | (r2<<3) | r1)
    70 /* ebp+disp8 modrm form */
    71 #define MODRM_r32_ebp8(r1,disp) OP(0x45 | (r1<<3)); OP(disp)
    73 /* ebp+disp32 modrm form */
    74 #define MODRM_r32_ebp32(r1,disp) OP(0x85 | (r1<<3)); OP32(disp)
    76 /* Major opcodes */
    77 #define ADD_r32_r32(r1,r2) OP(0x03); MODRM_rm32_r32(r1,r2)
    78 #define ADD_imm8s_r32(imm,r1) OP(0x83); MODRM_rm32_r32(r1, 0); OP(imm)
    79 #define ADC_r32_r32(r1,r2)    OP(0x13); MODRM_rm32_r32(r1,r2)
    80 #define AND_r32_r32(r1,r2)    OP(0x23); MODRM_rm32_r32(r1,r2)
    81 #define AND_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,4); OP32(imm)
    82 #define CMC()                 OP(0xF5)
    83 #define CMP_r32_r32(r1,r2)    OP(0x3B); MODRM_rm32_r32(r1,r2)
    84 #define CMP_imm8s_r32(imm,r1) OP(0x83); MODRM_rm32_r32(r1,7); OP(imm)
    85 #define MOV_r32_ebp8(r1,disp) OP(0x89); MODRM_r32_ebp8(r1,disp)
    86 #define MOV_r32_ebp32(r1,disp) OP(0x89); MODRM_r32_ebp32(r1,disp)
    87 #define MOV_ebp8_r32(r1,disp) OP(0x8B); MODRM_r32_ebp8(r1,disp)
    88 #define MOV_ebp32_r32(r1,disp) OP(0x8B); MODRM_r32_ebp32(r1,disp)
    89 #define MOVSX_r8_r32(r1,r2)   OP(0x0F); OP(0xBE); MODRM_rm32_r32(r1,r2)
    90 #define MOVSX_r16_r32(r1,r2)  OP(0x0F); OP(0xBF); MODRM_rm32_r32(r1,r2)
    91 #define MOVZX_r8_r32(r1,r2)   OP(0x0F); OP(0xB6); MODRM_rm32_r32(r1,r2)
    92 #define MOVZX_r16_r32(r1,r2)  OP(0x0F); OP(0xB7); MODRM_rm32_r32(r1,r2)
    93 #define NEG_r32(r1)           OP(0xF7); MODRM_rm32_r32(r1,3)
    94 #define NOT_r32(r1)           OP(0xF7); MODRM_rm32_r32(r1,2)
    95 #define OR_r32_r32(r1,r2)     OP(0x0B); MODRM_rm32_r32(r1,r2)
    96 #define OR_imm32_r32(imm,r1)  OP(0x81); MODRM_rm32_r32(r1,1); OP32(imm)
    97 #define RCL1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,2)
    98 #define RCR1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,3)
    99 #define RET()                 OP(0xC3)
   100 #define ROL1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,0)
   101 #define ROR1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,1)
   102 #define SAR1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,7)
   103 #define SAR_imm8_r32(imm,r1)  OP(0xC1); MODRM_rm32_r32(r1,7); OP(imm)
   104 #define SBB_r32_r32(r1,r2)    OP(0x1B); MODRM_rm32_r32(r1,r2)
   105 #define SHL1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,4)
   106 #define SHL_imm8_r32(imm,r1)  OP(0xC1); MODRM_rm32_r32(r1,4); OP(imm)
   107 #define SHR1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,5)
   108 #define SHR_imm8_r32(imm,r1)  OP(0xC1); MODRM_rm32_r32(r1,5); OP(imm)
   109 #define SUB_r32_r32(r1,r2)    OP(0x2B); MODRM_rm32_r32(r1,r2)
   110 #define TEST_r32_r32(r1,r2)   OP(0x85); MODRM_rm32_r32(r1,r2)
   111 #define TEST_imm32_r32(imm,r1) OP(0xF7); MODRM_rm32_r32(r1,0); OP32(imm)
   112 #define XOR_r32_r32(r1,r2)    OP(0x33); MODRM_rm32_r32(r1,r2)
   113 #define XOR_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,6); OP32(imm)
   115 #define ADD_imm32_r32(imm32,r1)
   116 #define MOV_r32_r32(r1,r2)
   117 #define XCHG_r8_r8(r1,r2)
   119 /* Conditional branches */
   120 #define JE_rel8(rel)   OP(0x74); OP(rel)
   121 #define JA_rel8(rel)   OP(0x77); OP(rel)
   122 #define JAE_rel8(rel)  OP(0x73); OP(rel)
   123 #define JG_rel8(rel)   OP(0x7F); OP(rel)
   124 #define JGE_rel8(rel)  OP(0x7D); OP(rel)
   125 #define JC_rel8(rel)   OP(0x72); OP(rel)
   126 #define JO_rel8(rel)   OP(0x70); OP(rel)
   128 /* Negated forms */
   129 #define JNE_rel8(rel)  OP(0x75); OP(rel)
   130 #define JNA_rel8(rel)  OP(0x76); OP(rel)
   131 #define JNAE_rel8(rel) OP(0x72); OP(rel)
   132 #define JNG_rel8(rel)  OP(0x7E); OP(rel)
   133 #define JNGE_rel8(rel) OP(0x7C); OP(rel)
   134 #define JNC_rel8(rel)  OP(0x73); OP(rel)
   135 #define JNO_rel8(rel)  OP(0x71); OP(rel)
   137 /* Conditional setcc - writeback to sh4r.t */
   138 #define SETE_t()    OP(0x0F); OP(0x94); MODRM_r32_ebp8(0, R_T);
   139 #define SETA_t()    OP(0x0F); OP(0x97); MODRM_r32_ebp8(0, R_T);
   140 #define SETAE_t()   OP(0x0F); OP(0x93); MODRM_r32_ebp8(0, R_T);
   141 #define SETG_t()    OP(0x0F); OP(0x9F); MODRM_r32_ebp8(0, R_T);
   142 #define SETGE_t()   OP(0x0F); OP(0x9D); MODRM_r32_ebp8(0, R_T);
   143 #define SETC_t()    OP(0x0F); OP(0x92); MODRM_r32_ebp8(0, R_T);
   144 #define SETO_t()    OP(0x0F); OP(0x90); MODRM_r32_ebp8(0, R_T);
   146 #define SETNE_t()   OP(0x0F); OP(0x95); MODRM_r32_ebp8(0, R_T);
   147 #define SETNA_t()   OP(0x0F); OP(0x96); MODRM_r32_ebp8(0, R_T);
   148 #define SETNAE_t()  OP(0x0F); OP(0x92); MODRM_r32_ebp8(0, R_T);
   149 #define SETNG_t()   OP(0x0F); OP(0x9E); MODRM_r32_ebp8(0, R_T);
   150 #define SETNGE_t()  OP(0x0F); OP(0x9C); MODRM_r32_ebp8(0, R_T);
   151 #define SETNC_t()   OP(0x0F); OP(0x93); MODRM_r32_ebp8(0, R_T);
   152 #define SETNO_t()   OP(0x0F); OP(0x91); MODRM_r32_ebp8(0, R_T);
   154 /* Pseudo-op Load carry from T: CMP [EBP+t], #01 ; CMC */
   155 #define LDC_t()     OP(0x83); MODRM_r32_ebp8(7,R_T); OP(0x01); CMC()
   157 #endif /* !__lxdream_x86op_H */
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