filename | test/timer.c |
changeset | 225:e5cea6125580 |
next | 262:bc96e0b79308 |
author | nkeynes |
date | Wed Jan 03 09:00:17 2007 +0000 (17 years ago) |
permissions | -rw-r--r-- |
last change | Adjust timers when they're read rather than waiting until the next time slice. Also temporarily cut the CPU time by 4. Initialize the FRQCR register to 0x0E0A for convenience |
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1 #include "../lib.h"
2 #define TMU_CHANNEL 2
4 #define TOCR 0xFFD80000 /* Output control register */
5 #define TSTR 0xFFD80004 /* Start register */
6 #define TCOR(c) (0xFFD80008 + (c*12)) /* Constant register */
7 #define TCNT(c) (0xFFD8000C + (c*12)) /* Count register */
8 #define TCR(c) (0xFFD80010 + (c*12)) /* Control register */
10 /**
11 * Initialize the on-chip timer controller. We snag TMU channel 2 in its
12 * highest resolution mode, and start it counting down from max_int.
13 */
14 void timer_start() {
15 unsigned int val = long_read(TSTR);
16 long_write( TSTR, val & (~(1<<TMU_CHANNEL)) ); /* Stop counter */
17 long_write( TCOR(TMU_CHANNEL), 0xFFFFFFFF );
18 long_write( TCNT(TMU_CHANNEL), 0xFFFFFFFF );
19 long_write( TCR(TMU_CHANNEL), 0x00000000 );
20 long_write( TSTR, val | (1<<TMU_CHANNEL) );
21 }
23 /**
24 * Report the current value of TMU2.
25 */
26 long timer_gettime() {
27 return long_read(TCNT(TMU_CHANNEL));
28 }
30 /**
31 * Stop TMU2 and report the current value.
32 */
33 long timer_stop() {
34 long_write( TSTR, long_read(TSTR) & (~(1<<TMU_CHANNEL)) );
35 return long_read( TCNT(TMU_CHANNEL) );
36 }
39 /**
40 * Convert the supplied timer value to a number of micro seconds since the timer
41 * was started.
42 */
43 long timer_to_microsecs( long value ) {
44 return value;
45 }
.