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lxdream.org :: lxdream/src/pvr2/pvr2.h
lxdream 0.9.1
released Jun 29
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filename src/pvr2/pvr2.h
changeset 31:495e480360d7
prev19:9da7a8e38f9d
next56:3224dceaf2a3
author nkeynes
date Mon Dec 26 10:48:55 2005 +0000 (18 years ago)
permissions -rw-r--r--
last change Remove the temporary ASIC log line
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     1 /**
     2  * $Id: pvr2.h,v 1.3 2005-12-25 08:24:07 nkeynes Exp $
     3  *
     4  * PVR2 (video chip) MMIO registers and functions.
     5  *
     6  * Copyright (c) 2005 Nathan Keynes.
     7  *
     8  * This program is free software; you can redistribute it and/or modify
     9  * it under the terms of the GNU General Public License as published by
    10  * the Free Software Foundation; either version 2 of the License, or
    11  * (at your option) any later version.
    12  *
    13  * This program is distributed in the hope that it will be useful,
    14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    16  * GNU General Public License for more details.
    17  */
    19 #include "mmio.h"
    21 MMIO_REGION_BEGIN( 0x005F8000, PVR2, "Power VR/2" )
    22     LONG_PORT( 0x000, PVRID, PORT_MR, 0x17FD11DB, "PVR2 Core ID" )
    23     LONG_PORT( 0x004, PVRVER, PORT_MR, 0x00000011, "PVR2 Core Version" )
    24     LONG_PORT( 0x008, PVRRST, PORT_MR, 0, "PVR2 Reset" )
    25     LONG_PORT( 0x014, RENDST, PORT_W, 0, "Start render" )
    26     LONG_PORT( 0x020, OBJBASE, PORT_MRW, 0, "Object buffer base offset" )
    27     LONG_PORT( 0x02C, TILEBASE, PORT_MRW, 0, "Tile buffer base offset" )
    28     LONG_PORT( 0x040, PVRBCOL, PORT_MRW, 0, "Border Colour (RGB)" )
    29     LONG_PORT( 0x044, DISPMODE, PORT_MRW, 0, "Display Mode" )
    30     LONG_PORT( 0x048, RENDMODE, PORT_MRW, 0, "Rendering Mode" )
    31     LONG_PORT( 0x04C, RENDSIZE, PORT_MRW, 0, "Rendering width (bytes/2)" )
    32     LONG_PORT( 0x050, DISPADDR1, PORT_MRW, 0, "Video memory base 1" )
    33     LONG_PORT( 0x054, DISPADDR2, PORT_MRW, 0, "Video memory base 2" )
    34     LONG_PORT( 0x05C, DISPSIZE, PORT_MRW, 0, "Display size" )
    35     LONG_PORT( 0x060, RENDADDR1, PORT_MRW, 0, "Rendering memory base 1" )
    36     LONG_PORT( 0x064, RENDADDR2, PORT_MRW, 0, "Rendering memory base 2" )
    37     LONG_PORT( 0x068, HCLIP, PORT_MRW, 0, "Horizontal clipping area" )
    38     LONG_PORT( 0x06C, VCLIP, PORT_MRW, 0, "Vertical clipping area" )
    39 LONG_PORT( 0x074, SHADOW, PORT_MRW, 0, "Shadowing" )
    40     LONG_PORT( 0x078, OBJCLIP, PORT_MRW, 0, "Object clip distance (float32)" )
    41     LONG_PORT( 0x084, TSPCLIP, PORT_MRW, 0, "Texture clip distance (float32)" )
    42     LONG_PORT( 0x088, BGPLANEZ, PORT_MRW, 0, "Background plane depth (float32)" )
    43     LONG_PORT( 0x08C, BGPLANECFG, PORT_MRW, 0, "Background plane config" )
    44     LONG_PORT( 0x0B0, FGTBLCOL, PORT_MRW, 0, "Fog table colour" )
    45     LONG_PORT( 0x0B4, FGVRTCOL, PORT_MRW, 0, "Fog vertex colour" )
    46     LONG_PORT( 0x0B8, FGCOEFF, PORT_MRW, 0, "Fog density coefficient (float16)" )
    47     LONG_PORT( 0x0BC, CLAMPHI, PORT_MRW, 0, "Clamp high colour" )
    48     LONG_PORT( 0x0C0, CLAMPLO, PORT_MRW, 0, "Clamp low colour" )
    49     LONG_PORT( 0x0C4, GUNPOS, PORT_MRW, 0, "Lightgun position" )
    50     LONG_PORT( 0x0CC, EVTPOS, PORT_MRW, 0, "Raster event position" )
    51     LONG_PORT( 0x0D0, VIDCFG, PORT_MRW, 0, "Sync configuration & enable" )
    52     LONG_PORT( 0x0D4, HBORDER, PORT_MRW, 0, "Horizontal border area" )
    53     LONG_PORT( 0x0D8, REFRESH, PORT_MRW, 0, "Refresh rates?" )
    54     LONG_PORT( 0x0DC, VBORDER, PORT_MRW, 0, "Vertical border area" )
    55     LONG_PORT( 0x0E0, SYNCPOS, PORT_MRW, 0, "Sync pulse timing" )
    56     LONG_PORT( 0x0E4, TSPCFG, PORT_MRW, 0, "Texture modulo width" )
    57     LONG_PORT( 0x0E8, VIDCFG2, PORT_MRW, 0, "Video configuration 2" )
    58     LONG_PORT( 0x0F0, VPOS, PORT_MRW, 0, "Vertical display position" )
    59     LONG_PORT( 0x0F4, SCALERCFG, PORT_MRW, 0, "Scaler configuration (?)" )
    60     LONG_PORT( 0x10C, BEAMPOS, PORT_R, 0, "Raster beam position" )
    61     LONG_PORT( 0x124, TAOPBST, PORT_MRW, 0, "TA Object Pointer Buffer start" )
    62     LONG_PORT( 0x128, TAOBST, PORT_MRW, 0, "TA Object Buffer start" )
    63     LONG_PORT( 0x12C, TAOPBEN, PORT_MRW, 0, "TA Object Pointer Buffer end" )
    64     LONG_PORT( 0x130, TAOBEN, PORT_MRW, 0, "TA Object Buffer end" )
    65     LONG_PORT( 0x134, TAOPBPOS, PORT_MRW, 0, "TA Object Pointer Buffer position" )
    66     LONG_PORT( 0x138, TAOBPOS, PORT_MRW, 0, "TA Object Buffer position" )
    67     LONG_PORT( 0x13C, TATBSZ, PORT_MRW, 0, "TA Tile Buffer size" )
    68     LONG_PORT( 0x140, TAOPBCFG, PORT_MRW, 0, "TA Object Pointer Buffer config" )
    69     LONG_PORT( 0x144, TAINIT, PORT_MRW, 0, "TA Initialize" )
    70     LONG_PORT( 0x164, TAOPLST, PORT_MRW, 0, "TA Object Pointer List start" )
    71 MMIO_REGION_END
    74 #define DISPMODE_DE  0x00000001 /* Display enable */
    75 #define DISPMODE_SD  0x00000002 /* Scan double */
    76 #define DISPMODE_COL 0x0000000C /* Colour mode */
    77 #define DISPMODE_CD  0x08000000 /* Clock double */
    79 #define MODE_RGB15 0x00000000
    80 #define MODE_RGB16 0x00000040
    81 #define MODE_RGB24 0x00000080
    82 #define MODE_RGB32 0x000000C0
    84 #define DISPSIZE_MODULO 0x3FF00000 /* line skip +1 (32-bit words)*/
    85 #define DISPSIZE_LPF    0x000FFC00 /* lines per field */
    86 #define DISPSIZE_PPL    0x000003FF /* pixel words (32 bit) per line */
    88 #define VIDCFG_VP 0x00000001 /* V-sync polarity */
    89 #define VIDCFG_HP 0x00000002 /* H-sync polarity */
    90 #define VIDCFG_I  0x00000010 /* Interlace enable */
    91 #define VIDCFG_BS 0x000000C0 /* Broadcast standard */
    92 #define VIDCFG_VO 0x00000100 /* Video output enable */
    94 #define BS_NTSC 0x00000000
    95 #define BS_PAL  0x00000040
    96 #define BS_PALM 0x00000080 /* ? */
    97 #define BS_PALN 0x000000C0 /* ? */
    99 void pvr2_next_frame( void );
   100 void pvr2_set_base_address( uint32_t );
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