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lxdream.org :: lxdream/src/pvr2/pvr2.h
lxdream 0.9.1
released Jun 29
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filename src/pvr2/pvr2.h
changeset 653:3202ff01d48e
prev561:533f6b478071
next655:31a4b664d489
author nkeynes
date Tue Apr 01 01:04:13 2008 +0000 (16 years ago)
permissions -rw-r--r--
last change Load mipmap textures from largest-to-smallest (instead of the other way
around) - works around bug in the ATI drivers
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     1 /**
     2  * $Id$
     3  *
     4  * PVR2 (video chip) functions and macros.
     5  *
     6  * Copyright (c) 2005 Nathan Keynes.
     7  *
     8  * This program is free software; you can redistribute it and/or modify
     9  * it under the terms of the GNU General Public License as published by
    10  * the Free Software Foundation; either version 2 of the License, or
    11  * (at your option) any later version.
    12  *
    13  * This program is distributed in the hope that it will be useful,
    14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    16  * GNU General Public License for more details.
    17  */
    19 #ifndef lxdream_pvr2_H
    20 #define lxdream_pvr2_H 1
    22 #include <stdio.h>
    23 #include "lxdream.h"
    24 #include "mem.h"
    25 #include "display.h"
    26 #include "pvr2/pvr2mmio.h"
    28 typedef unsigned int pvraddr_t;
    29 typedef unsigned int pvr64addr_t;
    31 #define DISPMODE_ENABLE      0x00000001 /* Display enable */
    32 #define DISPMODE_LINEDOUBLE  0x00000002 /* scanline double */
    33 #define DISPMODE_COLFMT      0x0000000C /* Colour mode */
    34 #define DISPMODE_CLOCKDIV    0x08000000 /* Clock divide-by-2 */
    36 #define DISPSIZE_MODULO 0x3FF00000 /* line skip +1 (32-bit words)*/
    37 #define DISPSIZE_LPF    0x000FFC00 /* lines per field */
    38 #define DISPSIZE_PPL    0x000003FF /* pixel words (32 bit) per line */
    40 #define DISPCFG_VP 0x00000001 /* V-sync polarity */
    41 #define DISPCFG_HP 0x00000002 /* H-sync polarity */
    42 #define DISPCFG_I  0x00000010 /* Interlace enable */
    43 #define DISPCFG_BS 0x000000C0 /* Broadcast standard */
    44 #define DISPCFG_VO 0x00000100 /* Video output enable */
    46 #define DISPSYNC_LINE_MASK  0x000003FF
    47 #define DISPSYNC_EVEN_FIELD 0x00000000
    48 #define DISPSYNC_ODD_FIELD  0x00000400
    49 #define DISPSYNC_ACTIVE     0x00000800
    50 #define DISPSYNC_HSYNC      0x00001000
    51 #define DISPSYNC_VSYNC      0x00002000
    53 #define BS_NTSC 0x00000000
    54 #define BS_PAL  0x00000040
    55 #define BS_PALM 0x00000080 /* ? */
    56 #define BS_PALN 0x000000C0 /* ? */
    58 #define PVR2_RAM_BASE 0x05000000
    59 #define PVR2_RAM_BASE_INT 0x04000000
    60 #define PVR2_RAM_SIZE (8 * 1024 * 1024)
    61 #define PVR2_RAM_PAGES (PVR2_RAM_SIZE>>12)
    62 #define PVR2_RAM_MASK 0x7FFFFF
    64 #define RENDER_ZONLY  0
    65 #define RENDER_NORMAL 1     /* Render non-modified polygons */
    66 #define RENDER_CHEAPMOD 2   /* Render cheap-modified polygons */
    67 #define RENDER_FULLMOD 3    /* Render the fully-modified version of the polygons */
    69 void pvr2_next_frame( void );
    70 void pvr2_set_base_address( uint32_t );
    71 int pvr2_get_frame_count( void );
    72 render_buffer_t pvr2_get_front_buffer();
    73 uint32_t pvr2_get_border_colour();
    74 gboolean pvr2_save_next_scene( const gchar *filename );
    76 #define PVR2_CMD_END_OF_LIST 0x00
    77 #define PVR2_CMD_USER_CLIP   0x20
    78 #define PVR2_CMD_POLY_OPAQUE 0x80
    79 #define PVR2_CMD_MOD_OPAQUE  0x81
    80 #define PVR2_CMD_POLY_TRANS  0x82
    81 #define PVR2_CMD_MOD_TRANS   0x83
    82 #define PVR2_CMD_POLY_PUNCHOUT 0x84
    83 #define PVR2_CMD_VERTEX      0xE0
    84 #define PVR2_CMD_VERTEX_LAST 0xF0
    86 #define PVR2_POLY_TEXTURED 0x00000008
    87 #define PVR2_POLY_SPECULAR 0x00000004
    88 #define PVR2_POLY_SHADED   0x00000002
    89 #define PVR2_POLY_UV_16BIT 0x00000001
    91 #define PVR2_POLY_MODE_CLAMP_RGB 0x00200000
    92 #define PVR2_POLY_MODE_ALPHA    0x00100000
    93 #define PVR2_POLY_MODE_TEXALPHA 0x00080000
    94 #define PVR2_POLY_MODE_FLIP_S   0x00040000
    95 #define PVR2_POLY_MODE_FLIP_T   0x00020000
    96 #define PVR2_POLY_MODE_CLAMP_S  0x00010000
    97 #define PVR2_POLY_MODE_CLAMP_T  0x00008000
    99 #define PVR2_POLY_FOG_LOOKUP    0x00000000
   100 #define PVR2_POLY_FOG_VERTEX    0x00400000
   101 #define PVR2_POLY_FOG_DISABLED  0x00800000
   102 #define PVR2_POLY_FOG_LOOKUP2   0x00C00000
   105 #define PVR2_TEX_FORMAT_ARGB1555 0x00000000
   106 #define PVR2_TEX_FORMAT_RGB565   0x08000000
   107 #define PVR2_TEX_FORMAT_ARGB4444 0x10000000
   108 #define PVR2_TEX_FORMAT_YUV422   0x18000000
   109 #define PVR2_TEX_FORMAT_BUMPMAP  0x20000000
   110 #define PVR2_TEX_FORMAT_IDX4     0x28000000
   111 #define PVR2_TEX_FORMAT_IDX8     0x30000000
   113 #define PVR2_TEX_MIPMAP      0x80000000
   114 #define PVR2_TEX_COMPRESSED  0x40000000
   115 #define PVR2_TEX_FORMAT_MASK 0x38000000
   116 #define PVR2_TEX_UNTWIDDLED  0x04000000
   117 #define PVR2_TEX_STRIDE      0x02000000
   118 #define PVR2_TEX_IS_PALETTE(mode) ( (mode & PVR2_TEX_FORMAT_MASK) == PVR2_TEX_FORMAT_IDX4 || (mode&PVR2_TEX_FORMAT_MASK) == PVR2_TEX_FORMAT_IDX8 )
   121 #define PVR2_TEX_ADDR(x) ( ((x)&0x01FFFFF)<<3 );
   122 #define PVR2_TEX_IS_MIPMAPPED(x) ( ((x) & 0x84000000) == 0x80000000 )
   123 #define PVR2_TEX_IS_COMPRESSED(x) ( (x) & PVR2_TEX_COMPRESSED )
   124 #define PVR2_TEX_IS_TWIDDLED(x) (((x) & PVR2_TEX_UNTWIDDLED) == 0)
   125 #define PVR2_TEX_IS_STRIDE(x) (((x) & 0x06000000) == 0x06000000)
   127 /****************************** Frame Buffer *****************************/
   129 /**
   130  * Write a block of data to an address in the DMA range (0x10000000 - 
   131  * 0x13FFFFFF), ie TA, YUV, or texture ram.
   132  */
   133 void pvr2_dma_write( sh4addr_t dest, unsigned char *src, uint32_t length );
   135 /**
   136  * Write to the interleaved memory address space (aka 64-bit address space).
   137  */
   138 void pvr2_vram64_write( sh4addr_t dest, unsigned char *src, uint32_t length );
   140 /**
   141  * Write to the interleaved memory address space (aka 64-bit address space),
   142  * using a line length and stride.
   143  */
   144 void pvr2_vram64_write_stride( sh4addr_t dest, unsigned char *src, uint32_t line_bytes,
   145 			       uint32_t line_stride_bytes, uint32_t line_count );
   147 /**
   148  * Read from the interleaved memory address space (aka 64-bit address space)
   149  */
   150 void pvr2_vram64_read( unsigned char *dest, sh4addr_t src, uint32_t length );
   152 /**
   153  * Read a twiddled image from interleaved memory address space (aka 64-bit address
   154  * space), writing the image to the destination buffer in detwiddled format. 
   155  * Width and height must be powers of 2
   156  * This version reads 4-bit pixels.
   157  */
   158 void pvr2_vram64_read_twiddled_4( unsigned char *dest, sh4addr_t src, uint32_t width, uint32_t height );
   161 /**
   162  * Read a twiddled image from interleaved memory address space (aka 64-bit address
   163  * space), writing the image to the destination buffer in detwiddled format. 
   164  * Width and height must be powers of 2
   165  * This version reads 8-bit pixels.
   166  */
   167 void pvr2_vram64_read_twiddled_8( unsigned char *dest, sh4addr_t src, uint32_t width, uint32_t height );
   169 /**
   170  * Read a twiddled image from interleaved memory address space (aka 64-bit address
   171  * space), writing the image to the destination buffer in detwiddled format. 
   172  * Width and height must be powers of 2, and src must be 16-bit aligned.
   173  * This version reads 16-bit pixels.
   174  */
   175 void pvr2_vram64_read_twiddled_16( unsigned char *dest, sh4addr_t src, uint32_t width, uint32_t height );
   177 /**
   178  * Read an image from the interleaved memory address space (aka 64-bit address space) 
   179  * where the source and destination line sizes may differ. Note that both byte
   180  * counts must be a multiple of 4, and the src address must be 32-bit aligned.
   181  */
   182 void pvr2_vram64_read_stride( unsigned char *dest, uint32_t dest_line_bytes, sh4addr_t srcaddr,
   183 			       uint32_t src_line_bytes, uint32_t line_count );
   184 /**
   185  * Dump a portion of vram to a stream from the interleaved memory address 
   186  * space.
   187  */
   188 void pvr2_vram64_dump( sh4addr_t addr, uint32_t length, FILE *f );
   190 /**
   191  * Flush the indicated render buffer back to PVR. Caller is responsible for
   192  * tracking whether there is actually anything in the buffer.
   193  *
   194  * @param buffer A render buffer indicating the address to store to, and the
   195  * format the data needs to be in.
   196  * @param backBuffer TRUE to flush the back buffer, FALSE for 
   197  * the front buffer.
   198  */
   199 void pvr2_render_buffer_copy_to_sh4( render_buffer_t buffer );
   201 /**
   202  * Invalidate any caching on the supplied SH4 address
   203  */
   204 gboolean pvr2_render_buffer_invalidate( sh4addr_t addr, gboolean isWrite );
   207 /**************************** Tile Accelerator ***************************/
   208 /**
   209  * Process the data in the supplied buffer as an array of TA command lists.
   210  * Any excess bytes are held pending until a complete list is sent
   211  */
   212 void pvr2_ta_write( unsigned char *buf, uint32_t length );
   215 /**
   216  * (Re)initialize the tile accelerator in preparation for the next scene.
   217  * Normally called immediately before commencing polygon transmission.
   218  */
   219 void pvr2_ta_init( void );
   221 void pvr2_ta_reset( void );
   223 void pvr2_ta_save_state( FILE *f );
   225 int pvr2_ta_load_state( FILE *f );
   227 /****************************** YUV Converter ****************************/
   229 /**
   230  * Process a block of YUV data.
   231  */
   232 void pvr2_yuv_write( unsigned char *buf, uint32_t length );
   234 /**
   235  * Initialize the YUV converter.
   236  */
   237 void pvr2_yuv_init( uint32_t target_addr );
   239 void pvr2_yuv_set_config( uint32_t config );
   241 void pvr2_yuv_save_state( FILE *f );
   243 int pvr2_yuv_load_state( FILE *f );
   245 /********************************* Renderer ******************************/
   247 void pvr2_read_scene( void );
   249 /**
   250  * Render the current scene stored in PVR ram to the GL back buffer.
   251  */
   252 void pvr2_render_scene( render_buffer_t buffer );
   254 /**
   255  * Display the scene rendered to the supplied address.
   256  * @return TRUE if there was an available render that was displayed,
   257  * otherwise FALSE (and no action was taken)
   258  */
   259 gboolean pvr2_render_display_frame( uint32_t address );
   262 void render_backplane( uint32_t *polygon, uint32_t width, uint32_t height, uint32_t mode );
   264 void render_set_context( uint32_t *context, int render_mode );
   266 void pvr2_render_tilebuffer( int width, int height, int clipx1, int clipy1, 
   267 			     int clipx2, int clipy2 );
   269 void pvr2_render_find_z_range( float *min, float *max );
   271 void pvr2_render_getsize( int *x, int *y );
   273 /**
   274  * Structure to hold a complete unpacked vertex (excluding modifier
   275  * volume parameters - generate separate vertexes in that case).
   276  */
   277 struct vertex_unpacked {
   278     float x,y,z;
   279     float u,v;            /* Texture coordinates */
   280     float rgba[4];        /* Fragment colour (RGBA order) */
   281     float offset_rgba[4]; /* Offset color (RGBA order) */
   282 };
   284 /****************************** Texture Cache ****************************/
   286 /**
   287  * Initialize the texture cache.
   288  */
   289 void texcache_init( void );
   291 /**
   292  * Initialize the GL side of the texture cache (texture ids and such).
   293  */
   294 void texcache_gl_init( void );
   296 /**
   297  * Flush all textures and delete. The cache will be non-functional until
   298  * the next call to texcache_init(). This would typically be done if
   299  * switching GL targets.
   300  */    
   301 void texcache_shutdown( void );
   303 /**
   304  * Flush (ie free) all textures.
   305  */
   306 void texcache_flush( void );
   308 /**
   309  * Flush all palette-based textures (if any)
   310  */
   311 void texcache_invalidate_palette(void);
   313 /**
   314  * Evict all textures contained in the page identified by a texture address.
   315  */
   316 void texcache_invalidate_page( uint32_t texture_addr );
   318 /**
   319  * Return a texture ID for the texture specified at the supplied address
   320  * and given parameters (the same sequence of bytes could in theory have
   321  * multiple interpretations). We use the texture address as the primary
   322  * index, but allow for multiple instances at each address. The texture
   323  * will be bound to the GL_TEXTURE_2D target before being returned.
   324  * 
   325  * If the texture has already been bound, return the ID to which it was
   326  * bound. Otherwise obtain an unused texture ID and set it up appropriately.
   327  */
   328 GLuint texcache_get_texture( uint32_t texture_word, int width, int height );
   330 void pvr2_check_palette_changed(void);
   332 int pvr2_render_save_scene( const gchar *filename );
   335 /************************* Rendering support macros **************************/
   336 #define POLY1_DEPTH_MODE(poly1) ( pvr2_poly_depthmode[(poly1)>>29] )
   337 #define POLY1_DEPTH_WRITE(poly1) (((poly1)&0x04000000) == 0 )
   338 #define POLY1_CULL_MODE(poly1) (((poly1)>>27)&0x03)
   339 #define POLY1_CULL_ENABLE(poly1) (((poly1)>>28)&0x01)
   340 #define POLY1_TEXTURED(poly1) (((poly1)&0x02000000))
   341 #define POLY1_SPECULAR(poly1) (((poly1)&0x01000000))
   342 #define POLY1_GOURAUD_SHADED(poly1) ((poly1)&0x00800000)
   343 #define POLY1_SHADE_MODEL(poly1) (((poly1)&0x00800000) ? GL_SMOOTH : GL_FLAT)
   344 #define POLY1_UV16(poly1)   (((poly1)&0x00400000))
   345 #define POLY1_SINGLE_TILE(poly1) (((poly1)&0x00200000))
   347 #define POLY2_SRC_BLEND(poly2) ( pvr2_poly_srcblend[(poly2) >> 29] )
   348 #define POLY2_DEST_BLEND(poly2) ( pvr2_poly_dstblend[((poly2)>>26)&0x07] )
   349 #define POLY2_SRC_BLEND_TARGET(poly2)    ((poly2)&0x02000000)
   350 #define POLY2_DEST_BLEND_TARGET(poly2)   ((poly2)&0x01000000)
   351 #define POLY2_FOG_MODE(poly2)            ((poly2)&0x00C00000)
   352 #define POLY2_COLOUR_CLAMP_ENABLE(poly2) ((poly2)&0x00200000)
   353 #define POLY2_ALPHA_ENABLE(poly2)        ((poly2)&0x00100000)
   354 #define POLY2_TEX_ALPHA_ENABLE(poly2)   (((poly2)&0x00080000) == 0 )
   355 #define POLY2_TEX_CLAMP_U(poly2)         ((poly2)&0x00010000)
   356 #define POLY2_TEX_CLAMP_V(poly2)         ((poly2)&0x00008000)
   357 #define POLY2_TEX_WIDTH(poly2) ( 1<< ((((poly2) >> 3) & 0x07 ) + 3) )
   358 #define POLY2_TEX_HEIGHT(poly2) ( 1<< (((poly2) & 0x07 ) + 3) )
   359 #define POLY2_TEX_BLEND(poly2) (((poly2) >> 6)&0x03)
   360 extern int pvr2_poly_depthmode[8];
   361 extern int pvr2_poly_srcblend[8];
   362 extern int pvr2_poly_dstblend[8];
   363 extern int pvr2_poly_texblend[4];
   364 extern int pvr2_render_colour_format[8];
   366 #define CULL_NONE 0
   367 #define CULL_SMALL 1
   368 #define CULL_CCW 2
   369 #define CULL_CW 3
   371 #define SEGMENT_END         0x80000000
   372 #define SEGMENT_ZCLEAR      0x40000000
   373 #define SEGMENT_SORT_TRANS  0x20000000
   374 #define SEGMENT_START       0x10000000
   375 #define SEGMENT_X(c)        (((c) >> 2) & 0x3F)
   376 #define SEGMENT_Y(c)        (((c) >> 8) & 0x3F)
   377 #define NO_POINTER          0x80000000
   378 #define IS_TILE_PTR(p)      ( ((p)&NO_POINTER) == 0 )
   379 #define IS_LAST_SEGMENT(s)  (((s)->control) & SEGMENT_END)
   381 struct tile_segment {
   382     uint32_t control;
   383     pvraddr_t opaque_ptr;
   384     pvraddr_t opaquemod_ptr;
   385     pvraddr_t trans_ptr;
   386     pvraddr_t transmod_ptr;
   387     pvraddr_t punchout_ptr;
   388 };
   390 #endif /* !lxdream_pvr2_H */
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