2 * $Id: sh4.c,v 1.3 2007-10-01 11:51:25 nkeynes Exp $
4 * SH4 parent module for all CPU modes and SH4 peripheral
7 * Copyright (c) 2005 Nathan Keynes.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
20 #define MODULE sh4_module
23 #include "sh4/sh4core.h"
24 #include "sh4/sh4mmio.h"
30 #define EXV_EXCEPTION 0x100 /* General exception vector */
31 #define EXV_TLBMISS 0x400 /* TLB-miss exception vector */
32 #define EXV_INTERRUPT 0x600 /* External interrupt vector */
34 void sh4_init( void );
35 void sh4_reset( void );
36 void sh4_start( void );
37 void sh4_stop( void );
38 void sh4_save_state( FILE *f );
39 int sh4_load_state( FILE *f );
41 uint32_t sh4_run_slice( uint32_t );
42 uint32_t sh4_xlat_run_slice( uint32_t );
44 struct dreamcast_module sh4_module = { "SH4", sh4_init, sh4_reset,
45 NULL, sh4_run_slice, sh4_stop,
46 sh4_save_state, sh4_load_state };
48 struct sh4_registers sh4r;
49 struct breakpoint_struct sh4_breakpoints[MAX_BREAKPOINTS];
50 int sh4_breakpoint_count = 0;
52 void sh4_set_use_xlat( gboolean use )
57 sh4_module.run_time_slice = sh4_xlat_run_slice;
59 sh4_module.run_time_slice = sh4_run_slice;
65 register_io_regions( mmio_list_sh4mmio );
72 /* zero everything out, for the sake of having a consistent state. */
73 memset( &sh4r, 0, sizeof(sh4r) );
75 /* Resume running if we were halted */
76 sh4r.sh4_state = SH4_STATE_RUNNING;
79 sh4r.new_pc= 0xA0000002;
80 sh4r.vbr = 0x00000000;
81 sh4r.fpscr = 0x00040001;
83 sh4r.fr_bank = &sh4r.fr[0][0];
85 /* Mem reset will do this, but if we want to reset _just_ the SH4... */
86 MMIO_WRITE( MMU, EXPEVT, EXC_POWER_RESET );
88 /* Peripheral modules */
102 void sh4_save_state( FILE *f )
104 if( sh4_module.run_time_slice == sh4_xlat_run_slice ) {
105 /* If we were running with the translator, update new_pc and in_delay_slot */
106 sh4r.new_pc = sh4r.pc+2;
107 sh4r.in_delay_slot = FALSE;
110 fwrite( &sh4r, sizeof(sh4r), 1, f );
112 INTC_save_state( f );
114 SCIF_save_state( f );
117 int sh4_load_state( FILE * f )
119 fread( &sh4r, sizeof(sh4r), 1, f );
120 sh4r.fr_bank = &sh4r.fr[(sh4r.fpscr&FPSCR_FR)>>21][0]; // Fixup internal FR pointer
122 INTC_load_state( f );
124 return SCIF_load_state( f );
128 void sh4_set_breakpoint( uint32_t pc, int type )
130 sh4_breakpoints[sh4_breakpoint_count].address = pc;
131 sh4_breakpoints[sh4_breakpoint_count].type = type;
132 sh4_breakpoint_count++;
135 gboolean sh4_clear_breakpoint( uint32_t pc, int type )
139 for( i=0; i<sh4_breakpoint_count; i++ ) {
140 if( sh4_breakpoints[i].address == pc &&
141 sh4_breakpoints[i].type == type ) {
142 while( ++i < sh4_breakpoint_count ) {
143 sh4_breakpoints[i-1].address = sh4_breakpoints[i].address;
144 sh4_breakpoints[i-1].type = sh4_breakpoints[i].type;
146 sh4_breakpoint_count--;
153 int sh4_get_breakpoint( uint32_t pc )
156 for( i=0; i<sh4_breakpoint_count; i++ ) {
157 if( sh4_breakpoints[i].address == pc )
158 return sh4_breakpoints[i].type;
163 void sh4_set_pc( int pc )
170 /******************************* Support methods ***************************/
172 static void sh4_switch_banks( )
176 memcpy( tmp, sh4r.r, sizeof(uint32_t)*8 );
177 memcpy( sh4r.r, sh4r.r_bank, sizeof(uint32_t)*8 );
178 memcpy( sh4r.r_bank, tmp, sizeof(uint32_t)*8 );
181 void sh4_write_sr( uint32_t newval )
183 if( (newval ^ sh4r.sr) & SR_RB )
186 sh4r.t = (newval&SR_T) ? 1 : 0;
187 sh4r.s = (newval&SR_S) ? 1 : 0;
188 sh4r.m = (newval&SR_M) ? 1 : 0;
189 sh4r.q = (newval&SR_Q) ? 1 : 0;
193 uint32_t sh4_read_sr( void )
195 /* synchronize sh4r.sr with the various bitflags */
196 sh4r.sr &= SR_MQSTMASK;
197 if( sh4r.t ) sh4r.sr |= SR_T;
198 if( sh4r.s ) sh4r.sr |= SR_S;
199 if( sh4r.m ) sh4r.sr |= SR_M;
200 if( sh4r.q ) sh4r.sr |= SR_Q;
206 #define RAISE( x, v ) do{ \
207 if( sh4r.vbr == 0 ) { \
208 ERROR( "%08X: VBR not initialized while raising exception %03X, halting", sh4r.pc, x ); \
209 dreamcast_stop(); return FALSE; \
211 sh4r.spc = sh4r.pc; \
212 sh4r.ssr = sh4_read_sr(); \
213 sh4r.sgr = sh4r.r[15]; \
214 MMIO_WRITE(MMU,EXPEVT,x); \
215 sh4r.pc = sh4r.vbr + v; \
216 sh4r.new_pc = sh4r.pc + 2; \
217 sh4_write_sr( sh4r.ssr |SR_MD|SR_BL|SR_RB ); \
218 if( sh4r.in_delay_slot ) { \
219 sh4r.in_delay_slot = 0; \
223 return TRUE; } while(0)
226 * Raise a general CPU exception for the specified exception code.
227 * (NOT for TRAPA or TLB exceptions)
229 gboolean sh4_raise_exception( int code )
231 RAISE( code, EXV_EXCEPTION );
234 gboolean sh4_raise_trap( int trap )
236 MMIO_WRITE( MMU, TRA, trap<<2 );
237 return sh4_raise_exception( EXC_TRAP );
240 gboolean sh4_raise_slot_exception( int normal_code, int slot_code ) {
241 if( sh4r.in_delay_slot ) {
242 return sh4_raise_exception(slot_code);
244 return sh4_raise_exception(normal_code);
248 gboolean sh4_raise_tlb_exception( int code )
250 RAISE( code, EXV_TLBMISS );
253 void sh4_accept_interrupt( void )
255 uint32_t code = intc_accept_interrupt();
256 sh4r.ssr = sh4_read_sr();
258 sh4r.sgr = sh4r.r[15];
259 sh4_write_sr( sh4r.ssr|SR_BL|SR_MD|SR_RB );
260 MMIO_WRITE( MMU, INTEVT, code );
261 sh4r.pc = sh4r.vbr + 0x600;
262 sh4r.new_pc = sh4r.pc + 2;
263 // WARN( "Accepting interrupt %03X, from %08X => %08X", code, sh4r.spc, sh4r.pc );
266 void signsat48( void )
268 if( ((int64_t)sh4r.mac) < (int64_t)0xFFFF800000000000LL )
269 sh4r.mac = 0xFFFF800000000000LL;
270 else if( ((int64_t)sh4r.mac) > (int64_t)0x00007FFFFFFFFFFFLL )
271 sh4r.mac = 0x00007FFFFFFFFFFFLL;
274 void sh4_fsca( uint32_t anglei, float *fr )
276 float angle = (((float)(anglei&0xFFFF))/65536.0) * 2 * M_PI;
283 if( MMIO_READ( CPG, STBCR ) & 0x80 ) {
284 sh4r.sh4_state = SH4_STATE_STANDBY;
286 sh4r.sh4_state = SH4_STATE_SLEEP;
291 * Compute the matrix tranform of fv given the matrix xf.
292 * Both fv and xf are word-swapped as per the sh4r.fr banks
294 void sh4_ftrv( float *target, float *xf )
296 float fv[4] = { target[1], target[0], target[3], target[2] };
297 target[1] = xf[1] * fv[0] + xf[5]*fv[1] +
298 xf[9]*fv[2] + xf[13]*fv[3];
299 target[0] = xf[0] * fv[0] + xf[4]*fv[1] +
300 xf[8]*fv[2] + xf[12]*fv[3];
301 target[3] = xf[3] * fv[0] + xf[7]*fv[1] +
302 xf[11]*fv[2] + xf[15]*fv[3];
303 target[2] = xf[2] * fv[0] + xf[6]*fv[1] +
304 xf[10]*fv[2] + xf[14]*fv[3];
.