2 * $Id: x86op.h,v 1.10 2007-09-19 09:15:18 nkeynes Exp $
4 * Definitions of x86 opcodes for use by the translator.
6 * Copyright (c) 2007 Nathan Keynes.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
19 #ifndef __lxdream_x86op_H
20 #define __lxdream_x86op_H
42 #define MARK_JMP(n,x) uint8_t *_mark_jmp_##x = xlat_output + n
43 #define JMP_TARGET(x) assert( _mark_jmp_##x == xlat_output )
45 #define MARK_JMP(n, x)
53 #define OP(x) *xlat_output++ = (x)
54 #define OP32(x) *((uint32_t *)xlat_output) = (x); xlat_output+=4
56 /* Offset of a reg relative to the sh4r structure */
57 #define REG_OFFSET(reg) (((char *)&sh4r.reg) - ((char *)&sh4r))
59 #define R_T REG_OFFSET(t)
60 #define R_Q REG_OFFSET(q)
61 #define R_S REG_OFFSET(s)
62 #define R_M REG_OFFSET(m)
63 #define R_SR REG_OFFSET(sr)
64 #define R_GBR REG_OFFSET(gbr)
65 #define R_SSR REG_OFFSET(ssr)
66 #define R_SPC REG_OFFSET(spc)
67 #define R_VBR REG_OFFSET(vbr)
68 #define R_MACH REG_OFFSET(mac)+4
69 #define R_MACL REG_OFFSET(mac)
70 #define R_PR REG_OFFSET(pr)
71 #define R_SGR REG_OFFSET(sgr)
72 #define R_FPUL REG_OFFSET(fpul)
73 #define R_FPSCR REG_OFFSET(fpscr)
74 #define R_DBR REG_OFFSET(dbr)
76 /**************** Basic X86 operations *********************/
77 /* Note: operands follow SH4 convention (source, dest) rather than x86
78 * conventions (dest, source)
81 /* Two-reg modrm form - first arg is the r32 reg, second arg is the r/m32 reg */
82 #define MODRM_r32_rm32(r1,r2) OP(0xC0 | (r1<<3) | r2)
83 #define MODRM_rm32_r32(r1,r2) OP(0xC0 | (r2<<3) | r1)
85 /* ebp+disp8 modrm form */
86 #define MODRM_r32_ebp8(r1,disp) OP(0x45 | (r1<<3)); OP(disp)
88 /* ebp+disp32 modrm form */
89 #define MODRM_r32_ebp32(r1,disp) OP(0x85 | (r1<<3)); OP32(disp)
91 #define MODRM_r32_sh4r(r1,disp) if(disp>127){ MODRM_r32_ebp32(r1,disp);}else{ MODRM_r32_ebp8(r1,(unsigned char)disp); }
94 #define ADD_sh4r_r32(disp,r1) OP(0x03); MODRM_r32_sh4r(r1,disp)
95 #define ADD_r32_sh4r(r1,disp) OP(0x01); MODRM_r32_sh4r(r1,disp)
96 #define ADD_r32_r32(r1,r2) OP(0x03); MODRM_rm32_r32(r1,r2)
97 #define ADD_imm8s_r32(imm,r1) OP(0x83); MODRM_rm32_r32(r1, 0); OP(imm)
98 #define ADD_imm8s_sh4r(imm,disp) OP(0x83); MODRM_r32_sh4r(0,disp); OP(imm)
99 #define ADD_imm32_r32(imm32,r1) OP(0x81); MODRM_rm32_r32(r1,0); OP32(imm32)
100 #define ADC_r32_r32(r1,r2) OP(0x13); MODRM_rm32_r32(r1,r2)
101 #define ADC_sh4r_r32(disp,r1) OP(0x13); MODRM_r32_sh4r(r1,disp)
102 #define ADC_r32_sh4r(r1,disp) OP(0x11); MODRM_r32_sh4r(r1,disp)
103 #define AND_r32_r32(r1,r2) OP(0x23); MODRM_rm32_r32(r1,r2)
104 #define AND_imm8_r8(imm8, r1) OP(0x80); MODRM_rm32_r32(r1,4); OP(imm8)
105 #define AND_imm8s_r32(imm8,r1) OP(0x83); MODRM_rm32_r32(r1,4); OP(imm8)
106 #define AND_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,4); OP32(imm)
107 #define CALL_r32(r1) OP(0xFF); MODRM_rm32_r32(r1,2)
108 #define CLC() OP(0xF8)
109 #define CMC() OP(0xF5)
110 #define CMP_sh4r_r32(disp,r1) OP(0x3B); MODRM_r32_sh4r(r1,disp)
111 #define CMP_r32_r32(r1,r2) OP(0x3B); MODRM_rm32_r32(r1,r2)
112 #define CMP_imm32_r32(imm32, r1) OP(0x81); MODRM_rm32_r32(r1,7); OP32(imm32)
113 #define CMP_imm8s_r32(imm,r1) OP(0x83); MODRM_rm32_r32(r1,7); OP(imm)
114 #define CMP_imm8s_sh4r(imm,disp) OP(0x83); MODRM_r32_sh4r(7,disp) OP(imm)
115 #define DEC_r32(r1) OP(0x48+r1)
116 #define IMUL_r32(r1) OP(0xF7); MODRM_rm32_r32(r1,5)
117 #define INC_r32(r1) OP(0x40+r1)
118 #define JMP_rel8(rel, label) OP(0xEB); OP(rel); MARK_JMP(rel,label)
119 #define MOV_r32_r32(r1,r2) OP(0x89); MODRM_r32_rm32(r1,r2)
120 #define MOV_r32_sh4r(r1,disp) OP(0x89); MODRM_r32_sh4r(r1,disp)
121 #define MOV_moff32_EAX(off) OP(0xA1); OP32(off)
122 #define MOV_sh4r_r32(disp, r1) OP(0x8B); MODRM_r32_sh4r(r1,disp)
123 #define MOV_r32ind_r32(r1,r2) OP(0x8B); OP(0 + (r2<<3) + r1 )
124 #define MOVSX_r8_r32(r1,r2) OP(0x0F); OP(0xBE); MODRM_rm32_r32(r1,r2)
125 #define MOVSX_r16_r32(r1,r2) OP(0x0F); OP(0xBF); MODRM_rm32_r32(r1,r2)
126 #define MOVZX_r8_r32(r1,r2) OP(0x0F); OP(0xB6); MODRM_rm32_r32(r1,r2)
127 #define MOVZX_r16_r32(r1,r2) OP(0x0F); OP(0xB7); MODRM_rm32_r32(r1,r2)
128 #define MUL_r32(r1) OP(0xF7); MODRM_rm32_r32(r1,4)
129 #define NEG_r32(r1) OP(0xF7); MODRM_rm32_r32(r1,3)
130 #define NOT_r32(r1) OP(0xF7); MODRM_rm32_r32(r1,2)
131 #define OR_r32_r32(r1,r2) OP(0x0B); MODRM_rm32_r32(r1,r2)
132 #define OR_imm8_r8(imm,r1) OP(0x80); MODRM_rm32_r32(r1,1); OP(imm)
133 #define OR_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,1); OP32(imm)
134 #define OR_sh4r_r32(disp,r1) OP(0x0B); MODRM_r32_sh4r(r1,disp)
135 #define POP_r32(r1) OP(0x58 + r1)
136 #define PUSH_r32(r1) OP(0x50 + r1)
137 #define PUSH_imm32(imm) OP(0x68); OP32(imm)
138 #define RCL1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,2)
139 #define RCR1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,3)
140 #define RET() OP(0xC3)
141 #define ROL1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,0)
142 #define ROR1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,1)
143 #define SAR1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,7)
144 #define SAR_imm8_r32(imm,r1) OP(0xC1); MODRM_rm32_r32(r1,7); OP(imm)
145 #define SAR_r32_CL(r1) OP(0xD3); MODRM_rm32_r32(r1,7)
146 #define SBB_r32_r32(r1,r2) OP(0x1B); MODRM_rm32_r32(r1,r2)
147 #define SHL1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,4)
148 #define SHL_r32_CL(r1) OP(0xD3); MODRM_rm32_r32(r1,4)
149 #define SHL_imm8_r32(imm,r1) OP(0xC1); MODRM_rm32_r32(r1,4); OP(imm)
150 #define SHR1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,5)
151 #define SHR_r32_CL(r1) OP(0xD3); MODRM_rm32_r32(r1,5)
152 #define SHR_imm8_r32(imm,r1) OP(0xC1); MODRM_rm32_r32(r1,5); OP(imm)
153 #define STC() OP(0xF9)
154 #define SUB_r32_r32(r1,r2) OP(0x2B); MODRM_rm32_r32(r1,r2)
155 #define SUB_sh4r_r32(disp,r1) OP(0x2B); MODRM_r32_sh4r(r1, disp)
156 #define TEST_r8_r8(r1,r2) OP(0x84); MODRM_r32_rm32(r1,r2)
157 #define TEST_r32_r32(r1,r2) OP(0x85); MODRM_rm32_r32(r1,r2)
158 #define TEST_imm8_r8(imm8,r1) OP(0xF6); MODRM_rm32_r32(r1,0); OP(imm8)
159 #define TEST_imm32_r32(imm,r1) OP(0xF7); MODRM_rm32_r32(r1,0); OP32(imm)
160 #define XCHG_r8_r8(r1,r2) OP(0x86); MODRM_rm32_r32(r1,r2)
161 #define XOR_r8_r8(r1,r2) OP(0x32); MODRM_rm32_r32(r1,r2)
162 #define XOR_imm8s_r32(imm,r1) OP(0x83); MODRM_rm32_r32(r1,6); OP(imm)
163 #define XOR_r32_r32(r1,r2) OP(0x33); MODRM_rm32_r32(r1,r2)
164 #define XOR_sh4r_r32(disp,r1) OP(0x33); MODRM_r32_sh4r(r1,disp)
165 #define XOR_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,6); OP32(imm)
168 /* Floating point ops */
169 #define FABS_st0() OP(0xD9); OP(0xE1)
170 #define FADDP_st(st) OP(0xDE); OP(0xC0+st)
171 #define FCHS_st0() OP(0xD9); OP(0xE0)
172 #define FCOMIP_st(st) OP(0xDF); OP(0xF0+st)
173 #define FDIVP_st(st) OP(0xDE); OP(0xF8+st)
174 #define FILD_sh4r(disp) OP(0xDB); MODRM_r32_sh4r(0, disp)
175 #define FILD_r32ind(r32) OP(0xDB); OP(0x00+r32)
176 #define FISTP_sh4r(disp) OP(0xDB); MODRM_r32_sh4r(3, disp)
177 #define FLD0_st0() OP(0xD9); OP(0xEE);
178 #define FLD1_st0() OP(0xD9); OP(0xE8);
179 #define FLDCW_r32ind(r32) OP(0xD9); OP(0x28+r32)
180 #define FMULP_st(st) OP(0xDE); OP(0xC8+st)
181 #define FNSTCW_r32ind(r32) OP(0xD9); OP(0x38+r32)
182 #define FPOP_st() OP(0xDD); OP(0xC0); OP(0xD9); OP(0xF7)
183 #define FSUBP_st(st) OP(0xDE); OP(0xE8+st)
184 #define FSQRT_st0() OP(0xD9); OP(0xFA)
186 /* Conditional branches */
187 #define JE_rel8(rel,label) OP(0x74); OP(rel); MARK_JMP(rel,label)
188 #define JA_rel8(rel,label) OP(0x77); OP(rel); MARK_JMP(rel,label)
189 #define JAE_rel8(rel,label) OP(0x73); OP(rel); MARK_JMP(rel,label)
190 #define JG_rel8(rel,label) OP(0x7F); OP(rel); MARK_JMP(rel,label)
191 #define JGE_rel8(rel,label) OP(0x7D); OP(rel); MARK_JMP(rel,label)
192 #define JC_rel8(rel,label) OP(0x72); OP(rel); MARK_JMP(rel,label)
193 #define JO_rel8(rel,label) OP(0x70); OP(rel); MARK_JMP(rel,label)
194 #define JNE_rel8(rel,label) OP(0x75); OP(rel); MARK_JMP(rel,label)
195 #define JNA_rel8(rel,label) OP(0x76); OP(rel); MARK_JMP(rel,label)
196 #define JNAE_rel8(rel,label) OP(0x72); OP(rel); MARK_JMP(rel,label)
197 #define JNG_rel8(rel,label) OP(0x7E); OP(rel); MARK_JMP(rel,label)
198 #define JNGE_rel8(rel,label) OP(0x7C); OP(rel); MARK_JMP(rel,label)
199 #define JNC_rel8(rel,label) OP(0x73); OP(rel); MARK_JMP(rel,label)
200 #define JNO_rel8(rel,label) OP(0x71); OP(rel); MARK_JMP(rel,label)
201 #define JNS_rel8(rel,label) OP(0x79); OP(rel); MARK_JMP(rel,label)
202 #define JS_rel8(rel,label) OP(0x78); OP(rel); MARK_JMP(rel,label)
205 /* 32-bit long forms w/ backpatching to an exit routine */
206 #define JMP_exit(rel) OP(0xE9); sh4_x86_add_backpatch(xlat_output); OP32(rel)
207 #define JE_exit(rel) OP(0x0F); OP(0x84); sh4_x86_add_backpatch(xlat_output); OP32(rel)
208 #define JA_exit(rel) OP(0x0F); OP(0x87); sh4_x86_add_backpatch(xlat_output); OP32(rel)
209 #define JAE_exit(rel) OP(0x0F); OP(0x83); sh4_x86_add_backpatch(xlat_output); OP32(rel)
210 #define JG_exit(rel) OP(0x0F); OP(0x8F); sh4_x86_add_backpatch(xlat_output); OP32(rel)
211 #define JGE_exit(rel) OP(0x0F); OP(0x8D); sh4_x86_add_backpatch(xlat_output); OP32(rel)
212 #define JC_exit(rel) OP(0x0F); OP(0x82); sh4_x86_add_backpatch(xlat_output); OP32(rel)
213 #define JO_exit(rel) OP(0x0F); OP(0x80); sh4_x86_add_backpatch(xlat_output); OP32(rel)
214 #define JNE_exit(rel) OP(0x0F); OP(0x85); sh4_x86_add_backpatch(xlat_output); OP32(rel)
215 #define JNA_exit(rel) OP(0x0F); OP(0x86); sh4_x86_add_backpatch(xlat_output); OP32(rel)
216 #define JNAE_exit(rel) OP(0x0F);OP(0x82); sh4_x86_add_backpatch(xlat_output); OP32(rel)
217 #define JNG_exit(rel) OP(0x0F); OP(0x8E); sh4_x86_add_backpatch(xlat_output); OP32(rel)
218 #define JNGE_exit(rel) OP(0x0F);OP(0x8C); sh4_x86_add_backpatch(xlat_output); OP32(rel)
219 #define JNC_exit(rel) OP(0x0F); OP(0x83); sh4_x86_add_backpatch(xlat_output); OP32(rel)
220 #define JNO_exit(rel) OP(0x0F); OP(0x81); sh4_x86_add_backpatch(xlat_output); OP32(rel)
223 /* Conditional moves ebp-rel */
224 #define CMOVE_r32_r32(r1,r2) OP(0x0F); OP(0x44); MODRM_rm32_r32(r1,r2)
225 #define CMOVA_r32_r32(r1,r2) OP(0x0F); OP(0x47); MODRM_rm32_r32(r1,r2)
226 #define CMOVAE_r32_r32(r1,r2) OP(0x0F); OP(0x43); MODRM_rm32_r32(r1,r2)
227 #define CMOVG_r32_r32(r1,r2) OP(0x0F); OP(0x4F); MODRM_rm32_r32(r1,r2)
228 #define CMOVGE_r32_r32(r1,r2) OP(0x0F); OP(0x4D); MODRM_rm32_r32(r1,r2)
229 #define CMOVC_r32_r32(r1,r2) OP(0x0F); OP(0x42); MODRM_rm32_r32(r1,r2)
230 #define CMOVO_r32_r32(r1,r2) OP(0x0F); OP(0x40); MODRM_rm32_r32(r1,r2)
233 /* Conditional setcc - writeback to sh4r.t */
234 #define SETE_sh4r(disp) OP(0x0F); OP(0x94); MODRM_r32_sh4r(0, disp);
235 #define SETA_sh4r(disp) OP(0x0F); OP(0x97); MODRM_r32_sh4r(0, disp);
236 #define SETAE_sh4r(disp) OP(0x0F); OP(0x93); MODRM_r32_sh4r(0, disp);
237 #define SETG_sh4r(disp) OP(0x0F); OP(0x9F); MODRM_r32_sh4r(0, disp);
238 #define SETGE_sh4r(disp) OP(0x0F); OP(0x9D); MODRM_r32_sh4r(0, disp);
239 #define SETC_sh4r(disp) OP(0x0F); OP(0x92); MODRM_r32_sh4r(0, disp);
240 #define SETO_sh4r(disp) OP(0x0F); OP(0x90); MODRM_r32_sh4r(0, disp);
242 #define SETNE_sh4r(disp) OP(0x0F); OP(0x95); MODRM_r32_sh4r(0, disp);
243 #define SETNA_sh4r(disp) OP(0x0F); OP(0x96); MODRM_r32_sh4r(0, disp);
244 #define SETNAE_sh4r(disp) OP(0x0F); OP(0x92); MODRM_r32_sh4r(0, disp);
245 #define SETNG_sh4r(disp) OP(0x0F); OP(0x9E); MODRM_r32_sh4r(0, disp);
246 #define SETNGE_sh4r(disp) OP(0x0F); OP(0x9C); MODRM_r32_sh4r(0, disp);
247 #define SETNC_sh4r(disp) OP(0x0F); OP(0x93); MODRM_r32_sh4r(0, disp);
248 #define SETNO_sh4r(disp) OP(0x0F); OP(0x91); MODRM_r32_sh4r(0, disp);
250 #define SETE_t() SETE_sh4r(R_T)
251 #define SETA_t() SETA_sh4r(R_T)
252 #define SETAE_t() SETAE_sh4r(R_T)
253 #define SETG_t() SETG_sh4r(R_T)
254 #define SETGE_t() SETGE_sh4r(R_T)
255 #define SETC_t() SETC_sh4r(R_T)
256 #define SETO_t() SETO_sh4r(R_T)
257 #define SETNE_t() SETNE_sh4r(R_T)
259 #define SETC_r8(r1) OP(0x0F); OP(0x92); MODRM_rm32_r32(r1, 0)
261 /* Pseudo-op Load carry from T: CMP [EBP+t], #01 ; CMC */
262 #define LDC_t() OP(0x83); MODRM_r32_sh4r(7,R_T); OP(0x01); CMC()
264 #endif /* !__lxdream_x86op_H */
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lxdream 0.9.1