filename | src/sh4/sh4dasm.in |
changeset | 1065:bc1cc0c54917 |
prev | 998:1754a8c6a9cf |
prev | 569:a1c49e1e8776 |
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author | nkeynes |
date | Wed Nov 10 08:37:42 2010 +1000 (13 years ago) |
permissions | -rw-r--r-- |
last change | Add chain pointer to the xlat cache, so that we can maintain multiple blocks for the same address. This prevents thrashing in cases where we would other keep retranslating the same blocks over and over again due to varying xlat_sh4_mode values |
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1 /**
2 * $Id$
3 *
4 * SH4 CPU definition and disassembly functions
5 *
6 * Copyright (c) 2005 Nathan Keynes.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
19 #include "sh4/sh4core.h"
20 #include "sh4/sh4dasm.h"
21 #include "sh4/mmu.h"
22 #include "mem.h"
24 #define UNIMP(ir) snprintf( buf, len, "??? " )
26 uint32_t sh4_disasm_instruction( sh4vma_t pc, char *buf, int len, char *opcode )
27 {
28 sh4addr_t addr = mmu_vma_to_phys_disasm(pc);
29 uint32_t tmp;
30 uint16_t ir = ext_address_space[addr>>12]->read_word(addr);
32 #define UNDEF(ir) snprintf( buf, len, "???? " );
33 #define RN(ir) ((ir&0x0F00)>>8)
34 #define RN_BANK(ir) ((ir&0x0070)>>4)
35 #define RM(ir) ((ir&0x00F0)>>4)
36 #define DISP4(ir) (ir&0x000F) /* 4-bit displacements are *not* sign extended */
37 #define DISP8(ir) (ir&0x00FF)
38 #define PCDISP8(ir) SIGNEXT8(ir&0x00FF)
39 #define UIMM8(ir) (ir&0x00FF)
40 #define IMM8(ir) SIGNEXT8(ir&0x00FF)
41 #define DISP12(ir) SIGNEXT12(ir&0x0FFF)
42 #define FVN(ir) ((ir&0x0C00)>>10)
43 #define FVM(ir) ((ir&0x0300)>>8)
45 sprintf( opcode, "%02X %02X", ir&0xFF, ir>>8 );
47 %%
48 ADD Rm, Rn {: snprintf( buf, len, "ADD R%d, R%d", Rm, Rn ); :}
49 ADD #imm, Rn {: snprintf( buf, len, "ADD #%d, R%d", imm, Rn ); :}
50 ADDC Rm, Rn {: snprintf( buf, len, "ADDC R%d, R%d", Rm, Rn ); :}
51 ADDV Rm, Rn {: snprintf( buf, len, "ADDV R%d, R%d", Rm, Rn ); :}
52 AND Rm, Rn {: snprintf( buf, len, "AND R%d, R%d", Rm, Rn ); :}
53 AND #imm, R0 {: snprintf( buf, len, "AND #%d, R0", imm ); :}
54 AND.B #imm, @(R0, GBR) {: snprintf( buf, len, "AND.B #%d, @(R0, GBR)", imm ); :}
55 BF disp {: snprintf( buf, len, "BF $%xh", disp+pc+4 ); :}
56 BF/S disp {: snprintf( buf, len, "BF/S $%xh", disp+pc+4 ); :}
57 BRA disp {: snprintf( buf, len, "BRA $%xh", disp+pc+4 ); :}
58 BRAF Rn {: snprintf( buf, len, "BRAF R%d", Rn ); :}
59 BSR disp {: snprintf( buf, len, "BSR $%xh", disp+pc+4 ); :}
60 BSRF Rn {: snprintf( buf, len, "BSRF R%d", Rn ); :}
61 BT disp {: snprintf( buf, len, "BT $%xh", disp+pc+4 ); :}
62 BT/S disp {: snprintf( buf, len, "BT/S $%xh", disp+pc+4 ); :}
63 CLRMAC {: snprintf( buf, len, "CLRMAC " ); :}
64 CLRS {: snprintf( buf, len, "CLRS " ); :}
65 CLRT {: snprintf( buf, len, "CLRT " ); :}
66 CMP/EQ Rm, Rn {: snprintf( buf, len, "CMP/EQ R%d, R%d", Rm, Rn ); :}
67 CMP/EQ #imm, R0 {: snprintf( buf, len, "CMP/EQ #%d, R0", imm ); :}
68 CMP/GE Rm, Rn {: snprintf( buf, len, "CMP/GE R%d, R%d", Rm, Rn ); :}
69 CMP/GT Rm, Rn {: snprintf( buf, len, "CMP/GT R%d, R%d", Rm, Rn ); :}
70 CMP/HI Rm, Rn {: snprintf( buf, len, "CMP/HI R%d, R%d", Rm, Rn ); :}
71 CMP/HS Rm, Rn {: snprintf( buf, len, "CMP/HS R%d, R%d", Rm, Rn ); :}
72 CMP/PL Rn {: snprintf( buf, len, "CMP/PL R%d", Rn ); :}
73 CMP/PZ Rn {: snprintf( buf, len, "CMP/PZ R%d", Rn ); :}
74 CMP/STR Rm, Rn {: snprintf( buf, len, "CMP/STR R%d, R%d", Rm, Rn ); :}
75 DIV0S Rm, Rn {: snprintf( buf, len, "DIV0S R%d, R%d", Rm, Rn ); :}
76 DIV0U {: snprintf( buf, len, "DIV0U " ); :}
77 DIV1 Rm, Rn {: snprintf( buf, len, "DIV1 R%d, R%d", Rm, Rn ); :}
78 DMULS.L Rm, Rn {: snprintf( buf, len, "DMULS.L R%d, R%d", Rm, Rn ); :}
79 DMULU.L RM, Rn {: snprintf( buf, len, "DMULU.L R%d, R%d", Rm, Rn ); :}
80 DT Rn {: snprintf( buf, len, "DT R%d", Rn ); :}
81 EXTS.B Rm, Rn {: snprintf( buf, len, "EXTS.B R%d, R%d", Rm, Rn ); :}
82 EXTS.W Rm, Rn {: snprintf( buf, len, "EXTS.W R%d, R%d", Rm, Rn ); :}
83 EXTU.B Rm, Rn {: snprintf( buf, len, "EXTU.B R%d, R%d", Rm, Rn ); :}
84 EXTU.W Rm, Rn {: snprintf( buf, len, "EXTU.W R%d, R%d", Rm, Rn ); :}
85 FABS FRn {: snprintf( buf, len, "FABS FR%d", FRn ); :}
86 FADD FRm, FRn {: snprintf( buf, len, "FADD FR%d, FR%d", FRm, FRn ); :}
87 FCMP/EQ FRm, FRn {: snprintf( buf, len, "FCMP/EQ FR%d, FR%d", FRm, FRn ); :}
88 FCMP/GT FRm, FRn {: snprintf( buf, len, "FCMP/GT FR%d, FR%d", FRm, FRn ); :}
89 FCNVDS FRm, FPUL {: snprintf( buf, len, "FCNVDS FR%d, FPUL", FRm ); :}
90 FCNVSD FPUL, FRn {: snprintf( buf, len, "FCNVSD FPUL, FR%d", FRn ); :}
91 FDIV FRm, FRn {: snprintf( buf, len, "FDIV FR%d, FR%d", FRm, FRn ); :}
92 FIPR FVm, FVn {: snprintf( buf, len, "FIPR FV%d, FV%d", FVm, FVn ); :}
93 FLDS FRm, FPUL {: snprintf( buf, len, "FLDS FR%d, FPUL", FRm ); :}
94 FLDI0 FRn {: snprintf( buf, len, "FLDI0 FR%d", FRn ); :}
95 FLDI1 FRn {: snprintf( buf, len, "FLDI1 FR%d", FRn ); :}
96 FLOAT FPUL, FRn {: snprintf( buf, len, "FLOAT FPUL, FR%d", FRn ); :}
97 FMAC FR0, FRm, FRn {: snprintf( buf, len, "FMAC FR0, FR%d, FR%d", FRm, FRn ); :}
98 FMOV FRm, FRn {: snprintf( buf, len, "FMOV FR%d, FR%d", FRm, FRn ); :}
99 FMOV FRm, @Rn {: snprintf( buf, len, "FMOV FR%d, @R%d", FRm, Rn ); :}
100 FMOV FRm, @-Rn {: snprintf( buf, len, "FMOV FR%d, @-R%d", FRm, Rn ); :}
101 FMOV FRm, @(R0, Rn) {: snprintf( buf, len, "FMOV FR%d, @(R0, R%d)", FRm, Rn ); :}
102 FMOV @Rm, FRn {: snprintf( buf, len, "FMOV @R%d, FR%d", Rm, FRn ); :}
103 FMOV @Rm+, FRn {: snprintf( buf, len, "FMOV @R%d+, FR%d", Rm, FRn ); :}
104 FMOV @(R0, Rm), FRn {: snprintf( buf, len, "FMOV @(R0, R%d), FR%d", Rm, FRn ); :}
105 FMUL FRm, FRn {: snprintf( buf, len, "FMUL FR%d, FR%d", FRm, FRn ); :}
106 FNEG FRn {: snprintf( buf, len, "FNEG FR%d", FRn ); :}
107 FRCHG {: snprintf( buf, len, "FRCHG " ); :}
108 FSCA FPUL, FRn {: snprintf( buf, len, "FSCA FPUL, FR%d", FRn ); :}
109 FSCHG {: snprintf( buf, len, "FSCHG " ); :}
110 FSQRT FRn {: snprintf( buf, len, "FSQRT FR%d", FRn ); :}
111 FSRRA FRn {: snprintf( buf, len, "FSRRA FR%d", FRn ); :}
112 FSTS FPUL, FRn {: snprintf( buf, len, "FSTS FPUL, FR%d", FRn ); :}
113 FSUB FRm, FRn {: snprintf( buf, len, "FSUB FR%d, FR%d", FRm, FRn ); :}
114 FTRC FRm, FPUL {: snprintf( buf, len, "FTRC FR%d, FPUL", FRm ); :}
115 FTRV XMTRX, FVn {: snprintf( buf, len, "FTRV XMTRX, FV%d", FVn ); :}
116 JMP @Rn {: snprintf( buf, len, "JMP @R%d", Rn ); :}
117 JSR @Rn {: snprintf( buf, len, "JSR @R%d", Rn ); :}
118 LDC Rm, GBR {: snprintf( buf, len, "LDC R%d, GBR", Rm ); :}
119 LDC Rm, SR {: snprintf( buf, len, "LDC R%d, SR", Rm ); :}
120 LDC Rm, VBR {: snprintf( buf, len, "LDC R%d, VBR", Rm ); :}
121 LDC Rm, SSR {: snprintf( buf, len, "LDC R%d, SSR", Rm ); :}
122 LDC Rm, SGR {: snprintf( buf, len, "LDC R%d, SGR", Rm ); :}
123 LDC Rm, SPC {: snprintf( buf, len, "LDC R%d, SPC", Rm ); :}
124 LDC Rm, DBR {: snprintf( buf, len, "LDC R%d, DBR", Rm ); :}
125 LDC Rm, Rn_BANK {: snprintf( buf, len, "LDC R%d, R%d_BANK", Rm, Rn_BANK ); :}
126 LDS Rm, FPSCR {: snprintf( buf, len, "LDS R%d, FPSCR", Rm ); :}
127 LDS Rm, FPUL {: snprintf( buf, len, "LDS R%d, FPUL", Rm ); :}
128 LDS Rm, MACH {: snprintf( buf, len, "LDS R%d, MACH", Rm ); :}
129 LDS Rm, MACL {: snprintf( buf, len, "LDS R%d, MACL", Rm ); :}
130 LDS Rm, PR {: snprintf( buf, len, "LDS R%d, PR", Rm ); :}
131 LDC.L @Rm+, GBR {: snprintf( buf, len, "LDC.L @R%d+, GBR", Rm ); :}
132 LDC.L @Rm+, SR {: snprintf( buf, len, "LDC.L @R%d+, SR", Rm ); :}
133 LDC.L @Rm+, VBR {: snprintf( buf, len, "LDC.L @R%d+, VBR", Rm ); :}
134 LDC.L @Rm+, SSR {: snprintf( buf, len, "LDC.L @R%d+, SSR", Rm ); :}
135 LDC.L @Rm+, SGR {: snprintf( buf, len, "LDC.L @R%d+, SGR", Rm ); :}
136 LDC.L @Rm+, SPC {: snprintf( buf, len, "LDC.L @R%d+, SPC", Rm ); :}
137 LDC.L @Rm+, DBR {: snprintf( buf, len, "LDC.L @R%d+, DBR", Rm ); :}
138 LDC.L @Rm+, Rn_BANK{: snprintf( buf, len, "LDC.L @R%d+, @R%d+_BANK", Rm, Rn_BANK ); :}
139 LDS.L @Rm+, FPSCR{: snprintf( buf, len, "LDS.L @R%d+, FPSCR", Rm ); :}
140 LDS.L @Rm+, FPUL {: snprintf( buf, len, "LDS.L @R%d+, FPUL", Rm ); :}
141 LDS.L @Rm+, MACH {: snprintf( buf, len, "LDS.L @R%d+, MACH", Rm ); :}
142 LDS.L @Rm+, MACL {: snprintf( buf, len, "LDS.L @R%d+, MACL", Rm ); :}
143 LDS.L @Rm+, PR {: snprintf( buf, len, "LDS.L @R%d+, PR", Rm ); :}
144 LDTLB {: snprintf( buf, len, "LDTLB " ); :}
145 MAC.L @Rm+, @Rn+ {: snprintf( buf, len, "MAC.L @R%d+, @R%d+", Rm, Rn ); :}
146 MAC.W @Rm+, @Rn+ {: snprintf( buf, len, "MAC.W @R%d+, @R%d+", Rm, Rn ); :}
147 MOV Rm, Rn {: snprintf( buf, len, "MOV R%d, R%d", Rm, Rn ); :}
148 MOV #imm, Rn {: snprintf( buf, len, "MOV #%d, R%d", imm, Rn ); :}
149 MOV.B Rm, @Rn {: snprintf( buf, len, "MOV.B R%d, @R%d", Rm, Rn ); :}
150 MOV.B Rm, @-Rn {: snprintf( buf, len, "MOV.B R%d, @-R%d", Rm, Rn ); :}
151 MOV.B Rm, @(R0, Rn) {: snprintf( buf, len, "MOV.B R%d, @(R0, R%d)", Rm, Rn ); :}
152 MOV.B R0, @(disp, GBR) {: snprintf( buf, len, "MOV.B R0, @(%d, GBR)", disp ); :}
153 MOV.B R0, @(disp, Rn) {: snprintf( buf, len, "MOV.B R0, @(%d, R%d)", disp, Rn ); :}
154 MOV.B @Rm, Rn {: snprintf( buf, len, "MOV.B @R%d, R%d", Rm, Rn ); :}
155 MOV.B @Rm+, Rn {: snprintf( buf, len, "MOV.B @R%d+, R%d", Rm, Rn ); :}
156 MOV.B @(R0, Rm), Rn {: snprintf( buf, len, "MOV.B @(R0, R%d), R%d", Rm, Rn ); :}
157 MOV.B @(disp, GBR), R0{: snprintf( buf, len, "MOV.B @(%d, GBR), R0", disp ); :}
158 MOV.B @(disp, Rm), R0 {: snprintf( buf, len, "MOV.B @(%d, R%d), R0", disp, Rm ); :}
159 MOV.L Rm, @Rn {: snprintf( buf, len, "MOV.L R%d, @R%d", Rm, Rn ); :}
160 MOV.L Rm, @-Rn {: snprintf( buf, len, "MOV.L R%d, @-R%d", Rm, Rn ); :}
161 MOV.L Rm, @(R0, Rn) {: snprintf( buf, len, "MOV.L R%d, @(R0, R%d)", Rm, Rn ); :}
162 MOV.L R0, @(disp, GBR) {: snprintf( buf, len, "MOV.L R0, @(%d, GBR)", disp ); :}
163 MOV.L Rm, @(disp, Rn) {: snprintf( buf, len, "MOV.L R%d, @(%d, R%d)", Rm, disp, Rn ); :}
164 MOV.L @Rm, Rn {: snprintf( buf, len, "MOV.L @R%d, R%d", Rm, Rn ); :}
165 MOV.L @Rm+, Rn {: snprintf( buf, len, "MOV.L @R%d+, R%d", Rm, Rn ); :}
166 MOV.L @(R0, Rm), Rn {: snprintf( buf, len, "MOV.L @(R0, R%d), R%d", Rm, Rn ); :}
167 MOV.L @(disp, GBR), R0 {: snprintf( buf, len, "MOV.L @(%d, GBR), R0",disp ); :}
168 MOV.L @(disp, PC), Rn {:
169 tmp = mmu_vma_to_phys_disasm(disp + (pc&0xFFFFFFFC) + 4);
170 snprintf( buf, len, "MOV.L @($%xh), R%d ; <- #%08x", disp + (pc&0xFFFFFFFC)+4, Rn, ext_address_space[tmp>>12]->read_long(tmp) );
171 :}
172 MOV.L @(disp, Rm), Rn {: snprintf( buf, len, "MOV.L @(%d, R%d), R%d", disp, Rm, Rn ); :}
173 MOV.W Rm, @Rn {: snprintf( buf, len, "MOV.W R%d, @R%d", Rm, Rn ); :}
174 MOV.W Rm, @-Rn {: snprintf( buf, len, "MOV.W R%d, @-R%d", Rm, Rn ); :}
175 MOV.W Rm, @(R0, Rn) {: snprintf( buf, len, "MOV.W R%d, @(R0, R%d)", Rm, Rn ); :}
176 MOV.W R0, @(disp, GBR) {: snprintf( buf, len, "MOV.W R0, @(%d, GBR)", disp); :}
177 MOV.W R0, @(disp, Rn) {: snprintf( buf, len, "MOV.W R0, @(%d, R%d)", disp, Rn ); :}
178 MOV.W @Rm, Rn {: snprintf( buf, len, "MOV.W @R%d, R%d", Rm, Rn ); :}
179 MOV.W @Rm+, Rn {: snprintf( buf, len, "MOV.W @R%d+, R%d", Rm, Rn ); :}
180 MOV.W @(R0, Rm), Rn {: snprintf( buf, len, "MOV.W @(R0, R%d), R%d", Rm, Rn ); :}
181 MOV.W @(disp, GBR), R0 {: snprintf( buf, len, "MOV.W @(%d, GBR), R0", disp ); :}
182 MOV.W @(disp, PC), Rn {:
183 tmp = mmu_vma_to_phys_disasm(disp+pc+4);
184 snprintf( buf, len, "MOV.W @($%xh), R%d ; <- #%08x", disp+pc+4, Rn, ext_address_space[tmp>>12]->read_word(tmp) );
185 :}
186 MOV.W @(disp, Rm), R0 {: snprintf( buf, len, "MOV.W @(%d, R%d), R0", disp, Rm ); :}
187 MOVA @(disp, PC), R0 {: snprintf( buf, len, "MOVA @($%xh), R0", disp + (pc&0xFFFFFFFC) + 4 ); :}
188 MOVCA.L R0, @Rn {: snprintf( buf, len, "MOVCA.L R0, @R%d", Rn ); :}
189 MOVT Rn {: snprintf( buf, len, "MOVT R%d", Rn ); :}
190 MUL.L Rm, Rn {: snprintf( buf, len, "MUL.L R%d, R%d", Rm, Rn ); :}
191 MULS.W Rm, Rn {: snprintf( buf, len, "MULS.W R%d, R%d", Rm, Rn ); :}
192 MULU.W Rm, Rn {: snprintf( buf, len, "MULU.W R%d, R%d", Rm, Rn ); :}
193 NEG Rm, Rn {: snprintf( buf, len, "NEG R%d, R%d", Rm, Rn ); :}
194 NEGC Rm, Rn {: snprintf( buf, len, "NEGC R%d, R%d", Rm, Rn ); :}
195 NOP {: snprintf( buf, len, "NOP " ); :}
196 NOT Rm, Rn {: snprintf( buf, len, "NOT R%d, R%d", Rm, Rn ); :}
197 OCBI @Rn {: snprintf( buf, len, "OCBI @R%d", Rn ); :}
198 OCBP @Rn {: snprintf( buf, len, "OCBP @R%d", Rn ); :}
199 OCBWB @Rn {: snprintf( buf, len, "OCBWB @R%d", Rn ); :}
200 OR Rm, Rn {: snprintf( buf, len, "OR R%d, R%d", Rm, Rn ); :}
201 OR #imm, R0 {: snprintf( buf, len, "OR #%d, R0", imm ); :}
202 OR.B #imm, @(R0, GBR) {: snprintf( buf, len, "OR.B #%d, @(R0, GBR)", imm ); :}
203 PREF @Rn {: snprintf( buf, len, "PREF R%d", Rn ); :}
204 ROTCL Rn {: snprintf( buf, len, "ROTCL R%d", Rn ); :}
205 ROTCR Rn {: snprintf( buf, len, "ROTCR R%d", Rn ); :}
206 ROTL Rn {: snprintf( buf, len, "ROTL R%d", Rn ); :}
207 ROTR Rn {: snprintf( buf, len, "ROTR R%d", Rn ); :}
208 RTE {: snprintf( buf, len, "RTE " ); :}
209 RTS {: snprintf( buf, len, "RTS " ); :}
210 SETS {: snprintf( buf, len, "SETS " ); :}
211 SETT {: snprintf( buf, len, "SETT " ); :}
212 SHAD Rm, Rn {: snprintf( buf, len, "SHAD R%d, R%d", Rm, Rn ); :}
213 SHAL Rn {: snprintf( buf, len, "SHAL R%d", Rn ); :}
214 SHAR Rn {: snprintf( buf, len, "SHAR R%d", Rn ); :}
215 SHLD Rm, Rn {: snprintf( buf, len, "SHLD R%d, R%d", Rm, Rn ); :}
216 SHLL Rn {: snprintf( buf, len, "SHLL R%d", Rn ); :}
217 SHLL2 Rn {: snprintf( buf, len, "SHLL2 R%d", Rn ); :}
218 SHLL8 Rn {: snprintf( buf, len, "SHLL8 R%d", Rn ); :}
219 SHLL16 Rn {: snprintf( buf, len, "SHLL16 R%d", Rn ); :}
220 SHLR Rn {: snprintf( buf, len, "SHLR R%d", Rn ); :}
221 SHLR2 Rn {: snprintf( buf, len, "SHLR2 R%d", Rn ); :}
222 SHLR8 Rn {: snprintf( buf, len, "SHLR8 R%d", Rn ); :}
223 SHLR16 Rn {: snprintf( buf, len, "SHLR16 R%d", Rn ); :}
224 SLEEP {: snprintf( buf, len, "SLEEP " ); :}
225 STC SR, Rn {: snprintf( buf, len, "STC SR, R%d", Rn ); :}
226 STC GBR, Rn {: snprintf( buf, len, "STC GBR, R%d", Rn ); :}
227 STC VBR, Rn {: snprintf( buf, len, "STC VBR, R%d", Rn ); :}
228 STC SSR, Rn {: snprintf( buf, len, "STC SSR, R%d", Rn ); :}
229 STC SPC, Rn {: snprintf( buf, len, "STC SPC, R%d", Rn ); :}
230 STC SGR, Rn {: snprintf( buf, len, "STC SGR, R%d", Rn ); :}
231 STC DBR, Rn {: snprintf( buf, len, "STC DBR, R%d", Rn ); :}
232 STC Rm_BANK, Rn {: snprintf( buf, len, "STC R%d_BANK, R%d", Rm_BANK, Rn ); :}
233 STS FPSCR, Rn {: snprintf( buf, len, "STS FPSCR, R%d", Rn ); :}
234 STS FPUL, Rn {: snprintf( buf, len, "STS FPUL, R%d", Rn ); :}
235 STS MACH, Rn {: snprintf( buf, len, "STS MACH, R%d", Rn ); :}
236 STS MACL, Rn {: snprintf( buf, len, "STS MACL, R%d", Rn ); :}
237 STS PR, Rn {: snprintf( buf, len, "STS PR, R%d", Rn ); :}
238 STC.L SR, @-Rn {: snprintf( buf, len, "STC.L SR, @-R%d", Rn ); :}
239 STC.L GBR, @-Rn {: snprintf( buf, len, "STC.L GBR, @-R%d", Rn ); :}
240 STC.L VBR, @-Rn {: snprintf( buf, len, "STC.L VBR, @-R%d", Rn ); :}
241 STC.L SSR, @-Rn {: snprintf( buf, len, "STC.L SSR, @-R%d", Rn ); :}
242 STC.L SPC, @-Rn {: snprintf( buf, len, "STC.L SPC, @-R%d", Rn ); :}
243 STC.L SGR, @-Rn {: snprintf( buf, len, "STC.L SGR, @-R%d", Rn ); :}
244 STC.L DBR, @-Rn {: snprintf( buf, len, "STC.L DBR, @-R%d", Rn ); :}
245 STC.L Rm_BANK, @-Rn {: snprintf( buf, len, "STC.L @-R%d_BANK, @-R%d", Rm_BANK, Rn ); :}
246 STS.L FPSCR, @-Rn{: snprintf( buf, len, "STS.L FPSCR, @-R%d", Rn ); :}
247 STS.L FPUL, @-Rn {: snprintf( buf, len, "STS.L FPUL, @-R%d", Rn ); :}
248 STS.L MACH, @-Rn {: snprintf( buf, len, "STS.L MACH, @-R%d", Rn ); :}
249 STS.L MACL, @-Rn {: snprintf( buf, len, "STS.L MACL, @-R%d", Rn ); :}
250 STS.L PR, @-Rn {: snprintf( buf, len, "STS.L PR, @-R%d", Rn ); :}
251 SUB Rm, Rn {: snprintf( buf, len, "SUB R%d, R%d", Rm, Rn ); :}
252 SUBC Rm, Rn {: snprintf( buf, len, "SUBC R%d, R%d", Rm, Rn ); :}
253 SUBV Rm, Rn {: snprintf( buf, len, "SUBV R%d, R%d", Rm, Rn ); :}
254 SWAP.B Rm, Rn {: snprintf( buf, len, "SWAP.B R%d, R%d", Rm, Rn ); :}
255 SWAP.W Rm, Rn {: snprintf( buf, len, "SWAP.W R%d, R%d", Rm, Rn ); :}
256 TAS.B @Rn {: snprintf( buf, len, "TAS.B R%d", Rn ); :}
257 TRAPA #imm {: snprintf( buf, len, "TRAPA #%d", imm ); :}
258 TST Rm, Rn {: snprintf( buf, len, "TST R%d, R%d", Rm, Rn ); :}
259 TST #imm, R0 {: snprintf( buf, len, "TST #%d, R0", imm ); :}
260 TST.B #imm, @(R0, GBR) {: snprintf( buf, len, "TST.B #%d, @(R0, GBR)", imm ); :}
261 XOR Rm, Rn {: snprintf( buf, len, "XOR R%d, R%d", Rm, Rn ); :}
262 XOR #imm, R0 {: snprintf( buf, len, "XOR #%d, R0", imm ); :}
263 XOR.B #imm, @(R0, GBR) {: snprintf( buf, len, "XOR.B #%d, @(R0, GBR)", imm ); :}
264 XTRCT Rm, Rn {: snprintf( buf, len, "XTRCT R%d, R%d", Rm, Rn ); :}
265 UNDEF {: snprintf( buf, len, "UNDEF " ); :}
266 %%
267 return pc+2;
268 }
271 void sh4_disasm_region( FILE *f, int from, int to )
272 {
273 int pc;
274 char buf[80];
275 char opcode[16];
277 for( pc = from; pc < to; pc+=2 ) {
278 buf[0] = '\0';
279 sh4_disasm_instruction( pc,
280 buf, sizeof(buf), opcode );
281 fprintf( f, " %08x: %s %s\n", pc, opcode, buf );
282 }
283 }
285 void sh4_dump_region( int from, int to )
286 {
287 sh4_disasm_region( stdout, from, to );
288 }
.