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lxdream.org :: lxdream/src/sh4/ia64abi.h
lxdream 0.9.1
released Jun 29
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filename src/sh4/ia64abi.h
changeset 596:dfc0c93d882e
prev590:4db6a084ca3c
next599:2a73a1a53032
author nkeynes
date Mon Jan 21 11:59:46 2008 +0000 (12 years ago)
permissions -rw-r--r--
last change Fix MAC.L/MAC.W stack issues
Fix various recovery-table issues
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     1 /**
     2  * $Id$
     3  * 
     4  * Provides the implementation for the ia32 ABI (eg prologue, epilogue, and
     5  * calling conventions)
     6  *
     7  * Copyright (c) 2007 Nathan Keynes.
     8  *
     9  * This program is free software; you can redistribute it and/or modify
    10  * it under the terms of the GNU General Public License as published by
    11  * the Free Software Foundation; either version 2 of the License, or
    12  * (at your option) any later version.
    13  *
    14  * This program is distributed in the hope that it will be useful,
    15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    17  * GNU General Public License for more details.
    18  */
    20 #ifndef __lxdream_x86_64abi_H
    21 #define __lxdream_x86_64abi_H 1
    23 #include <unwind.h>
    25 #define load_ptr( reg, ptr ) load_imm64( reg, (uint64_t)ptr );
    27 /**
    28  * Note: clobbers EAX to make the indirect call - this isn't usually
    29  * a problem since the callee will usually clobber it anyway.
    30  * Size: 12 bytes
    31  */
    32 #define CALL_FUNC0_SIZE 12
    33 static inline void call_func0( void *ptr )
    34 {
    35     load_imm64(R_EAX, (uint64_t)ptr);
    36     CALL_r32(R_EAX);
    37 }
    39 #define CALL_FUNC1_SIZE 14
    40 static inline void call_func1( void *ptr, int arg1 )
    41 {
    42     MOV_r32_r32(arg1, R_EDI);
    43     call_func0(ptr);
    44 }
    46 #define CALL_FUNC2_SIZE 16
    47 static inline void call_func2( void *ptr, int arg1, int arg2 )
    48 {
    49     MOV_r32_r32(arg1, R_EDI);
    50     MOV_r32_r32(arg2, R_ESI);
    51     call_func0(ptr);
    52 }
    54 #define MEM_WRITE_DOUBLE_SIZE 35
    55 /**
    56  * Write a double (64-bit) value into memory, with the first word in arg2a, and
    57  * the second in arg2b
    58  */
    59 static inline void MEM_WRITE_DOUBLE( int addr, int arg2a, int arg2b )
    60 {
    61     PUSH_r32(arg2b);
    62     PUSH_r32(addr);
    63     call_func2(sh4_write_long, addr, arg2a);
    64     POP_r32(R_EDI);
    65     POP_r32(R_ESI);
    66     ADD_imm8s_r32(4, R_EDI);
    67     call_func0(sh4_write_long);
    68 }
    70 #define MEM_READ_DOUBLE_SIZE 43
    71 /**
    72  * Read a double (64-bit) value from memory, writing the first word into arg2a
    73  * and the second into arg2b. The addr must not be in EAX
    74  */
    75 static inline void MEM_READ_DOUBLE( int addr, int arg2a, int arg2b )
    76 {
    77     REXW(); SUB_imm8s_r32( 8, R_ESP );
    78     PUSH_r32(addr);
    79     call_func1(sh4_read_long, addr);
    80     POP_r32(R_EDI);
    81     PUSH_r32(R_EAX);
    82     ADD_imm8s_r32(4, R_EDI);
    83     call_func0(sh4_read_long);
    84     MOV_r32_r32(R_EAX, arg2b);
    85     POP_r32(arg2a);
    86     REXW(); ADD_imm8s_r32( 8, R_ESP );
    87 }
    90 /**
    91  * Emit the 'start of block' assembly. Sets up the stack frame and save
    92  * SI/DI as required
    93  */
    94 void sh4_translate_begin_block( sh4addr_t pc ) 
    95 {
    96     PUSH_r32(R_EBP);
    97     /* mov &sh4r, ebp */
    98     load_ptr( R_EBP, &sh4r );
   100     sh4_x86.in_delay_slot = FALSE;
   101     sh4_x86.priv_checked = FALSE;
   102     sh4_x86.fpuen_checked = FALSE;
   103     sh4_x86.branch_taken = FALSE;
   104     sh4_x86.backpatch_posn = 0;
   105     sh4_x86.recovery_posn = 0;
   106     sh4_x86.block_start_pc = pc;
   107     sh4_x86.tlb_on = IS_MMU_ENABLED();
   108     sh4_x86.tstate = TSTATE_NONE;
   109 }
   111 /**
   112  * Exit the block with sh4r.pc already written
   113  */
   114 void exit_block_pcset( sh4addr_t pc )
   115 {
   116     load_imm32( R_ECX, ((pc - sh4_x86.block_start_pc)>>1)*sh4_cpu_period ); // 5
   117     ADD_r32_sh4r( R_ECX, REG_OFFSET(slice_cycle) );    // 6
   118     load_spreg( R_EAX, R_PC );
   119     if( sh4_x86.tlb_on ) {
   120 	call_func1(xlat_get_code_by_vma,R_EAX);
   121     } else {
   122 	call_func1(xlat_get_code,R_EAX);
   123     }
   124     POP_r32(R_EBP);
   125     RET();
   126 }
   128 /**
   129  * Exit the block with sh4r.new_pc written with the target address
   130  */
   131 void exit_block_newpcset( sh4addr_t pc )
   132 {
   133     load_imm32( R_ECX, ((pc - sh4_x86.block_start_pc)>>1)*sh4_cpu_period ); // 5
   134     ADD_r32_sh4r( R_ECX, REG_OFFSET(slice_cycle) );    // 6
   135     load_spreg( R_EAX, R_NEW_PC );
   136     store_spreg( R_EAX, R_PC );
   137     if( sh4_x86.tlb_on ) {
   138 	call_func1(xlat_get_code_by_vma,R_EAX);
   139     } else {
   140 	call_func1(xlat_get_code,R_EAX);
   141     }
   142     POP_r32(R_EBP);
   143     RET();
   144 }
   146 #define EXIT_BLOCK_SIZE(pc) (25 + (IS_IN_ICACHE(pc)?10:CALL_FUNC1_SIZE))
   147 /**
   148  * Exit the block to an absolute PC
   149  */
   150 void exit_block( sh4addr_t pc, sh4addr_t endpc )
   151 {
   152     load_imm32( R_ECX, pc );                            // 5
   153     store_spreg( R_ECX, REG_OFFSET(pc) );               // 3
   154     if( IS_IN_ICACHE(pc) ) {
   155 	REXW(); MOV_moff32_EAX( xlat_get_lut_entry(pc) );
   156     } else if( sh4_x86.tlb_on ) {
   157 	call_func1(xlat_get_code_by_vma, R_ECX);
   158     } else {
   159 	call_func1(xlat_get_code,R_ECX);
   160     }
   161     REXW(); AND_imm8s_r32( 0xFC, R_EAX ); // 4
   162     load_imm32( R_ECX, ((endpc - sh4_x86.block_start_pc)>>1)*sh4_cpu_period ); // 5
   163     ADD_r32_sh4r( R_ECX, REG_OFFSET(slice_cycle) );     // 6
   164     POP_r32(R_EBP);
   165     RET();
   166 }
   169 #define EXIT_BLOCK_REL_SIZE(pc)  (28 + (IS_IN_ICACHE(pc)?10:CALL_FUNC1_SIZE))
   171 /**
   172  * Exit the block to a relative PC
   173  */
   174 void exit_block_rel( sh4addr_t pc, sh4addr_t endpc )
   175 {
   176     load_imm32( R_ECX, pc - sh4_x86.block_start_pc );   // 5
   177     ADD_sh4r_r32( R_PC, R_ECX );
   178     store_spreg( R_ECX, REG_OFFSET(pc) );               // 3
   179     if( IS_IN_ICACHE(pc) ) {
   180 	REXW(); MOV_moff32_EAX( xlat_get_lut_entry(GET_ICACHE_PHYS(pc)) ); // 5
   181     } else if( sh4_x86.tlb_on ) {
   182 	call_func1(xlat_get_code_by_vma,R_ECX);
   183     } else {
   184 	call_func1(xlat_get_code,R_ECX);
   185     }
   186     REXW(); AND_imm8s_r32( 0xFC, R_EAX ); // 4
   187     load_imm32( R_ECX, ((endpc - sh4_x86.block_start_pc)>>1)*sh4_cpu_period ); // 5
   188     ADD_r32_sh4r( R_ECX, REG_OFFSET(slice_cycle) );     // 6
   189     POP_r32(R_EBP);
   190     RET();
   191 }
   193 /**
   194  * Write the block trailer (exception handling block)
   195  */
   196 void sh4_translate_end_block( sh4addr_t pc ) {
   197     if( sh4_x86.branch_taken == FALSE ) {
   198 	// Didn't exit unconditionally already, so write the termination here
   199 	exit_block_rel( pc, pc );
   200     }
   201     if( sh4_x86.backpatch_posn != 0 ) {
   202 	unsigned int i;
   203 	// Raise exception
   204 	uint8_t *end_ptr = xlat_output;
   205 	MOV_r32_r32( R_EDX, R_ECX );
   206 	ADD_r32_r32( R_EDX, R_ECX );
   207 	ADD_r32_sh4r( R_ECX, R_PC );
   208 	MOV_moff32_EAX( &sh4_cpu_period );
   209 	MUL_r32( R_EDX );
   210 	ADD_r32_sh4r( R_EAX, REG_OFFSET(slice_cycle) );
   212 	call_func0( sh4_raise_exception );
   213 	load_spreg( R_EAX, R_PC );
   214 	if( sh4_x86.tlb_on ) {
   215 	    call_func1(xlat_get_code_by_vma,R_EAX);
   216 	} else {
   217 	    call_func1(xlat_get_code,R_EAX);
   218 	}
   219 	POP_r32(R_EBP);
   220 	RET();
   222 	// Exception already raised - just cleanup
   223 	uint8_t *preexc_ptr = xlat_output;
   224 	MOV_r32_r32( R_EDX, R_ECX );
   225 	ADD_r32_r32( R_EDX, R_ECX );
   226 	ADD_r32_sh4r( R_ECX, R_SPC );
   227 	MOV_moff32_EAX( &sh4_cpu_period );
   228 	MUL_r32( R_EDX );
   229 	ADD_r32_sh4r( R_EAX, REG_OFFSET(slice_cycle) );
   230 	load_spreg( R_EDI, R_PC );
   231 	if( sh4_x86.tlb_on ) {
   232 	    call_func0(xlat_get_code_by_vma);
   233 	} else {
   234 	    call_func0(xlat_get_code);
   235 	}
   236 	POP_r32(R_EBP);
   237 	RET();
   239 	for( i=0; i< sh4_x86.backpatch_posn; i++ ) {
   240 	    *sh4_x86.backpatch_list[i].fixup_addr =
   241 		xlat_output - ((uint8_t *)sh4_x86.backpatch_list[i].fixup_addr) - 4;
   242 	    if( sh4_x86.backpatch_list[i].exc_code < 0 ) {
   243 		load_imm32( R_EDX, sh4_x86.backpatch_list[i].fixup_icount );
   244 		int stack_adj = -1 - sh4_x86.backpatch_list[i].exc_code;
   245 		if( stack_adj > 0 ) { 
   246 		    ADD_imm8s_r32( stack_adj, R_ESP );
   247 		}
   248 		int rel = preexc_ptr - xlat_output;
   249 		JMP_rel(rel);
   250 	    } else {
   251 		load_imm32( R_EDI, sh4_x86.backpatch_list[i].exc_code );
   252 		load_imm32( R_EDX, sh4_x86.backpatch_list[i].fixup_icount );
   253 		int rel = end_ptr - xlat_output;
   254 		JMP_rel(rel);
   255 	    }
   256 	}
   257     }
   258 }
   260 _Unwind_Reason_Code xlat_check_frame( struct _Unwind_Context *context, void *arg )
   261 {
   262     void *rbp = (void *)_Unwind_GetGR(context, 6);
   263     if( rbp == (void *)&sh4r ) { 
   264         void **result = (void **)arg;
   265         *result = (void *)_Unwind_GetIP(context);
   266         return _URC_NORMAL_STOP;
   267     }
   269     return _URC_NO_REASON;
   270 }
   272 void *xlat_get_native_pc()
   273 {
   274     struct _Unwind_Exception exc;
   276     void *result = NULL;
   277     _Unwind_Backtrace( xlat_check_frame, &result );
   278     return result;
   279 }
   281 #endif
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