lxdream 0.9.1| filename | test/timer.c |
| changeset | 262:bc96e0b79308 |
| prev | 225:e5cea6125580 |
| next | 272:fb6be85235e8 |
| author | nkeynes |
| date | Thu Jan 11 06:50:11 2007 +0000 (17 years ago) |
| permissions | -rw-r--r-- |
| last change | Double hsync width (as per hw) Add temporary debug statements on the YUV registers Fix sync status on the back porch |
| view | annotate | diff | log | raw |
1 #include "../lib.h"
2 #define TMU_CHANNEL 2
3 #define BASE_TICKS_PER_US 200
4 #define CLOCK_DIVIDER 16
5 #define TOCR 0xFFD80000 /* Output control register */
6 #define TSTR 0xFFD80004 /* Start register */
7 #define TCOR(c) (0xFFD80008 + (c*12)) /* Constant register */
8 #define TCNT(c) (0xFFD8000C + (c*12)) /* Count register */
9 #define TCR(c) (0xFFD80010 + (c*12)) /* Control register */
11 /**
12 * Initialize the on-chip timer controller. We snag TMU channel 2 in its
13 * highest resolution mode, and start it counting down from max_int.
14 */
15 void timer_start() {
16 unsigned int val = byte_read(TSTR);
17 byte_write( TSTR, val & (~(1<<TMU_CHANNEL)) ); /* Stop counter */
18 long_write( TCOR(TMU_CHANNEL), 0xFFFFFFFF );
19 long_write( TCNT(TMU_CHANNEL), 0xFFFFFFFF );
20 word_write( TCR(TMU_CHANNEL), 0x00000000 );
21 byte_write( TSTR, val | (1<<TMU_CHANNEL) );
22 }
24 /**
25 * Report the current value of TMU2.
26 */
27 unsigned int timer_gettime() {
28 return long_read(TCNT(TMU_CHANNEL));
29 }
31 /**
32 * Stop TMU2 and report the current value.
33 */
34 unsigned int timer_stop() {
35 long_write( TSTR, long_read(TSTR) & (~(1<<TMU_CHANNEL)) );
36 return long_read( TCNT(TMU_CHANNEL) );
37 }
40 /**
41 * Convert the supplied timer value to a number of micro seconds since the timer
42 * was started.
43 */
44 unsigned int timer_to_microsecs( unsigned int value ) {
45 return (0xFFFFFFFF - value) * CLOCK_DIVIDER / BASE_TICKS_PER_US;
46 }
48 unsigned int timer_gettime_us() {
49 return timer_to_microsecs( timer_gettime() );
50 }
.