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lxdream.org :: lxdream/src/pvr2/pvr2.c
lxdream 0.9.1
released Jun 29
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filename src/pvr2/pvr2.c
changeset 107:e576dd36073a
prev106:9048bac046c3
next108:565de331ccec
author nkeynes
date Tue Mar 14 13:02:06 2006 +0000 (14 years ago)
permissions -rw-r--r--
last change Make sure subfunctions are initted
Fix stupid sign bug in texcache
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     1 /**
     2  * $Id: pvr2.c,v 1.19 2006-03-14 13:02:06 nkeynes Exp $
     3  *
     4  * PVR2 (Video) Core MMIO registers.
     5  *
     6  * Copyright (c) 2005 Nathan Keynes.
     7  *
     8  * This program is free software; you can redistribute it and/or modify
     9  * it under the terms of the GNU General Public License as published by
    10  * the Free Software Foundation; either version 2 of the License, or
    11  * (at your option) any later version.
    12  *
    13  * This program is distributed in the hope that it will be useful,
    14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    16  * GNU General Public License for more details.
    17  */
    18 #define MODULE pvr2_module
    20 #include "dream.h"
    21 #include "video.h"
    22 #include "mem.h"
    23 #include "asic.h"
    24 #include "pvr2/pvr2.h"
    25 #include "sh4/sh4core.h"
    26 #define MMIO_IMPL
    27 #include "pvr2/pvr2mmio.h"
    29 char *video_base;
    31 void pvr2_init( void );
    32 uint32_t pvr2_run_slice( uint32_t );
    33 void pvr2_display_frame( void );
    35 /**
    36  * Current PVR2 ram address of the data (if any) currently held in the 
    37  * OpenGL buffers.
    38  */
    40 video_driver_t video_driver = NULL;
    41 struct video_buffer video_buffer[2];
    42 int video_buffer_idx = 0;
    44 struct video_timing {
    45     int fields_per_second;
    46     int total_lines;
    47     int display_lines;
    48     int line_time_ns;
    49 };
    51 struct video_timing pal_timing = { 50, 625, 575, 32000 };
    52 struct video_timing ntsc_timing= { 60, 525, 480, 31746 };
    54 struct dreamcast_module pvr2_module = { "PVR2", pvr2_init, NULL, NULL, 
    55 					pvr2_run_slice, NULL,
    56 					NULL, NULL };
    58 void pvr2_init( void )
    59 {
    60     register_io_region( &mmio_region_PVR2 );
    61     register_io_region( &mmio_region_PVR2PAL );
    62     register_io_region( &mmio_region_PVR2TA );
    63     video_base = mem_get_region_by_name( MEM_REGION_VIDEO );
    64     pvr2_render_init();
    65     texcache_init();
    66 }
    68 void video_set_driver( video_driver_t driver )
    69 {
    70     if( video_driver != NULL && video_driver->shutdown_driver != NULL )
    71 	video_driver->shutdown_driver();
    73     video_driver = driver;
    74     if( driver->init_driver != NULL )
    75 	driver->init_driver();
    76     driver->set_display_format( 640, 480, COLFMT_RGB32 );
    77 }
    79 uint32_t pvr2_line_count = 0;
    80 uint32_t pvr2_line_remainder = 0;
    81 uint32_t pvr2_irq_vpos1 = 0;
    82 uint32_t pvr2_irq_vpos2 = 0;
    83 struct video_timing *pvr2_timing = &ntsc_timing;
    84 uint32_t pvr2_time_counter = 0;
    85 uint32_t pvr2_frame_counter = 0;
    86 uint32_t pvr2_time_per_frame = 20000000;
    88 uint32_t pvr2_run_slice( uint32_t nanosecs ) 
    89 {
    90     pvr2_line_remainder += nanosecs;
    91     while( pvr2_line_remainder >= pvr2_timing->line_time_ns ) {
    92 	pvr2_line_remainder -= pvr2_timing->line_time_ns;
    93 	pvr2_line_count++;
    94 	if( pvr2_line_count == pvr2_irq_vpos1 ) {
    95 	    asic_event( EVENT_SCANLINE1 );
    96 	} 
    97 	if( pvr2_line_count == pvr2_irq_vpos2 ) {
    98 	    asic_event( EVENT_SCANLINE2 );
    99 	}
   100 	if( pvr2_line_count == pvr2_timing->display_lines ) {
   101 	    asic_event( EVENT_RETRACE );
   102 	} else if( pvr2_line_count == pvr2_timing->total_lines ) {
   103 	    pvr2_display_frame();
   104 	    pvr2_line_count = 0;
   105 	}
   106     }
   107     return nanosecs;
   108 }
   110 uint32_t vid_stride, vid_lpf, vid_ppl, vid_hres, vid_vres, vid_col;
   111 int interlaced, bChanged = 1, bEnabled = 0, vid_size = 0;
   112 char *frame_start; /* current video start address (in real memory) */
   114 /**
   115  * Display the next frame, copying the current contents of video ram to
   116  * the window. If the video configuration has changed, first recompute the
   117  * new frame size/depth.
   118  */
   119 void pvr2_display_frame( void )
   120 {
   121     uint32_t display_addr = MMIO_READ( PVR2, DISPADDR1 );
   123     int dispsize = MMIO_READ( PVR2, DISPSIZE );
   124     int dispmode = MMIO_READ( PVR2, DISPMODE );
   125     int vidcfg = MMIO_READ( PVR2, DISPCFG );
   126     int vid_stride = ((dispsize & DISPSIZE_MODULO) >> 20) - 1;
   127     int vid_lpf = ((dispsize & DISPSIZE_LPF) >> 10) + 1;
   128     int vid_ppl = ((dispsize & DISPSIZE_PPL)) + 1;
   129     gboolean bEnabled = (dispmode & DISPMODE_DE) && (vidcfg & DISPCFG_VO ) ? TRUE : FALSE;
   130     gboolean interlaced = (vidcfg & DISPCFG_I ? TRUE : FALSE);
   131     if( bEnabled ) {
   132 	video_buffer_t buffer = &video_buffer[video_buffer_idx];
   133 	video_buffer_idx = !video_buffer_idx;
   134 	video_buffer_t last = &video_buffer[video_buffer_idx];
   135 	buffer->rowstride = (vid_ppl + vid_stride) << 2;
   136 	buffer->data = frame_start = video_base + MMIO_READ( PVR2, DISPADDR1 );
   137 	buffer->vres = vid_lpf;
   138 	if( interlaced ) buffer->vres <<= 1;
   139 	switch( (dispmode & DISPMODE_COL) >> 2 ) {
   140 	case 0: 
   141 	    buffer->colour_format = COLFMT_ARGB1555;
   142 	    buffer->hres = vid_ppl << 1; 
   143 	    break;
   144 	case 1: 
   145 	    buffer->colour_format = COLFMT_RGB565;
   146 	    buffer->hres = vid_ppl << 1; 
   147 	    break;
   148 	case 2:
   149 	    buffer->colour_format = COLFMT_RGB888;
   150 	    buffer->hres = (vid_ppl << 2) / 3; 
   151 	    break;
   152 	case 3: 
   153 	    buffer->colour_format = COLFMT_ARGB8888;
   154 	    buffer->hres = vid_ppl; 
   155 	    break;
   156 	}
   158 	if( video_driver != NULL ) {
   159 	    if( buffer->hres != last->hres ||
   160 		buffer->vres != last->vres ||
   161 		buffer->colour_format != last->colour_format) {
   162 		video_driver->set_display_format( buffer->hres, buffer->vres,
   163 						  buffer->colour_format );
   164 	    }
   165 	    if( MMIO_READ( PVR2, DISPCFG2 ) & 0x08 ) { /* Blanked */
   166 		uint32_t colour = MMIO_READ( PVR2, DISPBORDER );
   167 		video_driver->display_blank_frame( colour );
   168 	    } else if( !pvr2_render_display_frame( PVR2_RAM_BASE + display_addr ) ) {
   169 		video_driver->display_frame( buffer );
   170 	    }
   171 	}
   172     } else {
   173 	video_buffer_idx = 0;
   174 	video_buffer[0].hres = video_buffer[0].vres = 0;
   175     }
   176     pvr2_frame_counter++;
   177     asic_event( EVENT_SCANLINE1 );
   178     asic_event( EVENT_SCANLINE2 );
   179     asic_event( EVENT_RETRACE );
   180 }
   182 void mmio_region_PVR2_write( uint32_t reg, uint32_t val )
   183 {
   184     if( reg >= 0x200 && reg < 0x600 ) { /* Fog table */
   185         MMIO_WRITE( PVR2, reg, val );
   186         /* I don't want to hear about these */
   187         return;
   188     }
   190     INFO( "PVR2 write to %08X <= %08X [%s: %s]", reg, val, 
   191           MMIO_REGID(PVR2,reg), MMIO_REGDESC(PVR2,reg) );
   193     switch(reg) {
   194     case VPOS_IRQ:
   195 	pvr2_irq_vpos1 = (val >> 16) & 0x03FF;
   196 	pvr2_irq_vpos2 = val & 0x03FF;
   197 	break;
   198     case TAINIT:
   199 	if( val & 0x80000000 )
   200 	    pvr2_ta_init();
   201 	break;
   202     case RENDSTART:
   203 	if( val == 0xFFFFFFFF )
   204 	    pvr2_render_scene();
   205 	break;
   206     }
   207     MMIO_WRITE( PVR2, reg, val );
   208 }
   210 MMIO_REGION_READ_FN( PVR2, reg )
   211 {
   212     switch( reg ) {
   213         case BEAMPOS:
   214             return sh4r.icount&0x20 ? 0x2000 : 1;
   215         default:
   216             return MMIO_READ( PVR2, reg );
   217     }
   218 }
   220 MMIO_REGION_DEFFNS( PVR2PAL )
   222 void pvr2_set_base_address( uint32_t base ) 
   223 {
   224     mmio_region_PVR2_write( DISPADDR1, base );
   225 }
   230 int32_t mmio_region_PVR2TA_read( uint32_t reg )
   231 {
   232     return 0xFFFFFFFF;
   233 }
   235 void mmio_region_PVR2TA_write( uint32_t reg, uint32_t val )
   236 {
   237     pvr2_ta_write( &val, sizeof(uint32_t) );
   238 }
   241 void pvr2_vram64_write( sh4addr_t destaddr, char *src, uint32_t length )
   242 {
   243     int bank_flag = (destaddr & 0x04) >> 2;
   244     uint32_t *banks[2];
   245     uint32_t *dwsrc;
   246     int i;
   248     destaddr = destaddr & 0x7FFFFF;
   249     if( destaddr + length > 0x800000 ) {
   250 	length = 0x800000 - destaddr;
   251     }
   253     for( i=destaddr & 0xFFFFF000; i < destaddr + length; i+= PAGE_SIZE ) {
   254 	texcache_invalidate_page( i );
   255     }
   257     banks[0] = ((uint32_t *)(video_base + (destaddr>>3)));
   258     banks[1] = banks[0] + 0x100000;
   260     /* Handle non-aligned start of source */
   261     if( destaddr & 0x03 ) {
   262 	char *dest = ((char *)banks[bank_flag]) + (destaddr & 0x03);
   263 	for( i= destaddr & 0x03; i < 4 && length > 0; i++, length-- ) {
   264 	    *dest++ = *src++;
   265 	}
   266 	bank_flag = !bank_flag;
   267     }
   269     dwsrc = (uint32_t *)src;
   270     while( length >= 4 ) {
   271 	*banks[bank_flag]++ = *dwsrc++;
   272 	bank_flag = !bank_flag;
   273 	length -= 4;
   274     }
   276     /* Handle non-aligned end of source */
   277     if( length ) {
   278 	src = (char *)dwsrc;
   279 	char *dest = (char *)banks[bank_flag];
   280 	while( length-- > 0 ) {
   281 	    *dest++ = *src++;
   282 	}
   283     }  
   285 }
   287 void pvr2_vram64_read( char *dest, sh4addr_t srcaddr, uint32_t length )
   288 {
   289     int bank_flag = (srcaddr & 0x04) >> 2;
   290     uint32_t *banks[2];
   291     uint32_t *dwdest;
   292     int i;
   294     srcaddr = srcaddr & 0x7FFFFF;
   295     if( srcaddr + length > 0x800000 )
   296 	length = 0x800000 - srcaddr;
   298     banks[0] = ((uint32_t *)(video_base + (srcaddr>>3)));
   299     banks[1] = banks[0] + 0x100000;
   301     /* Handle non-aligned start of source */
   302     if( srcaddr & 0x03 ) {
   303 	char *src = ((char *)banks[bank_flag]) + (srcaddr & 0x03);
   304 	for( i= srcaddr & 0x03; i < 4 && length > 0; i++, length-- ) {
   305 	    *dest++ = *src++;
   306 	}
   307 	bank_flag = !bank_flag;
   308     }
   310     dwdest = (uint32_t *)dest;
   311     while( length >= 4 ) {
   312 	*dwdest++ = *banks[bank_flag]++;
   313 	bank_flag = !bank_flag;
   314 	length -= 4;
   315     }
   317     /* Handle non-aligned end of source */
   318     if( length ) {
   319 	dest = (char *)dwdest;
   320 	char *src = (char *)banks[bank_flag];
   321 	while( length-- > 0 ) {
   322 	    *dest++ = *src++;
   323 	}
   324     }
   325 }
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