lxdream.org :: lxdream/src/aica/aica.h r561:533f6b478071

tree revision 759:f16975739abc

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     1 /**

     2  * $Id$

     3  *

     4  * MMIO definitions for the AICA sound chip. Note that the regions defined

     5  * here are relative to the SH4 memory map (0x00700000 based), rather than

     6  * the ARM addresses (0x00800000 based).

     7  *

     8  * Copyright (c) 2005 Nathan Keynes.

     9  *

    10  * This program is free software; you can redistribute it and/or modify

    11  * it under the terms of the GNU General Public License as published by

    12  * the Free Software Foundation; either version 2 of the License, or

    13  * (at your option) any later version.

    14  *

    15  * This program is distributed in the hope that it will be useful,

    16  * but WITHOUT ANY WARRANTY; without even the implied warranty of

    17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

    18  * GNU General Public License for more details.

    19  */

    21 #include "mmio.h"

    23 MMIO_REGION_BEGIN( 0x00700000, AICA0, "AICA Sound System 0-31" )

    24 LONG_PORT( 0x000, AICACH0, PORT_MRW, UNDEFINED, "Channel 0" )

    25 MMIO_REGION_END

    27 MMIO_REGION_BEGIN( 0x00701000, AICA1, "AICA Sound System 32-63" )

    28 LONG_PORT( 0x000, AICACH32, PORT_MRW, UNDEFINED, "Channel 32" )

    29 MMIO_REGION_END

    31 MMIO_REGION_BEGIN( 0x00702000, AICA2, "AICA Sound System Control" )

    32 LONG_PORT( 0x040, CDDA_VOL_L, PORT_MRW, 0, "CDDA Volume left" )

    33 LONG_PORT( 0x044, CDDA_VOL_R, PORT_MRW, 0, "CDDA Volume right" )

    34 LONG_PORT( 0x800, VOL_MASTER, PORT_MRW, UNDEFINED, "Master volume" )

    35 LONG_PORT( 0x808, AICA_UNK7, PORT_MRW, 0, "AICA ??? 7" )

    36 LONG_PORT( 0x80C, AICA_CHANSEL, PORT_MRW, 0, "AICA channel select" )

    37 LONG_PORT( 0x810, AICA_CHANSTATE, PORT_MRW, 0, "AICA channel state" )

    38 LONG_PORT( 0x814, AICA_CHANPOSN, PORT_MRW, 0, "AICA channel position" )

    39 LONG_PORT( 0x880, AICA_UNK6, PORT_MRW, 0, "AICA ??? 6" )

    40 LONG_PORT( 0x890, AICA_TIMER, PORT_MRW, 0, "AICA Timer" )

    41 LONG_PORT( 0x89C, AICA_UNK1, PORT_MRW, 0, "AICA ??? 1" )

    42 LONG_PORT( 0x8A4, AICA_TCR, PORT_MRW, 0, "AICA Timer Control?" )

    43 BYTE_PORT( 0x8A8, AICA_UNK3, PORT_MRW, 0, "AICA ??? 3" )

    44 BYTE_PORT( 0x8AC, AICA_UNK4, PORT_MRW, 0, "AICA ??? 4" )

    45 BYTE_PORT( 0x8B0, AICA_UNK5, PORT_MRW, 0, "AICA ??? 5" )

    46 LONG_PORT( 0xC00, AICA_RESET,PORT_MRW, 1, "AICA reset" )

    47 LONG_PORT( 0xD00, AICA_IRQ, PORT_MR, 0, "AICA IRQ Pending" )

    48 LONG_PORT( 0xD04, AICA_IRQCLEAR, PORT_MRW, 0, "AICA IRQ Clear" )

    49 MMIO_REGION_END

    51 MMIO_REGION_BEGIN( 0x00710000, AICARTC, "AICA Sound System RTC" )

    52      LONG_PORT( 0x000, AICA_RTCHI, PORT_R, 0, "RTC High 16-bits" )

    53      LONG_PORT( 0x004, AICA_RTCLO, PORT_R, 0, "RTC Low 16-bits" )

    54      LONG_PORT( 0x008, AICA_RTCEN, PORT_W, 0, "RTC write enable" )

    55 MMIO_REGION_END

    57 MMIO_REGION_LIST_BEGIN( spu )

    58     MMIO_REGION( AICA0 )

    59     MMIO_REGION( AICA1 )

    60     MMIO_REGION( AICA2 )

    61     MMIO_REGION( AICARTC )

    62 MMIO_REGION_LIST_END

    64 void aica_init( void );

    65 void aica_reset( void );

    66 void aica_enable( void );

    68 #define AICA_EVENT_TIMER 2

    69 #define AICA_EVENT_OTHER 5

    71 void aica_event( int event );

    72 void aica_write_channel( int channel, uint32_t addr, uint32_t val );

    74 /**

    75  * The AICA core runs at 44100 samples/second, regardless of what we're

    76  * actually outputing.

    77  */

    78 #define AICA_SAMPLE_RATE 44100

    80 /**

    81  * This is only used to determine number of instructions to execute

    82  * per sample, which isn't cycle accurate at the moment.

    83  */

    84 #define AICA_SAMPLE_PERIOD (1000000000 / 44100)

    86 /**

    87  * Offset between the AICA RTC and the unix timestamp

    88  * (20 years expressed in seconds)

    89  */

    90 #define AICA_RTC_OFFSET 631152000