2 * $Id: x86op.h,v 1.3 2007-09-04 08:40:23 nkeynes Exp $
4 * Definitions of x86 opcodes for use by the translator.
6 * Copyright (c) 2007 Nathan Keynes.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
19 #ifndef __lxdream_x86op_H
20 #define __lxdream_x86op_H
42 #define OP(x) *xlat_output++ = (x)
43 #define OP32(x) *((uint32_t *)xlat_output) = (x); xlat_output+=4
45 /* Offset of a reg relative to the sh4r structure */
46 #define REG_OFFSET(reg) (((char *)&sh4r.reg) - ((char *)&sh4r))
48 #define R_T REG_OFFSET(t)
49 #define R_Q REG_OFFSET(q)
50 #define R_S REG_OFFSET(s)
51 #define R_M REG_OFFSET(m)
52 #define R_SR REG_OFFSET(sr)
53 #define R_GBR REG_OFFSET(gbr)
54 #define R_SSR REG_OFFSET(ssr)
55 #define R_SPC REG_OFFSET(spc)
56 #define R_VBR REG_OFFSET(vbr)
57 #define R_MACH REG_OFFSET(mac)+4
58 #define R_MACL REG_OFFSET(mac)
59 #define R_PR REG_OFFSET(pr)
60 #define R_SGR REG_OFFSET(sgr)
61 #define R_FPUL REG_OFFSET(fpul)
62 #define R_FPSCR REG_OFFSET(fpscr)
63 #define R_DBR REG_OFFSET(dbr)
65 /**************** Basic X86 operations *********************/
66 /* Note: operands follow SH4 convention (source, dest) rather than x86
67 * conventions (dest, source)
70 /* Two-reg modrm form - first arg is the r32 reg, second arg is the r/m32 reg */
71 #define MODRM_r32_rm32(r1,r2) OP(0xC0 | (r1<<3) | r2)
72 #define MODRM_rm32_r32(r1,r2) OP(0xC0 | (r2<<3) | r1)
74 /* ebp+disp8 modrm form */
75 #define MODRM_r32_ebp8(r1,disp) OP(0x45 | (r1<<3)); OP(disp)
77 /* ebp+disp32 modrm form */
78 #define MODRM_r32_ebp32(r1,disp) OP(0x85 | (r1<<3)); OP32(disp)
80 #define MODRM_r32_ebp(r1,disp) if(disp>127){ MODRM_r32_ebp32(r1,disp);}else{ MODRM_r32_ebp8(r1,(unsigned char)disp); }
83 #define ADD_r32_r32(r1,r2) OP(0x03); MODRM_rm32_r32(r1,r2)
84 #define ADD_imm8s_r32(imm,r1) OP(0x83); MODRM_rm32_r32(r1, 0); OP(imm)
85 #define ADD_imm32_r32(imm32,r1) OP(0x81); MODRM_rm32_r32(r1,0); OP32(imm32)
86 #define ADC_r32_r32(r1,r2) OP(0x13); MODRM_rm32_r32(r1,r2)
87 #define AND_r32_r32(r1,r2) OP(0x23); MODRM_rm32_r32(r1,r2)
88 #define AND_imm8_r8(imm8, r1) OP(0x80); MODRM_rm32_r32(r1,4); OP(imm8)
89 #define AND_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,4); OP32(imm)
90 #define CALL_r32(r1) OP(0xFF); MODRM_rm32_r32(r1,2)
91 #define CMC() OP(0xF5)
92 #define CMP_r32_r32(r1,r2) OP(0x3B); MODRM_rm32_r32(r1,r2)
93 #define CMP_imm32_r32(imm32, r1) OP(0x81); MODRM_rm32_r32(r1,7); OP32(imm32)
94 #define CMP_imm8s_r32(imm,r1) OP(0x83); MODRM_rm32_r32(r1,7); OP(imm)
95 #define CMP_imm8s_ebp(imm,disp) OP(0x83); MODRM_r32_ebp(7,disp) OP(imm)
96 #define DEC_r32(r1) OP(0x48+r1)
97 #define IMUL_r32(r1) OP(0xF7); MODRM_rm32_r32(r1,5)
98 #define INC_r32(r1) OP(0x40+r1)
99 #define JMP_rel8(rel) OP(0xEB); OP(rel)
100 #define MOV_r32_r32(r1,r2) OP(0x89); MODRM_r32_rm32(r1,r2)
101 #define MOV_r32_ebp(r1,disp) OP(0x89); MODRM_r32_ebp(r1,disp)
102 #define MOV_r32_ebp32(r1,disp) OP(0x89); MODRM_r32_ebp32(r1,disp)
103 #define MOV_moff32_EAX(off) OP(0xA1); OP32(off)
104 #define MOV_ebp_r32(disp, r1) OP(0x8B); MODRM_r32_ebp(r1,disp)
105 #define MOVSX_r8_r32(r1,r2) OP(0x0F); OP(0xBE); MODRM_rm32_r32(r1,r2)
106 #define MOVSX_r16_r32(r1,r2) OP(0x0F); OP(0xBF); MODRM_rm32_r32(r1,r2)
107 #define MOVZX_r8_r32(r1,r2) OP(0x0F); OP(0xB6); MODRM_rm32_r32(r1,r2)
108 #define MOVZX_r16_r32(r1,r2) OP(0x0F); OP(0xB7); MODRM_rm32_r32(r1,r2)
109 #define MUL_r32(r1) OP(0xF7); MODRM_rm32_r32(r1,4)
110 #define NEG_r32(r1) OP(0xF7); MODRM_rm32_r32(r1,3)
111 #define NOT_r32(r1) OP(0xF7); MODRM_rm32_r32(r1,2)
112 #define OR_r32_r32(r1,r2) OP(0x0B); MODRM_rm32_r32(r1,r2)
113 #define OR_imm8_r8(imm,r1) OP(0x80); MODRM_rm32_r32(r1,1)
114 #define OR_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,1); OP32(imm)
115 #define OR_ebp_r32(disp,r1) OP(0x0B); MODRM_r32_ebp(r1,disp)
116 #define POP_r32(r1) OP(0x58 + r1)
117 #define PUSH_r32(r1) OP(0x50 + r1)
118 #define PUSH_imm32(imm) OP(0x68); OP32(imm)
119 #define RCL1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,2)
120 #define RCR1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,3)
121 #define RET() OP(0xC3)
122 #define ROL1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,0)
123 #define ROR1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,1)
124 #define SAR1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,7)
125 #define SAR_imm8_r32(imm,r1) OP(0xC1); MODRM_rm32_r32(r1,7); OP(imm)
126 #define SAR_r32_CL(r1) OP(0xD3); MODRM_rm32_r32(r1,7)
127 #define SBB_r32_r32(r1,r2) OP(0x1B); MODRM_rm32_r32(r1,r2)
128 #define SHL1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,4)
129 #define SHL_r32_CL(r1) OP(0xD3); MODRM_rm32_r32(r1,4)
130 #define SHL_imm8_r32(imm,r1) OP(0xC1); MODRM_rm32_r32(r1,4); OP(imm)
131 #define SHR1_r32(r1) OP(0xD1); MODRM_rm32_r32(r1,5)
132 #define SHR_r32_CL(r1) OP(0xD3); MODRM_rm32_r32(r1,5)
133 #define SHR_imm8_r32(imm,r1) OP(0xC1); MODRM_rm32_r32(r1,5); OP(imm)
134 #define SUB_r32_r32(r1,r2) OP(0x2B); MODRM_rm32_r32(r1,r2)
135 #define TEST_r8_r8(r1,r2) OP(0x84); MODRM_r32_rm32(r1,r2)
136 #define TEST_r32_r32(r1,r2) OP(0x85); MODRM_rm32_r32(r1,r2)
137 #define TEST_imm8_r8(imm8,r1) OP(0xF6); MODRM_rm32_r32(r1,0); OP(imm8)
138 #define TEST_imm32_r32(imm,r1) OP(0xF7); MODRM_rm32_r32(r1,0); OP32(imm)
139 #define XCHG_r8_r8(r1,r2) OP(0x86); MODRM_rm32_r32(r1,r2)
140 #define XOR_r32_r32(r1,r2) OP(0x33); MODRM_rm32_r32(r1,r2)
141 #define XOR_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,6); OP32(imm)
144 /* Conditional branches */
145 #define JE_rel8(rel) OP(0x74); OP(rel)
146 #define JA_rel8(rel) OP(0x77); OP(rel)
147 #define JAE_rel8(rel) OP(0x73); OP(rel)
148 #define JG_rel8(rel) OP(0x7F); OP(rel)
149 #define JGE_rel8(rel) OP(0x7D); OP(rel)
150 #define JC_rel8(rel) OP(0x72); OP(rel)
151 #define JO_rel8(rel) OP(0x70); OP(rel)
152 #define JNE_rel8(rel) OP(0x75); OP(rel)
153 #define JNA_rel8(rel) OP(0x76); OP(rel)
154 #define JNAE_rel8(rel) OP(0x72); OP(rel)
155 #define JNG_rel8(rel) OP(0x7E); OP(rel)
156 #define JNGE_rel8(rel) OP(0x7C); OP(rel)
157 #define JNC_rel8(rel) OP(0x73); OP(rel)
158 #define JNO_rel8(rel) OP(0x71); OP(rel)
160 /* 32-bit long forms w/ backpatching to an exit routine */
161 #define JE_exit(rel) OP(0x0F); OP(0x84); sh4_x86_add_backpatch(xlat_output); OP32(rel)
162 #define JA_exit(rel) OP(0x0F); OP(0x87); sh4_x86_add_backpatch(xlat_output); OP32(rel)
163 #define JAE_exit(rel) OP(0x0F); OP(0x83); sh4_x86_add_backpatch(xlat_output); OP32(rel)
164 #define JG_exit(rel) OP(0x0F); OP(0x8F); sh4_x86_add_backpatch(xlat_output); OP32(rel)
165 #define JGE_exit(rel) OP(0x0F); OP(0x8D); sh4_x86_add_backpatch(xlat_output); OP32(rel)
166 #define JC_exit(rel) OP(0x0F); OP(0x82); sh4_x86_add_backpatch(xlat_output); OP32(rel)
167 #define JO_exit(rel) OP(0x0F); OP(0x80); sh4_x86_add_backpatch(xlat_output); OP32(rel)
168 #define JNE_exit(rel) OP(0x0F); OP(0x85); sh4_x86_add_backpatch(xlat_output); OP32(rel)
169 #define JNA_exit(rel) OP(0x0F); OP(0x86); sh4_x86_add_backpatch(xlat_output); OP32(rel)
170 #define JNAE_exit(rel) OP(0x0F);OP(0x82); sh4_x86_add_backpatch(xlat_output); OP32(rel)
171 #define JNG_exit(rel) OP(0x0F); OP(0x8E); sh4_x86_add_backpatch(xlat_output); OP32(rel)
172 #define JNGE_exit(rel) OP(0x0F);OP(0x8C); sh4_x86_add_backpatch(xlat_output); OP32(rel)
173 #define JNC_exit(rel) OP(0x0F); OP(0x83); sh4_x86_add_backpatch(xlat_output); OP32(rel)
174 #define JNO_exit(rel) OP(0x0F); OP(0x81); sh4_x86_add_backpatch(xlat_output); OP32(rel)
177 /* Conditional moves ebp-rel */
178 #define CMOVE_r32_r32(r1,r2) OP(0x0F); OP(0x44); MODRM_rm32_r32(r1,r2)
179 #define CMOVA_r32_r32(r1,r2) OP(0x0F); OP(0x47); MODRM_rm32_r32(r1,r2)
180 #define CMOVAE_r32_r32(r1,r2) OP(0x0F); OP(0x43); MODRM_rm32_r32(r1,r2)
181 #define CMOVG_r32_r32(r1,r2) OP(0x0F); OP(0x4F); MODRM_rm32_r32(r1,r2)
182 #define CMOVGE_r32_r32(r1,r2) OP(0x0F); OP(0x4D); MODRM_rm32_r32(r1,r2)
183 #define CMOVC_r32_r32(r1,r2) OP(0x0F); OP(0x42); MODRM_rm32_r32(r1,r2)
184 #define CMOVO_r32_r32(r1,r2) OP(0x0F); OP(0x40); MODRM_rm32_r32(r1,r2)
187 /* Conditional setcc - writeback to sh4r.t */
188 #define SETE_ebp(disp) OP(0x0F); OP(0x94); MODRM_r32_ebp(0, disp);
189 #define SETA_ebp(disp) OP(0x0F); OP(0x97); MODRM_r32_ebp(0, disp);
190 #define SETAE_ebp(disp) OP(0x0F); OP(0x93); MODRM_r32_ebp(0, disp);
191 #define SETG_ebp(disp) OP(0x0F); OP(0x9F); MODRM_r32_ebp(0, disp);
192 #define SETGE_ebp(disp) OP(0x0F); OP(0x9D); MODRM_r32_ebp(0, disp);
193 #define SETC_ebp(disp) OP(0x0F); OP(0x92); MODRM_r32_ebp(0, disp);
194 #define SETO_ebp(disp) OP(0x0F); OP(0x90); MODRM_r32_ebp(0, disp);
196 #define SETNE_ebp(disp) OP(0x0F); OP(0x95); MODRM_r32_ebp(0, disp);
197 #define SETNA_ebp(disp) OP(0x0F); OP(0x96); MODRM_r32_ebp(0, disp);
198 #define SETNAE_ebp(disp) OP(0x0F); OP(0x92); MODRM_r32_ebp(0, disp);
199 #define SETNG_ebp(disp) OP(0x0F); OP(0x9E); MODRM_r32_ebp(0, disp);
200 #define SETNGE_ebp(disp) OP(0x0F); OP(0x9C); MODRM_r32_ebp(0, disp);
201 #define SETNC_ebp(disp) OP(0x0F); OP(0x93); MODRM_r32_ebp(0, disp);
202 #define SETNO_ebp(disp) OP(0x0F); OP(0x91); MODRM_r32_ebp(0, disp);
204 #define SETE_t() SETE_ebp(R_T)
205 #define SETA_t() SETA_ebp(R_T)
206 #define SETAE_t() SETAE_ebp(R_T)
207 #define SETG_t() SETG_ebp(R_T)
208 #define SETGE_t() SETGE_ebp(R_T)
209 #define SETC_t() SETC_ebp(R_T)
210 #define SETO_t() SETO_ebp(R_T)
212 /* Pseudo-op Load carry from T: CMP [EBP+t], #01 ; CMC */
213 #define LDC_t() OP(0x83); MODRM_r32_ebp(7,R_T); OP(0x01); CMC()
215 #endif /* !__lxdream_x86op_H */
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lxdream 0.9.1