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lxdream.org :: lxdream/test/dma.h
lxdream 0.9.1
released Jun 29
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filename test/dma.h
changeset 812:8cc61d5ea1f8
prev561:533f6b478071
author nkeynes
date Sat Dec 27 02:59:35 2008 +0000 (15 years ago)
branchlxdream-mem
permissions -rw-r--r--
last change Replace fpscr_mask/fpscr flags in xlat_cache_block with a single xlat_sh4_mode,
which tracks the field of the same name in sh4r - actually a little faster this way.
Now depends on SR.MD, FPSCR.PR and FPSCR.SZ (although it doesn't benefit from the SR
flag yet).

Also fixed the failure to check the flags in the common case (code address returned
by previous block) which took away the performance benefits, but oh well.
view annotate diff log raw
     1 /**
     2  * $Id$
     3  * 
     4  * DMA support code
     5  *
     6  * Copyright (c) 2006 Nathan Keynes.
     7  *
     8  * This program is free software; you can redistribute it and/or modify
     9  * it under the terms of the GNU General Public License as published by
    10  * the Free Software Foundation; either version 2 of the License, or
    11  * (at your option) any later version.
    12  *
    13  * This program is distributed in the hope that it will be useful,
    14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    16  * GNU General Public License for more details.
    17  */
    19 #include "lib.h"
    21 /**
    22  * Setup the DMAC for a transfer. Assumes 32-byte block transfer.
    23  * Caller is responsible for making sure no-one else is using the
    24  * channel already. 
    25  *
    26  * @param channel DMA channel to use, 0 to 3
    27  * @param source source address (if a memory source)
    28  * @param dest   destination address (if a memory destination)
    29  * @param length number of bytes to transfer (must be a multiple of
    30  *               32.
    31  * @param direction 0 = host to device, 1 = device to host
    32  */
    33 void dmac_prepare_channel( int channel, uint32_t source, uint32_t dest,
    34 			   uint32_t length, int direction );
    36 /**
    37  * Transfer data to the PVR via DMA. Target address should be
    38  * 0x10000000 for the TA, and 0x11000000 + VRAM address for VRAM.
    39  *
    40  * @param target Target address
    41  * @param buf    Data to write (must be 32-byte aligned)
    42  * @param length Size of data to write, in bytes.
    43  * @param region Target region for VRAM writes, 0 for 64-byte region, 1 for 32-byte region.
    44  *
    45  * @return 0 on success, non-zero on failure.
    46  */
    47 int pvr_dma_write( unsigned int target, char *buf, int length, int region );
    49 /**
    50  * Transfer TA data to the PVR via SORT-DMA.
    51   *
    52  * @param sorttable Start address of the sort table
    53  * @param tablelen  Size of the sort table (in bytes)
    54  * @param data      Start address of the TA data (polygons)
    55  * @param datalen   Size of the polygon data block (in bytes)
    56  * @param bitwidth  
    57  * @param datasize
    58  * @param region Target region for VRAM writes, 0 for 64-byte region, 1 for 32-byte region.
    59  *
    60  * @return 0 on success, non-zero on failure.
    61  */
    62 int sort_dma_write( char *sorttable, int tablelen, char *data, int datalen, int bitwidth, int datasize );
    64 int aica_dma_write( uint32_t aica_addr, char *data, uint32_t size );
    65 int aica_dma_read( char *data, uint32_t aica_addr, uint32_t size );
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