Search
lxdream.org :: lxdream/src/sh4/x86op.h
lxdream 0.9.1
released Jun 29
Download Now
filename src/sh4/x86op.h
changeset 953:f4a156508ad1
prev927:17b6b9e245d8
author nkeynes
date Tue Jan 13 11:56:28 2009 +0000 (11 years ago)
permissions -rw-r--r--
last change Merge lxdream-mem branch back to trunk
view annotate diff log raw
     1 /**
     2  * $Id$
     3  * 
     4  * Definitions of x86 opcodes for use by the translator.
     5  *
     6  * Copyright (c) 2007 Nathan Keynes.
     7  *
     8  * This program is free software; you can redistribute it and/or modify
     9  * it under the terms of the GNU General Public License as published by
    10  * the Free Software Foundation; either version 2 of the License, or
    11  * (at your option) any later version.
    12  *
    13  * This program is distributed in the hope that it will be useful,
    14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    16  * GNU General Public License for more details.
    17  */
    19 #ifndef lxdream_x86op_H
    20 #define lxdream_x86op_H 1
    22 #ifdef __cplusplus
    23 extern "C" {
    24 #endif
    26 #define R_NONE -1
    27 #define R_EAX 0
    28 #define R_ECX 1
    29 #define R_EDX 2
    30 #define R_EBX 3
    31 #define R_ESP 4
    32 #define R_EBP 5
    33 #define R_ESI 6 
    34 #define R_EDI 7 
    36 #define R_AL 0
    37 #define R_CL 1
    38 #define R_DL 2
    39 #define R_BL 3
    40 #define R_AH 4
    41 #define R_CH 5
    42 #define R_DH 6
    43 #define R_BH 7
    45 #define MARK_JMP8(x) uint8_t *_mark_jmp_##x = xlat_output
    46 #define MARK_JMP32(x) uint32_t *_mark_jmp_##x = (uint32_t *)xlat_output
    47 #define JMP_TARGET(x) *_mark_jmp_##x += (xlat_output - _mark_jmp_##x)
    49 #define OP(x) *xlat_output++ = (x)
    50 #define OP32(x) *((uint32_t *)xlat_output) = (x); xlat_output+=4
    51 #define OP64(x) *((uint64_t *)xlat_output) = (x); xlat_output+=8
    52 #if SIZEOF_VOID_P == 8
    53 #define OPPTR(x) OP64((uint64_t)(x))
    54 #define AND_imm8s_rptr(imm, r1)  REXW(); AND_imm8s_r32( imm, r1 )
    55 #define LEA_sh4r_rptr(disp, r1) REXW(); LEA_sh4r_r32(disp,r1)
    56 #define MOV_moffptr_EAX(offptr)  REXW(); MOV_moff32_EAX( offptr )
    57 #define load_exc_backpatch( x86reg )  REXW(); OP(0xB8 + x86reg); sh4_x86_add_backpatch( xlat_output, pc, -2 ); OP64( 0 )
    58 #define MOV_backpatch_esp8( disp ) REXW(); OP(0xC7); MODRM_r32_esp8(0, disp); sh4_x86_add_backpatch( xlat_output, pc, -2); OP64(0)
    60 /* imm64 operations are only defined for x86-64 */
    61 #define MOV_imm64_r32(i64,r1) REXW(); OP(0xB8+r1); OP64(i64)
    63 #else /* 32-bit system */
    64 #define OPPTR(x) OP32((uint32_t)(x))
    65 #define AND_imm8s_rptr(imm, r1) AND_imm8s_r32( imm, r1 )
    66 #define LEA_sh4r_rptr(disp, r1) LEA_sh4r_r32(disp,r1)
    67 #define MOV_moffptr_EAX(offptr) MOV_moff32_EAX( offptr )
    68 #define load_exc_backpatch( x86reg )  OP(0xB8 + x86reg); sh4_x86_add_backpatch( xlat_output, pc, -2 ); OP32( 0 )
    69 #define MOV_backpatch_esp8( disp ) OP(0xC7); MODRM_r32_esp8(0, disp); sh4_x86_add_backpatch( xlat_output, pc, -2); OP32(0)
    70 #endif
    71 #define STACK_ALIGN 16
    72 #define POP_r32(r1)           OP(0x58 + r1)
    73 #define PUSH_r32(r1)          OP(0x50 + r1)
    74 #define PUSH_imm32(imm)       OP(0x68); OP32(imm)
    75 #define PUSH_imm64(imm)       REXW(); OP(0x68); OP64(imm);
    77 #ifdef STACK_ALIGN
    78 #else
    79 #define POP_r32(r1)           OP(0x58 + r1)
    80 #define PUSH_r32(r1)          OP(0x50 + r1)
    81 #endif
    84 /* Offset of a reg relative to the sh4r structure */
    85 #define REG_OFFSET(reg)  (((char *)&sh4r.reg) - ((char *)&sh4r) - 128)
    87 #define R_T   REG_OFFSET(t)
    88 #define R_Q   REG_OFFSET(q)
    89 #define R_S   REG_OFFSET(s)
    90 #define R_M   REG_OFFSET(m)
    91 #define R_SR  REG_OFFSET(sr)
    92 #define R_GBR REG_OFFSET(gbr)
    93 #define R_SSR REG_OFFSET(ssr)
    94 #define R_SPC REG_OFFSET(spc)
    95 #define R_VBR REG_OFFSET(vbr)
    96 #define R_MACH REG_OFFSET(mac)+4
    97 #define R_MACL REG_OFFSET(mac)
    98 #define R_PC REG_OFFSET(pc)
    99 #define R_NEW_PC REG_OFFSET(new_pc)
   100 #define R_PR REG_OFFSET(pr)
   101 #define R_SGR REG_OFFSET(sgr)
   102 #define R_FPUL REG_OFFSET(fpul)
   103 #define R_FPSCR REG_OFFSET(fpscr)
   104 #define R_DBR REG_OFFSET(dbr)
   106 /**************** Basic X86 operations *********************/
   107 /* Note: operands follow SH4 convention (source, dest) rather than x86 
   108  * conventions (dest, source)
   109  */
   111 /* Two-reg modrm form - first arg is the r32 reg, second arg is the r/m32 reg */
   112 #define MODRM_r32_rm32(r1,r2) OP(0xC0 | (r1<<3) | r2)
   113 #define MODRM_rm32_r32(r1,r2) OP(0xC0 | (r2<<3) | r1)
   115 /* ebp+disp8 modrm form */
   116 #define MODRM_r32_ebp8(r1,disp) OP(0x45 | (r1<<3)); OP(disp)
   118 /* ebp+disp32 modrm form */
   119 #define MODRM_r32_ebp32(r1,disp) OP(0x85 | (r1<<3)); OP32(disp)
   121 /* esp+disp8 modrm+sib form */
   122 #define MODRM_r32_esp8(r1,disp) OP(0x44 | (r1<<3)); OP(0x24); OP(disp)
   124 #define MODRM_r32_sh4r(r1,disp) if(disp>127){ MODRM_r32_ebp32(r1,disp);}else{ MODRM_r32_ebp8(r1,(unsigned char)disp); }
   126 /* Absolute displacement (no base) */
   127 #define MODRM_r32_disp32(r1,disp) OP(0x05 | (r1<<3)); OP32(disp)
   129 #define REXW() OP(0x48)
   131 /* Major opcodes */
   132 #define ADD_sh4r_r32(disp,r1) OP(0x03); MODRM_r32_sh4r(r1,disp)
   133 #define ADD_r32_sh4r(r1,disp) OP(0x01); MODRM_r32_sh4r(r1,disp)
   134 #define ADD_r32_r32(r1,r2) OP(0x03); MODRM_rm32_r32(r1,r2)
   135 #define ADD_imm8s_r32(imm,r1) OP(0x83); MODRM_rm32_r32(r1, 0); OP(imm)
   136 #define ADD_imm8s_sh4r(imm,disp) OP(0x83); MODRM_r32_sh4r(0,disp); OP(imm)
   137 #define ADD_imm8s_esp8(imm,disp) OP(0x83); MODRM_r32_esp8(0,disp); OP(imm)
   138 #define ADD_imm32_r32(imm32,r1) OP(0x81); MODRM_rm32_r32(r1,0); OP32(imm32)
   139 #define ADC_r32_r32(r1,r2)    OP(0x13); MODRM_rm32_r32(r1,r2)
   140 #define ADC_sh4r_r32(disp,r1) OP(0x13); MODRM_r32_sh4r(r1,disp)
   141 #define ADC_r32_sh4r(r1,disp) OP(0x11); MODRM_r32_sh4r(r1,disp)
   142 #define AND_r32_r32(r1,r2)    OP(0x23); MODRM_rm32_r32(r1,r2)
   143 #define AND_imm8_r8(imm8, r1) OP(0x80); MODRM_rm32_r32(r1,4); OP(imm8)
   144 #define AND_imm8s_r32(imm8,r1) OP(0x83); MODRM_rm32_r32(r1,4); OP(imm8)
   145 #define AND_imm8s_sh4r(imm8,disp) OP(0x83); MODRM_r32_sh4r(4,disp); OP(imm8)
   146 #define AND_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,4); OP32(imm)
   147 #define AND_sh4r_r32(disp,r1)   OP(0x23); MODRM_r32_sh4r(r1, disp)
   148 #define CALL_r32(r1)          OP(0xFF); MODRM_rm32_r32(r1,2)
   149 #define CALL_ptr(ptr)         OP(0xE8); OP32( (((char *)ptr) - (char *)xlat_output) - 4)
   150 #define CALL_sh4r(disp)       OP(0xFF); MODRM_r32_sh4r(2, disp)
   151 #define CALL_r32disp8(r1,disp)  OP(0xFF); OP(0x50 + r1); OP(disp)
   152 #define CLC()                 OP(0xF8)
   153 #define CMC()                 OP(0xF5)
   154 #define CMP_sh4r_r32(disp,r1)  OP(0x3B); MODRM_r32_sh4r(r1,disp)
   155 #define CMP_r32_r32(r1,r2)    OP(0x3B); MODRM_rm32_r32(r1,r2)
   156 #define CMP_imm32_r32(imm32, r1) OP(0x81); MODRM_rm32_r32(r1,7); OP32(imm32)
   157 #define CMP_imm8s_r32(imm,r1) OP(0x83); MODRM_rm32_r32(r1,7); OP(imm)
   158 #define CMP_imm8s_sh4r(imm,disp) OP(0x83); MODRM_r32_sh4r(7,disp) OP(imm)
   159 #define DEC_r32(r1)           OP(0x48+r1)
   160 #define IMUL_r32(r1)          OP(0xF7); MODRM_rm32_r32(r1,5)
   161 #define IMUL_esp8(disp)       OP(0xF7); MODRM_r32_esp8(5,disp)
   162 #define INC_r32(r1)           OP(0x40+r1)
   163 #define JMP_rel8(label)  OP(0xEB); MARK_JMP8(label); OP(-1); 
   164 #define JMP_r32disp8(r1,disp)  OP(0xFF); OP(0x60 + r1); OP(disp)
   165 #define LEA_sh4r_r32(disp,r1) OP(0x8D); MODRM_r32_sh4r(r1,disp)
   166 #define LEA_r32disp8_r32(r1, disp, r2) OP(0x8D); OP( 0x40 + (r2<<3) + r1); OP(disp)
   167 #define MOV_imm32_r32(i32,r1) OP(0xB8+r1); OP32(i32)
   168 #define MOV_r32_r32(r1,r2)    OP(0x89); MODRM_r32_rm32(r1,r2)
   169 #define MOV_r32_sh4r(r1,disp) OP(0x89); MODRM_r32_sh4r(r1,disp)
   170 #define MOV_moff32_EAX(off)   OP(0xA1); OPPTR(off)
   171 #define MOV_sh4r_r32(disp, r1)  OP(0x8B); MODRM_r32_sh4r(r1,disp)
   172 #define MOV_r32_r32ind(r2,r1) OP(0x89); OP(0 + (r2<<3) + r1 )
   173 #define MOV_r32ind_r32(r1,r2) OP(0x8B); OP(0 + (r2<<3) + r1 )
   174 #define MOV_r32_r32disp32(r2,r1,disp)  OP(0x89); OP(0x80 + (r2<<3) + r1); OP32(disp)
   175 #define MOV_r32_ebpr32disp32(r2,r1,disp)  OP(0x89); OP(0x84 + (r2<<3)); OP(0x05 + (r1<<3)); OP32(disp)
   176 #define MOV_r32disp32_r32(r1,disp,r2)  OP(0x8B); OP(0x80 + (r2<<3) + r1); OP32(disp)
   177 #define MOV_r32disp32x4_r32(r1,disp,r2) OP(0x8B); OP(0x04 + (r2<<3)); OP(0x85+(r1<<3)); OP32(disp)
   178 #define MOV_r32_esp8(r1,disp) OP(0x89); MODRM_r32_esp8(r1,disp)
   179 #define MOV_esp8_r32(disp,r1) OP(0x8B); MODRM_r32_esp8(r1,disp)
   180 #define MOVSX_r8_r32(r1,r2)   OP(0x0F); OP(0xBE); MODRM_rm32_r32(r1,r2)
   181 #define MOVSX_r16_r32(r1,r2)  OP(0x0F); OP(0xBF); MODRM_rm32_r32(r1,r2)
   182 #define MOVZX_r8_r32(r1,r2)   OP(0x0F); OP(0xB6); MODRM_rm32_r32(r1,r2)
   183 #define MOVZX_r16_r32(r1,r2)  OP(0x0F); OP(0xB7); MODRM_rm32_r32(r1,r2)
   184 #define MOVZX_sh4r8_r32(disp,r1) OP(0x0F); OP(0xB6); MODRM_r32_sh4r(r1,disp)
   185 #define MOVZX_sh4r16_r32(disp,r1) OP(0x0F); OP(0xB7); MODRM_r32_sh4r(r1,disp)
   186 #define MUL_r32(r1)           OP(0xF7); MODRM_rm32_r32(r1,4)
   187 #define NEG_r32(r1)           OP(0xF7); MODRM_rm32_r32(r1,3)
   188 #define NOT_r32(r1)           OP(0xF7); MODRM_rm32_r32(r1,2)
   189 #define OR_r32_r32(r1,r2)     OP(0x0B); MODRM_rm32_r32(r1,r2)
   190 #define OR_imm8_r8(imm,r1)    OP(0x80); MODRM_rm32_r32(r1,1); OP(imm)
   191 #define OR_imm32_r32(imm,r1)  OP(0x81); MODRM_rm32_r32(r1,1); OP32(imm)
   192 #define OR_sh4r_r32(disp,r1)  OP(0x0B); MODRM_r32_sh4r(r1,disp)
   193 #define RCL1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,2)
   194 #define RCR1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,3)
   195 #define RET()                 OP(0xC3)
   196 #define ROL1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,0)
   197 #define ROR1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,1)
   198 #define SAR1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,7)
   199 #define SAR_imm8_r32(imm,r1)  OP(0xC1); MODRM_rm32_r32(r1,7); OP(imm)
   200 #define SAR_r32_CL(r1)        OP(0xD3); MODRM_rm32_r32(r1,7)
   201 #define SBB_r32_r32(r1,r2)    OP(0x1B); MODRM_rm32_r32(r1,r2)
   202 #define SHL1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,4)
   203 #define SHL_r32_CL(r1)        OP(0xD3); MODRM_rm32_r32(r1,4)
   204 #define SHL_imm8_r32(imm,r1)  OP(0xC1); MODRM_rm32_r32(r1,4); OP(imm)
   205 #define SHR1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,5)
   206 #define SHR_r32_CL(r1)        OP(0xD3); MODRM_rm32_r32(r1,5)
   207 #define SHR_imm8_r32(imm,r1)  OP(0xC1); MODRM_rm32_r32(r1,5); OP(imm)
   208 #define STC()                 OP(0xF9)
   209 #define SUB_r32_r32(r1,r2)    OP(0x2B); MODRM_rm32_r32(r1,r2)
   210 #define SUB_sh4r_r32(disp,r1)  OP(0x2B); MODRM_r32_sh4r(r1, disp)
   211 #define SUB_imm8s_r32(imm,r1) ADD_imm8s_r32(-(imm),r1)
   212 #define TEST_r8_r8(r1,r2)     OP(0x84); MODRM_r32_rm32(r1,r2)
   213 #define TEST_r32_r32(r1,r2)   OP(0x85); MODRM_rm32_r32(r1,r2)
   214 #define TEST_imm8_r8(imm8,r1) OP(0xF6); MODRM_rm32_r32(r1,0); OP(imm8)
   215 #define TEST_imm32_r32(imm,r1) OP(0xF7); MODRM_rm32_r32(r1,0); OP32(imm)
   216 #define XCHG_r8_r8(r1,r2)     OP(0x86); MODRM_rm32_r32(r1,r2)
   217 #define XOR_r8_r8(r1,r2)      OP(0x32); MODRM_rm32_r32(r1,r2)
   218 #define XOR_imm8s_r32(imm,r1)   OP(0x83); MODRM_rm32_r32(r1,6); OP(imm)
   219 #define XOR_r32_r32(r1,r2)    OP(0x33); MODRM_rm32_r32(r1,r2)
   220 #define XOR_sh4r_r32(disp,r1)    OP(0x33); MODRM_r32_sh4r(r1,disp)
   221 #define XOR_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,6); OP32(imm)
   222 #define XOR_imm32_sh4r(imm,disp) OP(0x81); MODRM_r32_sh4r(6, disp); OP32(imm)
   225 /* Floating point ops */
   226 #define FABS_st0() OP(0xD9); OP(0xE1)
   227 #define FADDP_st(st) OP(0xDE); OP(0xC0+st)
   228 #define FCHS_st0() OP(0xD9); OP(0xE0)
   229 #define FCOMIP_st(st) OP(0xDF); OP(0xF0+st)
   230 #define FDIVP_st(st) OP(0xDE); OP(0xF8+st)
   231 #define FILD_r32ind(r32) OP(0xDB); OP(0x00+r32)
   232 #define FLD0_st0() OP(0xD9); OP(0xEE);
   233 #define FLD1_st0() OP(0xD9); OP(0xE8);
   234 #define FLDf_sh4r(disp) OP(0xD9); MODRM_r32_sh4r(0, disp)
   235 #define FLDd_sh4r(disp) OP(0xDD); MODRM_r32_sh4r(0, disp)
   236 #define FLDCW_r32ind(r32) OP(0xD9); OP(0x28+r32)
   237 #define FMULP_st(st) OP(0xDE); OP(0xC8+st)
   238 #define FNSTCW_r32ind(r32) OP(0xD9); OP(0x38+r32)
   239 #define FPOP_st()  OP(0xDD); OP(0xC0); OP(0xD9); OP(0xF7)
   240 #define FSTPf_sh4r(disp) OP(0xD9); MODRM_r32_sh4r(3, disp)
   241 #define FSTPd_sh4r(disp) OP(0xDD); MODRM_r32_sh4r(3, disp)
   242 #define FSUBP_st(st) OP(0xDE); OP(0xE8+st)
   243 #define FSQRT_st0() OP(0xD9); OP(0xFA)
   245 #define FILD_sh4r(disp) OP(0xDB); MODRM_r32_sh4r(0, disp)
   246 #define FLDF_sh4r(disp) OP(0xD9); MODRM_r32_sh4r(0, disp)
   247 #define FLDD_sh4r(disp) OP(0xDD); MODRM_r32_sh4r(0, disp)
   248 #define FISTP_sh4r(disp) OP(0xDB); MODRM_r32_sh4r(3, disp)
   249 #define FSTPF_sh4r(disp) OP(0xD9); MODRM_r32_sh4r(3,disp)
   250 #define FSTPD_sh4r(disp) OP(0xDD); MODRM_r32_sh4r(3,disp)
   252 /* Conditional branches */
   253 #define JE_rel8(label)   OP(0x74); MARK_JMP8(label); OP(-1)
   254 #define JA_rel8(label)   OP(0x77); MARK_JMP8(label); OP(-1)
   255 #define JAE_rel8(label)  OP(0x73); MARK_JMP8(label); OP(-1)
   256 #define JG_rel8(label)   OP(0x7F); MARK_JMP8(label); OP(-1)
   257 #define JGE_rel8(label)  OP(0x7D); MARK_JMP8(label); OP(-1)
   258 #define JC_rel8(label)   OP(0x72); MARK_JMP8(label); OP(-1)
   259 #define JO_rel8(label)   OP(0x70); MARK_JMP8(label); OP(-1)
   260 #define JNE_rel8(label)  OP(0x75); MARK_JMP8(label); OP(-1)
   261 #define JNA_rel8(label)  OP(0x76); MARK_JMP8(label); OP(-1)
   262 #define JNAE_rel8(label) OP(0x72); MARK_JMP8(label); OP(-1)
   263 #define JNG_rel8(label)  OP(0x7E); MARK_JMP8(label); OP(-1)
   264 #define JNGE_rel8(label) OP(0x7C); MARK_JMP8(label); OP(-1)
   265 #define JNC_rel8(label)  OP(0x73); MARK_JMP8(label); OP(-1)
   266 #define JNO_rel8(label)  OP(0x71); MARK_JMP8(label); OP(-1)
   267 #define JNS_rel8(label)  OP(0x79); MARK_JMP8(label); OP(-1)
   268 #define JS_rel8(label)   OP(0x78); MARK_JMP8(label); OP(-1)
   270 /** JMP relative 8 or 32 depending on size of rel. rel offset
   271  * from the start of the instruction (not end)
   272  */
   273 #define JMP_rel(rel) if((rel)<-126||(rel)>129) { OP(0xE9); OP32((rel)-5); } else { OP(0xEB); OP((rel)-2); }
   275 /* 32-bit long forms w/ backpatching to an exception routine */
   276 #define JMP_exc(exc)  OP(0xE9); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
   277 #define JE_exc(exc)  OP(0x0F); OP(0x84); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
   278 #define JA_exc(exc)  OP(0x0F); OP(0x87); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
   279 #define JAE_exc(exc) OP(0x0F); OP(0x83); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
   280 #define JG_exc(exc)  OP(0x0F); OP(0x8F); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
   281 #define JGE_exc(exc) OP(0x0F); OP(0x8D); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
   282 #define JC_exc(exc)  OP(0x0F); OP(0x82); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
   283 #define JO_exc(exc)  OP(0x0F); OP(0x80); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
   284 #define JNE_exc(exc) OP(0x0F); OP(0x85); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
   285 #define JNA_exc(exc) OP(0x0F); OP(0x86); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
   286 #define JNAE_exc(exc) OP(0x0F);OP(0x82); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
   287 #define JNG_exc(exc) OP(0x0F); OP(0x8E); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
   288 #define JNGE_exc(exc) OP(0x0F);OP(0x8C); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
   289 #define JNC_exc(exc) OP(0x0F); OP(0x83); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
   290 #define JNO_exc(exc) OP(0x0F); OP(0x81); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
   292 #define EXPJE_rel8(label) OP(0x3E); JE_rel8(label)
   294 /* Conditional moves ebp-rel */
   295 #define CMOVE_r32_r32(r1,r2)  OP(0x0F); OP(0x44); MODRM_rm32_r32(r1,r2)
   296 #define CMOVA_r32_r32(r1,r2)  OP(0x0F); OP(0x47); MODRM_rm32_r32(r1,r2)
   297 #define CMOVAE_r32_r32(r1,r2) OP(0x0F); OP(0x43); MODRM_rm32_r32(r1,r2)
   298 #define CMOVG_r32_r32(r1,r2)  OP(0x0F); OP(0x4F); MODRM_rm32_r32(r1,r2)
   299 #define CMOVGE_r32_r32(r1,r2)  OP(0x0F); OP(0x4D); MODRM_rm32_r32(r1,r2)
   300 #define CMOVC_r32_r32(r1,r2)  OP(0x0F); OP(0x42); MODRM_rm32_r32(r1,r2)
   301 #define CMOVO_r32_r32(r1,r2)  OP(0x0F); OP(0x40); MODRM_rm32_r32(r1,r2)
   304 /* Conditional setcc - writeback to sh4r.t */
   305 #define SETE_sh4r(disp)    OP(0x0F); OP(0x94); MODRM_r32_sh4r(0, disp);
   306 #define SETA_sh4r(disp)    OP(0x0F); OP(0x97); MODRM_r32_sh4r(0, disp);
   307 #define SETAE_sh4r(disp)   OP(0x0F); OP(0x93); MODRM_r32_sh4r(0, disp);
   308 #define SETG_sh4r(disp)    OP(0x0F); OP(0x9F); MODRM_r32_sh4r(0, disp);
   309 #define SETGE_sh4r(disp)   OP(0x0F); OP(0x9D); MODRM_r32_sh4r(0, disp);
   310 #define SETC_sh4r(disp)    OP(0x0F); OP(0x92); MODRM_r32_sh4r(0, disp);
   311 #define SETO_sh4r(disp)    OP(0x0F); OP(0x90); MODRM_r32_sh4r(0, disp);
   313 #define SETNE_sh4r(disp)   OP(0x0F); OP(0x95); MODRM_r32_sh4r(0, disp);
   314 #define SETNA_sh4r(disp)   OP(0x0F); OP(0x96); MODRM_r32_sh4r(0, disp);
   315 #define SETNAE_sh4r(disp)  OP(0x0F); OP(0x92); MODRM_r32_sh4r(0, disp);
   316 #define SETNG_sh4r(disp)   OP(0x0F); OP(0x9E); MODRM_r32_sh4r(0, disp);
   317 #define SETNGE_sh4r(disp)  OP(0x0F); OP(0x9C); MODRM_r32_sh4r(0, disp);
   318 #define SETNC_sh4r(disp)   OP(0x0F); OP(0x93); MODRM_r32_sh4r(0, disp);
   319 #define SETNO_sh4r(disp)   OP(0x0F); OP(0x91); MODRM_r32_sh4r(0, disp);
   321 #define SETE_t() SETE_sh4r(R_T)
   322 #define SETA_t() SETA_sh4r(R_T)
   323 #define SETAE_t() SETAE_sh4r(R_T)
   324 #define SETG_t() SETG_sh4r(R_T)
   325 #define SETGE_t() SETGE_sh4r(R_T)
   326 #define SETC_t() SETC_sh4r(R_T)
   327 #define SETO_t() SETO_sh4r(R_T)
   328 #define SETNE_t() SETNE_sh4r(R_T)
   330 #define SETC_r8(r1)      OP(0x0F); OP(0x92); MODRM_rm32_r32(r1, 0)
   332 /* Pseudo-op Load carry from T: CMP [EBP+t], #01 ; CMC */
   333 #define LDC_t()     OP(0x83); MODRM_r32_sh4r(7,R_T); OP(0x01); CMC()
   335 /* SSE instructions */
   336 #define ADDPS_xmm_xmm(xmm1,xmm2) OP(0x0F); OP(0x58); MODRM_rm32_r32(xmm1,xmm2) 
   337 #define HADDPS_xmm_xmm(xmm1,xmm2) OP(0xF2); OP(0x0F); OP(0x7C); MODRM_rm32_r32(xmm1,xmm2)
   338 #define MOVHLPS_xmm_xmm(xmm1,xmm2) OP(0x0F); OP(0x12); MODRM_rm32_r32(xmm1,xmm2)
   339 #define MOVLHPS_xmm_xmm(xmm1,xmm2) OP(0x0F); OP(0x16); MODRM_rm32_r32(xmm1,xmm2)
   340 #define MOVSHDUP_sh4r_xmm(disp,xmm) OP(0xF3); OP(0x0F); OP(0x16); MODRM_r32_sh4r(xmm,disp)
   341 #define MOVSLDUP_sh4r_xmm(disp,xmm) OP(0xF3); OP(0x0F); OP(0x12); MODRM_r32_sh4r(xmm,disp)
   342 #define MOVAPS_sh4r_xmm(disp, xmm) OP(0x0F); OP(0x28); MODRM_r32_sh4r(xmm,disp)
   343 #define MOVAPS_xmm_sh4r(xmm,disp) OP(0x0F); OP(0x29); MODRM_r32_sh4r(xmm,disp)
   344 #define MOVAPS_xmm_xmm(xmm1,xmm2) OP(0x0F); OP(0x28); MODRM_rm32_r32(xmm1,xmm2)
   345 #define MOVSS_xmm_sh4r(xmm,disp) OP(0xF3); OP(0x0F); OP(0x11); MODRM_r32_sh4r(xmm,disp)
   346 #define MULPS_sh4r_xmm(disp, xmm) OP(0x0F); OP(0x59); MODRM_r32_sh4r(xmm,disp)
   347 #define MULPS_xmm_xmm(xmm1,xmm2) OP(0x0F); OP(0x59); MODRM_rm32_r32(xmm1,xmm2)
   348 #define SHUFPS_sh4r_xmm(disp,xmm,imm8) OP(0x0F); OP(0xC6); MODRM_r32_sh4r(xmm, disp); OP(imm8) 
   349 #define SHUFPS_xmm_xmm(xmm1,xmm2,imm8) OP(0x0F); OP(0xC6); MODRM_rm32_r32(xmm1,xmm2); OP(imm8)
   350 #define UNPCKHPS_xmm_xmm(xmm1,xmm2) OP(0x0F); OP(0x15); MODRM_rm32_r32(xmm1,xmm2)
   351 #define UNPCKLPS_xmm_xmm(xmm1,xmm2) OP(0x0F); OP(0x14); MODRM_rm32_r32(xmm1,xmm2)
   353 #ifdef __cplusplus
   354 }
   355 #endif
   357 #endif /* !lxdream_x86op_H */
.