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lxdream.org :: lxdream/test/testregs.c
lxdream 0.9.1
released Jun 29
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filename test/testregs.c
changeset 190:f7653df5e832
next196:3d3c761afbf4
author nkeynes
date Wed Aug 02 04:13:15 2006 +0000 (15 years ago)
permissions -rw-r--r--
last change Add many more TA test cases (a couple of corner cases aren't 100% correct
yet, TBA)
Add new test "testregs" to check register masks (currently just PVR registers)
view annotate diff log raw
     1 /**
     2  * $Id: testregs.c,v 1.1 2006-08-02 04:13:15 nkeynes Exp $
     3  * 
     4  * Register mask tests. These are simple "write value to register and check
     5  * that we read back what we expect" tests.
     6  *
     7  * Copyright (c) 2006 Nathan Keynes.
     8  *
     9  * This program is free software; you can redistribute it and/or modify
    10  * it under the terms of the GNU General Public License as published by
    11  * the Free Software Foundation; either version 2 of the License, or
    12  * (at your option) any later version.
    13  *
    14  * This program is distributed in the hope that it will be useful,
    15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    17  * GNU General Public License for more details.
    18  */
    20 #include "lib.h"
    21 #include <stdio.h>
    23 /**
    24  * Constant to mean "same as previous value". Can't be used otherwise.
    25  */
    26 #define UNCHANGED 0xDEADBEEF
    28 struct test {
    29     unsigned int reg;
    30     unsigned int write;
    31     unsigned int expect;
    32 };
    36 struct test test_cases[] = {
    37     { 0xA05F8000, 0xFFFFFFFF, 0x17FD11DB }, /* PVRID read-only */
    38     { 0xA05F8004, 0xFFFFFFFF, 0x00000011 }, /* PVRVER read-only */
    39     //    { 0xA05F8014, 0xFFFFFFFF, 0x00000000 }, /* Render start */
    40     { 0xA05F8018, 0xFFFFFFFF, 0x000007FF }, /* ??? */   
    41     { 0xA05F801C, 0xFFFFFFFF, 0x00000000 }, /* ??? */   
    42     { 0xA05F8020, 0xFFFFFFFF, 0x00F00000 }, /* Render poly buffer address ??? */
    43     { 0xA05F8024, 0xFFFFFFFF, 0x00000000 }, /* ??? */
    44     { 0xA05F8028, 0xFFFFFFFF, 0x00000000 }, /* ??? */   
    45     { 0xA05F802C, 0xFFFFFFFF, 0x00FFFFFC }, /* Render Tile buffer address */
    46     { 0xA05F8030, 0xFFFFFFFF, 0x00010101 }, /* Render TSP cache? */   
    47     { 0xA05F8040, 0xFFFFFFFF, 0x01FFFFFF }, /* Display border colour */   
    48     { 0xA05F8044, 0xFFFFFFFF, 0x00FFFF7F }, /* Display config */   
    49     { 0xA05F8048, 0xFFFFFFFF, 0x00FFFF0F }, /* Render config */
    50     { 0xA05F804C, 0xFFFFFFFF, 0x000001FF }, /* Render size */
    51     { 0xA05F8050, 0xFFFFFFFF, 0x00FFFFFC }, /* Display address 1 */ 
    52     { 0xA05F8054, 0xFFFFFFFF, 0x00FFFFFC }, /* Display address 2 */
    53     { 0xA05F8058, 0xFFFFFFFF, 0x00000000 }, /* ??? */
    54     { 0xA05F805C, 0xFFFFFFFF, 0x3FFFFFFF }, /* Display size */
    55     { 0xA05F8060, 0xFFFFFFFF, 0x01FFFFFC }, /* Render address 1 */
    56     { 0xA05F8064, 0xFFFFFFFF, 0x01FFFFFC }, /* Render address 2 */
    57     { 0xA05F8068, 0xFFFFFFFF, 0x07FF07FF }, /* Render horizontal clip */
    58     { 0xA05F806C, 0xFFFFFFFF, 0x03FF03FF }, /* Render vertical clip */
    59     { 0xA05F8074, 0xFFFFFFFF, 0x000001FF }, /* Render shadow mode */
    60     { 0xA05F807C, 0xFFFFFFFF, 0x003FFFFF }, /* Render object config */
    61     { 0xA05F8084, 0xFFFFFFFF, 0x7FFFFFFF }, /* Render tsp clip */
    62     { 0xA05F808C, 0xFFFFFFFF, 0x1FFFFFFF }, /* Render background plane config */
    63     { 0xA05F8098, 0xFFFFFFFF, 0x00FFFFF9 }, /* ISP config? */
    64     { 0xA05F80C4, 0xFFFFFFFF, UNCHANGED },  /* Gun pos */
    65     { 0xA05F80C8, 0xFFFFFFFF, 0x03FF33FF }, /* Horizontal scanline irq */
    66     { 0xA05F80CC, 0xFFFFFFFF, 0x03FF03FF }, /* Vertical scanline irq */
    67     { 0xA05F8124, 0xFFFFFFFF, 0x00FFFFE0 }, /* TA Tile matrix base */
    68     { 0xA05F8128, 0xFFFFFFFF, 0x00FFFFFC }, /* TA Polygon base */
    69     { 0xA05F812C, 0xFFFFFFFF, 0x00FFFFE0 }, /* TA Tile matrix end */
    70     { 0xA05F8130, 0xFFFFFFFF, 0x00FFFFFC }, /* TA Polygon end */
    71     { 0xA05F8134, 0xFFFFFFFF, UNCHANGED  }, /* TA Tilelist posn */
    72     { 0xA05F8138, 0xFFFFFFFF, UNCHANGED  }, /* TA polygon posn */
    73     { 0xA05F813C, 0xFFFFFFFF, 0x000F003F }, /* TA tile matrix size */
    74     { 0xA05F8140, 0xFFFFFFFF, 0x00133333 }, /* TA object config */
    75     { 0xA05F8144, 0xFFFFFFFF, 0x00000000 }, /* TA initialize */
    76     { 0xA05F8164, 0xFFFFFFFF, 0x00FFFFE0 }, /* TA Tile list start */
    77     { 0, 0, 0 } };
    79 int main( int argc, char *argv[] )
    80 {
    81     int i;
    82     int failures = 0;
    83     int tests = 0;
    85     for( i=0; test_cases[i].reg != 0; i++ ) {
    86     	unsigned int oldval = long_read( test_cases[i].reg );
    87     	unsigned int newval;
    88 	long_write( test_cases[i].reg, test_cases[i].write );
    89 	newval = long_read( test_cases[i].reg );
    90 	if( test_cases[i].expect == UNCHANGED ) {
    91 	    if( newval != oldval ) {
    92 		fprintf( stderr, "Test %d (%08X) failed. Expected %08X but was %08X\n",
    93 		  	 i+1, test_cases[i].reg, oldval, newval );
    94 		failures++;
    95 	    }
    96 	} else {
    97 	    if( newval != test_cases[i].expect ) {
    98 		fprintf( stderr, "Test %d (%08X) failed. Expected %08X but was %08X\n",
    99 		  	 i+1, test_cases[i].reg, test_cases[i].expect, newval );
   100 		failures++;
   101 	    }
   102 	}
   103 	long_write( test_cases[i].reg, oldval );
   104 	tests++;
   105     }
   107     fprintf( stdout, "%d/%d test cases passed successfully\n", (tests-failures), tests );
   108     return failures;
   109 }
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