Handle branch delay-slot instruction that falls on the next page correctly.
- Generate the right end PC in the first place (sh4trans.c)
- Allow blocks to be marked as both entry point + continuation, and
specifically handle invalidation when first entry of a page is a continuation ==
flush previous page as well.
src/sh4/sh4trans.c
src/test/testxlt.c
src/xlat/xltcache.c
src/xlat/xltcache.h

Handle memory exceptions thrown while in shadow mode
src/sh4/sh4.c
src/sh4/sh4core.h
src/sh4/sh4x86.in
src/sh4/shadow.c

Fix MAC.W operand ordering - reads from Rn first, then Rm (per the manual)
src/sh4/sh4core.in
src/sh4/sh4x86.in

FSRRA uses higher precision for intermediate results - change sqrtf to sqrt.
src/sh4/sh4core.in
test/Makefile.in
test/sh4/fsrra.s
test/sh4/testsh4.c

SH4 shadow-mode tweaks
- Fix exceptions generated by the translator to account for the excepting
instruction(s) in the cycle counts.
- Compare floating point regs bitwise rather than with FP comparisons
(otherwise can fail due to nan != nan)
- Dump the translated block when we abort with an inconsistency
src/sh4/sh4x86.in
src/sh4/shadow.c
src/xlat/x86/x86op.h

Handle calls to sh4_disasm_instruction when the memory isn't mapped
(as can happen if we try to print a translated block that's been unmapped)
src/sh4/sh4dasm.in

Fix make check
src/sh4/sh4.h
src/test/testsh4x86.c
src/test/testxlt.c
src/xlat/xltcache.c

Rearrange the profile dump code so as to avoid xlat => SH4 references
src/sh4/sh4.c
src/sh4/sh4trans.c
src/sh4/sh4trans.h
src/xlat/xltcache.c
src/xlat/xltcache.h

Refactor event processing into sh4_handle_pending_events()
src/eventq.c
src/sh4/intc.c
src/sh4/sh4.c
src/sh4/sh4.h
src/sh4/sh4core.in
src/sh4/sh4trans.c

Add support for block linking when the block target is fixed. Only a small
(~3% improvement) so far.
src/sh4/sh4trans.h
src/sh4/sh4x86.in
src/xlat/x86/x86op.h
src/xlat/xltcache.c
src/xlat/xltcache.h