nkeynes@31: /**
nkeynes@561:  * $Id$
nkeynes@31:  *
nkeynes@31:  * SH4 onboard interrupt controller (INTC) implementation
nkeynes@31:  *
nkeynes@31:  * Copyright (c) 2005 Nathan Keynes.
nkeynes@31:  *
nkeynes@31:  * This program is free software; you can redistribute it and/or modify
nkeynes@31:  * it under the terms of the GNU General Public License as published by
nkeynes@31:  * the Free Software Foundation; either version 2 of the License, or
nkeynes@31:  * (at your option) any later version.
nkeynes@31:  *
nkeynes@31:  * This program is distributed in the hope that it will be useful,
nkeynes@31:  * but WITHOUT ANY WARRANTY; without even the implied warranty of
nkeynes@31:  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
nkeynes@31:  * GNU General Public License for more details.
nkeynes@31:  */
nkeynes@31: 
nkeynes@1: #include <assert.h>
nkeynes@1: #include "sh4mmio.h"
nkeynes@1: #include "sh4core.h"
nkeynes@1: #include "intc.h"
nkeynes@265: #include "eventq.h"
nkeynes@1: 
nkeynes@1: struct intc_sources_t {
nkeynes@1:     char *name;
nkeynes@1:     uint32_t code;
nkeynes@157: } intc_sources[INT_NUM_SOURCES] = {
nkeynes@157:     { "IRQ0", 0x200 },  { "IRQ1", 0x220 },  { "IRQ2", 0x240 },
nkeynes@157:     { "IRQ3", 0x260 },  { "IRQ4", 0x280 },  { "IRQ5", 0x2A0 },
nkeynes@157:     { "IRQ6", 0x2C0 },  { "IRQ7", 0x2E0 },  { "IRQ8", 0x300 },
nkeynes@157:     { "IRQ9", 0x320 },  { "IRQ10",0x340 },  { "IRQ11",0x360 },
nkeynes@157:     { "IRQ12",0x380 },  { "IRQ13",0x3A0 },  { "IRQ14",0x3C0 },
nkeynes@157:     { "NMI", 0x1C0 },   { "H-UDI",0x600 },  { "GPIOI",0x620 },
nkeynes@157:     { "DMTE0",0x640 },  { "DMTE1",0x660 },  { "DMTE2",0x680 },
nkeynes@157:     { "DMTE3",0x6A0 },  { "DMTAE",0x6C0 },  { "TUNI0",0x400 },
nkeynes@157:     { "TUNI1",0x420 },  { "TUNI2",0x440 },  { "TICPI2",0x460 },
nkeynes@157:     { "RTC_ATI",0x480 },{ "RTC_PRI",0x4A0 },{ "RTC_CUI",0x4C0 },
nkeynes@157:     { "SCI_ERI",0x4E0 },{ "SCI_RXI",0x500 },{ "SCI_TXI",0x520 },
nkeynes@157:     { "SCI_TEI",0x540 },
nkeynes@421:     { "SCIF_ERI",0x700 },{ "SCIF_RXI",0x720 },{ "SCIF_BRI",0x740 },
nkeynes@157:     { "SCIF_TXI",0x760 },
nkeynes@157:     { "WDT_ITI",0x560 },{ "RCMI",0x580 },   { "ROVI",0x5A0 } };
nkeynes@1: 
nkeynes@157: static int intc_default_priority[INT_NUM_SOURCES] = { 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 16 };
nkeynes@157: 
nkeynes@157: #define PRIORITY(which) intc_state.priority[which]
nkeynes@1: #define INTCODE(which) intc_sources[which].code
nkeynes@1: 
nkeynes@157: static struct intc_state {
nkeynes@157:     int num_pending;
nkeynes@157:     int pending[INT_NUM_SOURCES];
nkeynes@157:     int priority[INT_NUM_SOURCES];
nkeynes@157: } intc_state;
nkeynes@1: 
nkeynes@1: void mmio_region_INTC_write( uint32_t reg, uint32_t val )
nkeynes@1: {
nkeynes@1:     /* Well it saves having to use an intermediate table... */
nkeynes@1:     switch( reg ) {
nkeynes@1:         case ICR: /* care about this later */
nkeynes@1:             break;
nkeynes@1:         case IPRA:
nkeynes@1:             PRIORITY(INT_TMU_TUNI0) = (val>>12)&0x000F;
nkeynes@1:             PRIORITY(INT_TMU_TUNI1) = (val>>8)&0x000F;
nkeynes@1:             PRIORITY(INT_TMU_TUNI2) =
nkeynes@1:                 PRIORITY(INT_TMU_TICPI2) = (val>>4)&0x000F;
nkeynes@1:             PRIORITY(INT_RTC_ATI) =
nkeynes@1:                 PRIORITY(INT_RTC_PRI) =
nkeynes@1:                 PRIORITY(INT_RTC_CUI) = val&0x000F;
nkeynes@1:             break;
nkeynes@1:         case IPRB:
nkeynes@1:             PRIORITY(INT_WDT_ITI) = (val>>12)&0x000F;
nkeynes@1:             PRIORITY(INT_REF_RCMI) =
nkeynes@1:                 PRIORITY(INT_REF_ROVI) = (val>>8)&0x000F;
nkeynes@1:             PRIORITY(INT_SCI_ERI) =
nkeynes@1:                 PRIORITY(INT_SCI_RXI) =
nkeynes@1:                 PRIORITY(INT_SCI_TXI) =
nkeynes@1:                 PRIORITY(INT_SCI_TEI) = (val>>4)&0x000F;
nkeynes@1:             /* Bits 0-3 reserved */
nkeynes@1:             break;
nkeynes@1:         case IPRC:
nkeynes@1:             PRIORITY(INT_GPIO) = (val>>12)&0x000F;
nkeynes@1:             PRIORITY(INT_DMA_DMTE0) =
nkeynes@1:                 PRIORITY(INT_DMA_DMTE1) =
nkeynes@1:                 PRIORITY(INT_DMA_DMTE2) =
nkeynes@1:                 PRIORITY(INT_DMA_DMTE3) =
nkeynes@1:                 PRIORITY(INT_DMA_DMAE) = (val>>8)&0x000F;
nkeynes@1:             PRIORITY(INT_SCIF_ERI) =
nkeynes@1:                 PRIORITY(INT_SCIF_RXI) =
nkeynes@1:                 PRIORITY(INT_SCIF_BRI) =
nkeynes@1:                 PRIORITY(INT_SCIF_TXI) = (val>>4)&0x000F;
nkeynes@1:             PRIORITY(INT_HUDI) = val&0x000F;
nkeynes@1:             break;
nkeynes@1:     }
nkeynes@1:     MMIO_WRITE( INTC, reg, val );
nkeynes@1: }
nkeynes@1: 
nkeynes@1: int32_t mmio_region_INTC_read( uint32_t reg )
nkeynes@1: {
nkeynes@1:     return MMIO_READ( INTC, reg );
nkeynes@1: }
nkeynes@157: 
nkeynes@157: void INTC_reset()
nkeynes@157: {
nkeynes@157:     int i;
nkeynes@157: 
nkeynes@157:     intc_state.num_pending = 0;
nkeynes@157:     for( i=0; i<INT_NUM_SOURCES; i++ )
nkeynes@157: 	intc_state.priority[i] = intc_default_priority[i];
nkeynes@265:     sh4r.event_pending = event_get_next_time();
nkeynes@265:     sh4r.event_types &= (~PENDING_IRQ);
nkeynes@157: }
nkeynes@157: 
nkeynes@157: 
nkeynes@157: void INTC_save_state( FILE *f )
nkeynes@157: {
nkeynes@157:     fwrite( &intc_state, sizeof(intc_state), 1, f );
nkeynes@157: }
nkeynes@157: 
nkeynes@157: int INTC_load_state( FILE *f )
nkeynes@157: {
nkeynes@157:     if( fread(&intc_state, sizeof(intc_state), 1, f) != 1 )
nkeynes@157: 	return -1;
nkeynes@157:     return 0;
nkeynes@157: }
nkeynes@157: 
nkeynes@1: /* We basically maintain a priority queue here, raise_interrupt adds an entry,
nkeynes@265:  * accept_interrupt takes it off. At the moment this is done as a simple
nkeynes@1:  * ordered array, on the basis that in practice there's unlikely to be more
nkeynes@1:  * than one at a time. There are lots of ways to optimize this if it turns out
nkeynes@1:  * to be necessary, but I'd doubt it will be...
nkeynes@1:  */
nkeynes@1: 
nkeynes@1: void intc_raise_interrupt( int which )
nkeynes@1: {
nkeynes@1:     int i, j, pri;
nkeynes@1:     
nkeynes@1:     pri = PRIORITY(which);
nkeynes@1:     if( pri == 0 ) return; /* masked off */
nkeynes@1:     
nkeynes@157:     for( i=0; i<intc_state.num_pending; i++ ) {
nkeynes@157:         if( intc_state.pending[i] == which ) return; /* Don't queue more than once */
nkeynes@157:         if( PRIORITY(intc_state.pending[i]) > pri ||
nkeynes@157:             (PRIORITY(intc_state.pending[i]) == pri &&
nkeynes@157:              intc_state.pending[i] < which))
nkeynes@1:             break;
nkeynes@1:     }
nkeynes@1:     /* i == insertion point */
nkeynes@157:     for( j=intc_state.num_pending; j > i; j-- )
nkeynes@157:         intc_state.pending[j] = intc_state.pending[j-1];
nkeynes@157:     intc_state.pending[i] = which;
nkeynes@1: 
nkeynes@265:     if( i == intc_state.num_pending && (sh4r.sr&SR_BL)==0 && SH4_INTMASK() < pri ) {
nkeynes@265:         sh4r.event_pending = 0;
nkeynes@265: 	sh4r.event_types |= PENDING_IRQ;
nkeynes@265:     }
nkeynes@1: 
nkeynes@157:     intc_state.num_pending++;
nkeynes@1: }
nkeynes@1: 
nkeynes@19: void intc_clear_interrupt( int which )
nkeynes@19: {
nkeynes@20:     int i;
nkeynes@157:     for( i=intc_state.num_pending-1; i>=0; i-- ) {
nkeynes@157: 	if( intc_state.pending[i] == which ) {
nkeynes@20: 	    /* Shift array contents down */
nkeynes@157: 	    while( i < intc_state.num_pending-1 ) {
nkeynes@421: 		intc_state.pending[i] = intc_state.pending[i+1];
nkeynes@421: 		i++;
nkeynes@20: 	    }
nkeynes@157: 	    intc_state.num_pending--;
nkeynes@114: 	    intc_mask_changed();
nkeynes@20: 	    break;
nkeynes@20: 	}
nkeynes@20:     }
nkeynes@20:     
nkeynes@19: }
nkeynes@19: 
nkeynes@1: uint32_t intc_accept_interrupt( void )
nkeynes@1: {
nkeynes@157:     assert(intc_state.num_pending > 0);
nkeynes@157:     return INTCODE(intc_state.pending[intc_state.num_pending-1]);
nkeynes@1: }
nkeynes@1: 
nkeynes@1: void intc_mask_changed( void )
nkeynes@1: {   
nkeynes@157:     if( intc_state.num_pending > 0 && (sh4r.sr&SR_BL)==0 &&
nkeynes@265:         SH4_INTMASK() < PRIORITY(intc_state.pending[intc_state.num_pending-1]) ) {
nkeynes@265:         sh4r.event_pending = 0;
nkeynes@265: 	sh4r.event_types |= PENDING_IRQ ;
nkeynes@265:     }
nkeynes@265:     else {
nkeynes@265: 	sh4r.event_pending = event_get_next_time();
nkeynes@265: 	sh4r.event_types &= (~PENDING_IRQ);
nkeynes@265:     }
nkeynes@1: }
nkeynes@1:     
nkeynes@1: 
nkeynes@1: char *intc_get_interrupt_name( int code )
nkeynes@1: {
nkeynes@1:     return intc_sources[code].name;
nkeynes@1: }