nkeynes@11: /** nkeynes@11: * $Id: aica.c,v 1.1 2005-12-11 12:00:09 nkeynes Exp $ nkeynes@11: * nkeynes@11: * This is the core sound system (ie the bit which does the actual work) nkeynes@11: * nkeynes@11: * Copyright (c) 2005 Nathan Keynes. nkeynes@11: * nkeynes@11: * This program is free software; you can redistribute it and/or modify nkeynes@11: * it under the terms of the GNU General Public License as published by nkeynes@11: * the Free Software Foundation; either version 2 of the License, or nkeynes@11: * (at your option) any later version. nkeynes@11: * nkeynes@11: * This program is distributed in the hope that it will be useful, nkeynes@11: * but WITHOUT ANY WARRANTY; without even the implied warranty of nkeynes@11: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the nkeynes@11: * GNU General Public License for more details. nkeynes@11: */ nkeynes@11: nkeynes@11: #include "dream.h" nkeynes@11: #include "aica.h" nkeynes@11: #define MMIO_IMPL nkeynes@11: #include "aica.h" nkeynes@11: nkeynes@11: MMIO_REGION_READ_DEFFN( AICA0 ) nkeynes@11: MMIO_REGION_READ_DEFFN( AICA1 ) nkeynes@11: MMIO_REGION_READ_DEFFN( AICA2 ) nkeynes@11: nkeynes@11: /** nkeynes@11: * Initialize the AICA subsystem. Note requires that nkeynes@11: */ nkeynes@11: void aica_init( void ) nkeynes@11: { nkeynes@11: register_io_regions( mmio_list_spu ); nkeynes@11: MMIO_NOTRACE(AICA0); nkeynes@11: MMIO_NOTRACE(AICA1); nkeynes@11: arm_mem_init(); nkeynes@11: } nkeynes@11: nkeynes@11: void aica_reset( void ) nkeynes@11: { nkeynes@11: nkeynes@11: } nkeynes@11: nkeynes@11: /** Channel register structure: nkeynes@11: * 00 nkeynes@11: * 04 nkeynes@11: * 08 4 Loop start address nkeynes@11: * 0C 4 Loop end address nkeynes@11: * 10 4 Volume envelope nkeynes@11: * 14 nkeynes@11: * 18 4 Frequency (floating point nkeynes@11: * 1C nkeynes@11: * 20 nkeynes@11: * 24 1 Pan nkeynes@11: * 25 1 ?? nkeynes@11: * 26 nkeynes@11: * 27 nkeynes@11: * 28 1 ?? nkeynes@11: * 29 1 Volume nkeynes@11: * 2C nkeynes@11: * 30 nkeynes@11: * nkeynes@11: nkeynes@11: /* Write to channels 0-31 */ nkeynes@11: void mmio_region_AICA0_write( uint32_t reg, uint32_t val ) nkeynes@11: { nkeynes@11: // aica_write_channel( reg >> 7, reg % 128, val ); nkeynes@11: nkeynes@11: } nkeynes@11: nkeynes@11: /* Write to channels 32-64 */ nkeynes@11: void mmio_region_AICA1_write( uint32_t reg, uint32_t val ) nkeynes@11: { nkeynes@11: // aica_write_channel( (reg >> 7) + 32, reg % 128, val ); nkeynes@11: nkeynes@11: } nkeynes@11: nkeynes@11: /* General registers */ nkeynes@11: void mmio_region_AICA2_write( uint32_t reg, uint32_t val ) nkeynes@11: { nkeynes@11: nkeynes@11: }