nkeynes@1265: /* Instruction printing code for the ARM
nkeynes@1265:    Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
nkeynes@1265:    2004, 2005, 2006, 2007, 2008, 2009, 2010  Free Software Foundation, Inc.
nkeynes@1265:    Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
nkeynes@1265:    Modification by James G. Smith (jsmith@cygnus.co.uk)
nkeynes@1265: 
nkeynes@1265:    This file is part of libopcodes.
nkeynes@1265: 
nkeynes@1265:    This library is free software; you can redistribute it and/or modify
nkeynes@1265:    it under the terms of the GNU General Public License as published by
nkeynes@1265:    the Free Software Foundation; either version 3 of the License, or
nkeynes@1265:    (at your option) any later version.
nkeynes@1265: 
nkeynes@1265:    It is distributed in the hope that it will be useful, but WITHOUT
nkeynes@1265:    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
nkeynes@1265:    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
nkeynes@1265:    License for more details.
nkeynes@1265: 
nkeynes@1265:    You should have received a copy of the GNU General Public License
nkeynes@1265:    along with this program; if not, write to the Free Software
nkeynes@1265:    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
nkeynes@1265:    MA 02110-1301, USA.  */
nkeynes@1265: 
nkeynes@1265: #include "sysdep.h"
nkeynes@1265: 
nkeynes@1265: #include "dis-asm.h"
nkeynes@1265: #include "arm.h"
nkeynes@1265: #include "gettext.h"
nkeynes@1265: #include "safe-ctype.h"
nkeynes@1265: #include "floatformat.h"
nkeynes@1265: 
nkeynes@1265: /* FIXME: Belongs in global header.  */
nkeynes@1265: #ifndef strneq
nkeynes@1265: #define strneq(a,b,n)	(strncmp ((a), (b), (n)) == 0)
nkeynes@1265: #endif
nkeynes@1265: 
nkeynes@1265: #define CONST_STRNEQ(STR1,STR2) (strncmp ((STR1), (STR2), sizeof (STR2) - 1) == 0)
nkeynes@1265: 
nkeynes@1265: #ifndef NUM_ELEM
nkeynes@1265: #define NUM_ELEM(a)     (sizeof (a) / sizeof (a)[0])
nkeynes@1265: #endif
nkeynes@1265: 
nkeynes@1265: /* Cached mapping symbol state.  */
nkeynes@1265: enum map_type
nkeynes@1265: {
nkeynes@1265:   MAP_ARM,
nkeynes@1265:   MAP_THUMB,
nkeynes@1265:   MAP_DATA
nkeynes@1265: };
nkeynes@1265: 
nkeynes@1265: struct arm_private_data
nkeynes@1265: {
nkeynes@1265:   /* The features to use when disassembling optional instructions.  */
nkeynes@1265:   arm_feature_set features;
nkeynes@1265: 
nkeynes@1265:   /* Whether any mapping symbols are present in the provided symbol
nkeynes@1265:      table.  -1 if we do not know yet, otherwise 0 or 1.  */
nkeynes@1265:   int has_mapping_symbols;
nkeynes@1265: 
nkeynes@1265:   /* Track the last type (although this doesn't seem to be useful) */
nkeynes@1265:   enum map_type last_type;
nkeynes@1265: 
nkeynes@1265:   /* Tracking symbol table information */
nkeynes@1265:   int last_mapping_sym;
nkeynes@1265:   bfd_vma last_mapping_addr;
nkeynes@1265: };
nkeynes@1265: 
nkeynes@1265: struct opcode32
nkeynes@1265: {
nkeynes@1265:   unsigned long arch;		/* Architecture defining this insn.  */
nkeynes@1265:   unsigned long value;		/* If arch == 0 then value is a sentinel.  */
nkeynes@1265:   unsigned long mask;		/* Recognise insn if (op & mask) == value.  */
nkeynes@1265:   const char *  assembler;	/* How to disassemble this insn.  */
nkeynes@1265: };
nkeynes@1265: 
nkeynes@1265: struct opcode16
nkeynes@1265: {
nkeynes@1265:   unsigned long arch;		/* Architecture defining this insn.  */
nkeynes@1265:   unsigned short value, mask;	/* Recognise insn if (op & mask) == value.  */
nkeynes@1265:   const char *assembler;	/* How to disassemble this insn.  */
nkeynes@1265: };
nkeynes@1265: 
nkeynes@1265: /* print_insn_coprocessor recognizes the following format control codes:
nkeynes@1265: 
nkeynes@1265:    %%			%
nkeynes@1265: 
nkeynes@1265:    %c			print condition code (always bits 28-31 in ARM mode)
nkeynes@1265:    %q			print shifter argument
nkeynes@1265:    %u			print condition code (unconditional in ARM mode)
nkeynes@1265:    %A			print address for ldc/stc/ldf/stf instruction
nkeynes@1265:    %B			print vstm/vldm register list
nkeynes@1265:    %I                   print cirrus signed shift immediate: bits 0..3|4..6
nkeynes@1265:    %F			print the COUNT field of a LFM/SFM instruction.
nkeynes@1265:    %P			print floating point precision in arithmetic insn
nkeynes@1265:    %Q			print floating point precision in ldf/stf insn
nkeynes@1265:    %R			print floating point rounding mode
nkeynes@1265: 
nkeynes@1265:    %<bitfield>r		print as an ARM register
nkeynes@1265:    %<bitfield>R		as %<>r but r15 is UNPREDICTABLE
nkeynes@1265:    %<bitfield>ru        as %<>r but each u register must be unique.
nkeynes@1265:    %<bitfield>d		print the bitfield in decimal
nkeynes@1265:    %<bitfield>k		print immediate for VFPv3 conversion instruction
nkeynes@1265:    %<bitfield>x		print the bitfield in hex
nkeynes@1265:    %<bitfield>X		print the bitfield as 1 hex digit without leading "0x"
nkeynes@1265:    %<bitfield>f		print a floating point constant if >7 else a
nkeynes@1265: 			floating point register
nkeynes@1265:    %<bitfield>w         print as an iWMMXt width field - [bhwd]ss/us
nkeynes@1265:    %<bitfield>g         print as an iWMMXt 64-bit register
nkeynes@1265:    %<bitfield>G         print as an iWMMXt general purpose or control register
nkeynes@1265:    %<bitfield>D		print as a NEON D register
nkeynes@1265:    %<bitfield>Q		print as a NEON Q register
nkeynes@1265: 
nkeynes@1265:    %y<code>		print a single precision VFP reg.
nkeynes@1265: 			  Codes: 0=>Sm, 1=>Sd, 2=>Sn, 3=>multi-list, 4=>Sm pair
nkeynes@1265:    %z<code>		print a double precision VFP reg
nkeynes@1265: 			  Codes: 0=>Dm, 1=>Dd, 2=>Dn, 3=>multi-list
nkeynes@1265: 
nkeynes@1265:    %<bitfield>'c	print specified char iff bitfield is all ones
nkeynes@1265:    %<bitfield>`c	print specified char iff bitfield is all zeroes
nkeynes@1265:    %<bitfield>?ab...    select from array of values in big endian order
nkeynes@1265:    
nkeynes@1265:    %L			print as an iWMMXt N/M width field.
nkeynes@1265:    %Z			print the Immediate of a WSHUFH instruction.
nkeynes@1265:    %l			like 'A' except use byte offsets for 'B' & 'H'
nkeynes@1265: 			versions.
nkeynes@1265:    %i			print 5-bit immediate in bits 8,3..0
nkeynes@1265: 			(print "32" when 0)
nkeynes@1265:    %r			print register offset address for wldt/wstr instruction.  */
nkeynes@1265: 
nkeynes@1265: enum opcode_sentinel_enum
nkeynes@1265: {
nkeynes@1265:   SENTINEL_IWMMXT_START = 1,
nkeynes@1265:   SENTINEL_IWMMXT_END,
nkeynes@1265:   SENTINEL_GENERIC_START
nkeynes@1265: } opcode_sentinels;
nkeynes@1265: 
nkeynes@1265: #define UNDEFINED_INSTRUCTION      "\t\t; <UNDEFINED> instruction: %0-31x"
nkeynes@1265: #define UNPREDICTABLE_INSTRUCTION  "\t; <UNPREDICTABLE>"
nkeynes@1265: 
nkeynes@1265: /* Common coprocessor opcodes shared between Arm and Thumb-2.  */
nkeynes@1265: 
nkeynes@1265: static const struct opcode32 coprocessor_opcodes[] =
nkeynes@1265: {
nkeynes@1265:   /* XScale instructions.  */
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e200010, 0x0fff0ff0, "mia%c\tacc0, %0-3r, %12-15r"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e280010, 0x0fff0ff0, "miaph%c\tacc0, %0-3r, %12-15r"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e2c0010, 0x0ffc0ff0, "mia%17'T%17`B%16'T%16`B%c\tacc0, %0-3r, %12-15r"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0c400000, 0x0ff00fff, "mar%c\tacc0, %12-15r, %16-19r"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0c500000, 0x0ff00fff, "mra%c\t%12-15r, %16-19r, acc0"},
nkeynes@1265: 
nkeynes@1265:   /* Intel Wireless MMX technology instructions.  */
nkeynes@1265:   { 0, SENTINEL_IWMMXT_START, 0, "" },
nkeynes@1265:   {ARM_CEXT_IWMMXT, 0x0e130130, 0x0f3f0fff, "tandc%22-23w%c\t%12-15r"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e400010, 0x0ff00f3f, "tbcst%6-7w%c\t%16-19g, %12-15r"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e130170, 0x0f3f0ff8, "textrc%22-23w%c\t%12-15r, #%0-2d"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e100070, 0x0f300ff0, "textrm%3?su%22-23w%c\t%12-15r, %16-19g, #%0-2d"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e600010, 0x0ff00f38, "tinsr%6-7w%c\t%16-19g, %12-15r, #%0-2d"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e000110, 0x0ff00fff, "tmcr%c\t%16-19G, %12-15r"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0c400000, 0x0ff00ff0, "tmcrr%c\t%0-3g, %12-15r, %16-19r"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e2c0010, 0x0ffc0e10, "tmia%17?tb%16?tb%c\t%5-8g, %0-3r, %12-15r"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e200010, 0x0fff0e10, "tmia%c\t%5-8g, %0-3r, %12-15r"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e280010, 0x0fff0e10, "tmiaph%c\t%5-8g, %0-3r, %12-15r"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e100030, 0x0f300fff, "tmovmsk%22-23w%c\t%12-15r, %16-19g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e100110, 0x0ff00ff0, "tmrc%c\t%12-15r, %16-19G"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0c500000, 0x0ff00ff0, "tmrrc%c\t%12-15r, %16-19r, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e130150, 0x0f3f0fff, "torc%22-23w%c\t%12-15r"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e120190, 0x0f3f0fff, "torvsc%22-23w%c\t%12-15r"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e2001c0, 0x0f300fff, "wabs%22-23w%c\t%12-15g, %16-19g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e0001c0, 0x0f300fff, "wacc%22-23w%c\t%12-15g, %16-19g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e000180, 0x0f000ff0, "wadd%20-23w%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e2001a0, 0x0fb00ff0, "waddbhus%22?ml%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0ea001a0, 0x0ff00ff0, "waddsubhx%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e000020, 0x0f800ff0, "waligni%c\t%12-15g, %16-19g, %0-3g, #%20-22d"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e800020, 0x0fc00ff0, "walignr%20-21d%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e200000, 0x0fe00ff0, "wand%20'n%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e800000, 0x0fa00ff0, "wavg2%22?hb%20'r%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e400000, 0x0fe00ff0, "wavg4%20'r%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e000060, 0x0f300ff0, "wcmpeq%22-23w%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e100060, 0x0f100ff0, "wcmpgt%21?su%22-23w%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0xfc500100, 0xfe500f00, "wldrd\t%12-15g, %r"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0xfc100100, 0xfe500f00, "wldrw\t%12-15G, %A"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0c100000, 0x0e100e00, "wldr%L%c\t%12-15g, %l"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e400100, 0x0fc00ff0, "wmac%21?su%20'z%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e800100, 0x0fc00ff0, "wmadd%21?su%20'x%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0ec00100, 0x0fd00ff0, "wmadd%21?sun%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e000160, 0x0f100ff0, "wmax%21?su%22-23w%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e000080, 0x0f100fe0, "wmerge%c\t%12-15g, %16-19g, %0-3g, #%21-23d"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e0000a0, 0x0f800ff0, "wmia%21?tb%20?tb%22'n%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e800120, 0x0f800ff0, "wmiaw%21?tb%20?tb%22'n%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e100160, 0x0f100ff0, "wmin%21?su%22-23w%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e000100, 0x0fc00ff0, "wmul%21?su%20?ml%23'r%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0ed00100, 0x0fd00ff0, "wmul%21?sumr%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0ee000c0, 0x0fe00ff0, "wmulwsm%20`r%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0ec000c0, 0x0fe00ff0, "wmulwum%20`r%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0eb000c0, 0x0ff00ff0, "wmulwl%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e8000a0, 0x0f800ff0, "wqmia%21?tb%20?tb%22'n%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e100080, 0x0fd00ff0, "wqmulm%21'r%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0ec000e0, 0x0fd00ff0, "wqmulwm%21'r%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e000000, 0x0ff00ff0, "wor%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e000080, 0x0f000ff0, "wpack%20-23w%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0xfe300040, 0xff300ef0, "wror%22-23w\t%12-15g, %16-19g, #%i"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e300040, 0x0f300ff0, "wror%22-23w%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e300140, 0x0f300ff0, "wror%22-23wg%c\t%12-15g, %16-19g, %0-3G"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e000120, 0x0fa00ff0, "wsad%22?hb%20'z%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e0001e0, 0x0f000ff0, "wshufh%c\t%12-15g, %16-19g, #%Z"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0xfe100040, 0xff300ef0, "wsll%22-23w\t%12-15g, %16-19g, #%i"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e100040, 0x0f300ff0, "wsll%22-23w%8'g%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e100148, 0x0f300ffc, "wsll%22-23w%8'g%c\t%12-15g, %16-19g, %0-3G"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0xfe000040, 0xff300ef0, "wsra%22-23w\t%12-15g, %16-19g, #%i"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e000040, 0x0f300ff0, "wsra%22-23w%8'g%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e000148, 0x0f300ffc, "wsra%22-23w%8'g%c\t%12-15g, %16-19g, %0-3G"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0xfe200040, 0xff300ef0, "wsrl%22-23w\t%12-15g, %16-19g, #%i"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e200040, 0x0f300ff0, "wsrl%22-23w%8'g%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e200148, 0x0f300ffc, "wsrl%22-23w%8'g%c\t%12-15g, %16-19g, %0-3G"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0xfc400100, 0xfe500f00, "wstrd\t%12-15g, %r"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0xfc000100, 0xfe500f00, "wstrw\t%12-15G, %A"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0c000000, 0x0e100e00, "wstr%L%c\t%12-15g, %l"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e0001a0, 0x0f000ff0, "wsub%20-23w%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0ed001c0, 0x0ff00ff0, "wsubaddhx%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e1001c0, 0x0f300ff0, "wabsdiff%22-23w%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e0000c0, 0x0fd00fff, "wunpckeh%21?sub%c\t%12-15g, %16-19g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e4000c0, 0x0fd00fff, "wunpckeh%21?suh%c\t%12-15g, %16-19g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e8000c0, 0x0fd00fff, "wunpckeh%21?suw%c\t%12-15g, %16-19g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e0000e0, 0x0f100fff, "wunpckel%21?su%22-23w%c\t%12-15g, %16-19g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e1000c0, 0x0f300ff0, "wunpckih%22-23w%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e1000e0, 0x0f300ff0, "wunpckil%22-23w%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   {ARM_CEXT_XSCALE, 0x0e100000, 0x0ff00ff0, "wxor%c\t%12-15g, %16-19g, %0-3g"},
nkeynes@1265:   { 0, SENTINEL_IWMMXT_END, 0, "" },
nkeynes@1265: 
nkeynes@1265:   /* Floating point coprocessor (FPA) instructions.  */
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e000100, 0x0ff08f10, "adf%c%P%R\t%12-14f, %16-18f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e100100, 0x0ff08f10, "muf%c%P%R\t%12-14f, %16-18f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e200100, 0x0ff08f10, "suf%c%P%R\t%12-14f, %16-18f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e300100, 0x0ff08f10, "rsf%c%P%R\t%12-14f, %16-18f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e400100, 0x0ff08f10, "dvf%c%P%R\t%12-14f, %16-18f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e500100, 0x0ff08f10, "rdf%c%P%R\t%12-14f, %16-18f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e600100, 0x0ff08f10, "pow%c%P%R\t%12-14f, %16-18f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e700100, 0x0ff08f10, "rpw%c%P%R\t%12-14f, %16-18f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e800100, 0x0ff08f10, "rmf%c%P%R\t%12-14f, %16-18f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e900100, 0x0ff08f10, "fml%c%P%R\t%12-14f, %16-18f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0ea00100, 0x0ff08f10, "fdv%c%P%R\t%12-14f, %16-18f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0eb00100, 0x0ff08f10, "frd%c%P%R\t%12-14f, %16-18f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0ec00100, 0x0ff08f10, "pol%c%P%R\t%12-14f, %16-18f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e008100, 0x0ff08f10, "mvf%c%P%R\t%12-14f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e108100, 0x0ff08f10, "mnf%c%P%R\t%12-14f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e208100, 0x0ff08f10, "abs%c%P%R\t%12-14f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e308100, 0x0ff08f10, "rnd%c%P%R\t%12-14f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e408100, 0x0ff08f10, "sqt%c%P%R\t%12-14f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e508100, 0x0ff08f10, "log%c%P%R\t%12-14f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e608100, 0x0ff08f10, "lgn%c%P%R\t%12-14f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e708100, 0x0ff08f10, "exp%c%P%R\t%12-14f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e808100, 0x0ff08f10, "sin%c%P%R\t%12-14f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e908100, 0x0ff08f10, "cos%c%P%R\t%12-14f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0ea08100, 0x0ff08f10, "tan%c%P%R\t%12-14f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0eb08100, 0x0ff08f10, "asn%c%P%R\t%12-14f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0ec08100, 0x0ff08f10, "acs%c%P%R\t%12-14f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0ed08100, 0x0ff08f10, "atn%c%P%R\t%12-14f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0ee08100, 0x0ff08f10, "urd%c%P%R\t%12-14f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0ef08100, 0x0ff08f10, "nrm%c%P%R\t%12-14f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e000110, 0x0ff00f1f, "flt%c%P%R\t%16-18f, %12-15r"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e100110, 0x0fff0f98, "fix%c%R\t%12-15r, %0-2f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e200110, 0x0fff0fff, "wfs%c\t%12-15r"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e300110, 0x0fff0fff, "rfs%c\t%12-15r"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e400110, 0x0fff0fff, "wfc%c\t%12-15r"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e500110, 0x0fff0fff, "rfc%c\t%12-15r"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0e90f110, 0x0ff8fff0, "cmf%c\t%16-18f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0eb0f110, 0x0ff8fff0, "cnf%c\t%16-18f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0ed0f110, 0x0ff8fff0, "cmfe%c\t%16-18f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0ef0f110, 0x0ff8fff0, "cnfe%c\t%16-18f, %0-3f"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0c000100, 0x0e100f00, "stf%c%Q\t%12-14f, %A"},
nkeynes@1265:   {FPU_FPA_EXT_V1, 0x0c100100, 0x0e100f00, "ldf%c%Q\t%12-14f, %A"},
nkeynes@1265:   {FPU_FPA_EXT_V2, 0x0c000200, 0x0e100f00, "sfm%c\t%12-14f, %F, %A"},
nkeynes@1265:   {FPU_FPA_EXT_V2, 0x0c100200, 0x0e100f00, "lfm%c\t%12-14f, %F, %A"},
nkeynes@1265: 
nkeynes@1265:   /* Register load/store.  */
nkeynes@1265:   {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0d2d0b00, 0x0fbf0f01, "vpush%c\t%B"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0d200b00, 0x0fb00f01, "vstmdb%c\t%16-19r!, %B"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0d300b00, 0x0fb00f01, "vldmdb%c\t%16-19r!, %B"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0c800b00, 0x0f900f01, "vstmia%c\t%16-19r%21'!, %B"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0cbd0b00, 0x0fbf0f01, "vpop%c\t%B"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0c900b00, 0x0f900f01, "vldmia%c\t%16-19r%21'!, %B"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0d000b00, 0x0f300f00, "vstr%c\t%12-15,22D, %A"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0d100b00, 0x0f300f00, "vldr%c\t%12-15,22D, %A"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0d2d0a00, 0x0fbf0f00, "vpush%c\t%y3"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0d200a00, 0x0fb00f00, "vstmdb%c\t%16-19r!, %y3"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0d300a00, 0x0fb00f00, "vldmdb%c\t%16-19r!, %y3"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0c800a00, 0x0f900f00, "vstmia%c\t%16-19r%21'!, %y3"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0cbd0a00, 0x0fbf0f00, "vpop%c\t%y3"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0c900a00, 0x0f900f00, "vldmia%c\t%16-19r%21'!, %y3"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0d000a00, 0x0f300f00, "vstr%c\t%y1, %A"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0d100a00, 0x0f300f00, "vldr%c\t%y1, %A"},
nkeynes@1265: 
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0d200b01, 0x0fb00f01, "fstmdbx%c\t%16-19r!, %z3\t;@ Deprecated"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0d300b01, 0x0fb00f01, "fldmdbx%c\t%16-19r!, %z3\t;@ Deprecated"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0c800b01, 0x0f900f01, "fstmiax%c\t%16-19r%21'!, %z3\t;@ Deprecated"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0c900b01, 0x0f900f01, "fldmiax%c\t%16-19r%21'!, %z3\t;@ Deprecated"},
nkeynes@1265: 
nkeynes@1265:   /* Data transfer between ARM and NEON registers.  */
nkeynes@1265:   {FPU_NEON_EXT_V1, 0x0e800b10, 0x0ff00f70, "vdup%c.32\t%16-19,7D, %12-15r"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0x0e800b30, 0x0ff00f70, "vdup%c.16\t%16-19,7D, %12-15r"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0x0ea00b10, 0x0ff00f70, "vdup%c.32\t%16-19,7Q, %12-15r"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0x0ea00b30, 0x0ff00f70, "vdup%c.16\t%16-19,7Q, %12-15r"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0x0ec00b10, 0x0ff00f70, "vdup%c.8\t%16-19,7D, %12-15r"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0x0ee00b10, 0x0ff00f70, "vdup%c.8\t%16-19,7Q, %12-15r"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0x0c400b10, 0x0ff00fd0, "vmov%c\t%0-3,5D, %12-15r, %16-19r"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0x0c500b10, 0x0ff00fd0, "vmov%c\t%12-15r, %16-19r, %0-3,5D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0x0e000b10, 0x0fd00f70, "vmov%c.32\t%16-19,7D[%21d], %12-15r"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0x0e100b10, 0x0f500f70, "vmov%c.32\t%12-15r, %16-19,7D[%21d]"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0x0e000b30, 0x0fd00f30, "vmov%c.16\t%16-19,7D[%6,21d], %12-15r"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0x0e100b30, 0x0f500f30, "vmov%c.%23?us16\t%12-15r, %16-19,7D[%6,21d]"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0x0e400b10, 0x0fd00f10, "vmov%c.8\t%16-19,7D[%5,6,21d], %12-15r"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0x0e500b10, 0x0f500f10, "vmov%c.%23?us8\t%12-15r, %16-19,7D[%5,6,21d]"},
nkeynes@1265:   /* Half-precision conversion instructions.  */
nkeynes@1265:   {FPU_VFP_EXT_FP16, 0x0eb20a40, 0x0fbf0f50, "vcvt%7?tb%c.f32.f16\t%y1, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_FP16, 0x0eb30a40, 0x0fbf0f50, "vcvt%7?tb%c.f16.f32\t%y1, %y0"},
nkeynes@1265: 
nkeynes@1265:   /* Floating point coprocessor (VFP) instructions.  */
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0ee00a10, 0x0fff0fff, "vmsr%c\tfpsid, %12-15r"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0ee10a10, 0x0fff0fff, "vmsr%c\tfpscr, %12-15r"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0ee60a10, 0x0fff0fff, "vmsr%c\tmvfr1, %12-15r"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0ee70a10, 0x0fff0fff, "vmsr%c\tmvfr0, %12-15r"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0ee80a10, 0x0fff0fff, "vmsr%c\tfpexc, %12-15r"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0ee90a10, 0x0fff0fff, "vmsr%c\tfpinst, %12-15r\t@ Impl def"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0eea0a10, 0x0fff0fff, "vmsr%c\tfpinst2, %12-15r\t@ Impl def"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0ef00a10, 0x0fff0fff, "vmrs%c\t%12-15r, fpsid"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0ef1fa10, 0x0fffffff, "vmrs%c\tAPSR_nzcv, fpscr"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0ef10a10, 0x0fff0fff, "vmrs%c\t%12-15r, fpscr"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0ef60a10, 0x0fff0fff, "vmrs%c\t%12-15r, mvfr1"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0ef70a10, 0x0fff0fff, "vmrs%c\t%12-15r, mvfr0"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0ef80a10, 0x0fff0fff, "vmrs%c\t%12-15r, fpexc"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0ef90a10, 0x0fff0fff, "vmrs%c\t%12-15r, fpinst\t@ Impl def"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0efa0a10, 0x0fff0fff, "vmrs%c\t%12-15r, fpinst2\t@ Impl def"},
nkeynes@1265:   {FPU_VFP_EXT_V1, 0x0e000b10, 0x0fd00fff, "vmov%c.32\t%z2[%21d], %12-15r"},
nkeynes@1265:   {FPU_VFP_EXT_V1, 0x0e100b10, 0x0fd00fff, "vmov%c.32\t%12-15r, %z2[%21d]"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0ee00a10, 0x0ff00fff, "vmsr%c\t<impl def %16-19x>, %12-15r"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0ef00a10, 0x0ff00fff, "vmrs%c\t%12-15r, <impl def %16-19x>"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0e000a10, 0x0ff00f7f, "vmov%c\t%y2, %12-15r"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0e100a10, 0x0ff00f7f, "vmov%c\t%12-15r, %y2"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0eb50a40, 0x0fbf0f70, "vcmp%7'e%c.f32\t%y1, #0.0"},
nkeynes@1265:   {FPU_VFP_EXT_V1, 0x0eb50b40, 0x0fbf0f70, "vcmp%7'e%c.f64\t%z1, #0.0"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0eb00a40, 0x0fbf0fd0, "vmov%c.f32\t%y1, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0eb00ac0, 0x0fbf0fd0, "vabs%c.f32\t%y1, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_V1, 0x0eb00b40, 0x0fbf0fd0, "vmov%c.f64\t%z1, %z0"},
nkeynes@1265:   {FPU_VFP_EXT_V1, 0x0eb00bc0, 0x0fbf0fd0, "vabs%c.f64\t%z1, %z0"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0eb10a40, 0x0fbf0fd0, "vneg%c.f32\t%y1, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0eb10ac0, 0x0fbf0fd0, "vsqrt%c.f32\t%y1, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_V1, 0x0eb10b40, 0x0fbf0fd0, "vneg%c.f64\t%z1, %z0"},
nkeynes@1265:   {FPU_VFP_EXT_V1, 0x0eb10bc0, 0x0fbf0fd0, "vsqrt%c.f64\t%z1, %z0"},
nkeynes@1265:   {FPU_VFP_EXT_V1, 0x0eb70ac0, 0x0fbf0fd0, "vcvt%c.f64.f32\t%z1, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_V1, 0x0eb70bc0, 0x0fbf0fd0, "vcvt%c.f32.f64\t%y1, %z0"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0eb80a40, 0x0fbf0f50, "vcvt%c.f32.%7?su32\t%y1, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_V1, 0x0eb80b40, 0x0fbf0f50, "vcvt%c.f64.%7?su32\t%z1, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0eb40a40, 0x0fbf0f50, "vcmp%7'e%c.f32\t%y1, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_V1, 0x0eb40b40, 0x0fbf0f50, "vcmp%7'e%c.f64\t%z1, %z0"},
nkeynes@1265:   {FPU_VFP_EXT_V3xD, 0x0eba0a40, 0x0fbe0f50, "vcvt%c.f32.%16?us%7?31%7?26\t%y1, %y1, #%5,0-3k"},
nkeynes@1265:   {FPU_VFP_EXT_V3, 0x0eba0b40, 0x0fbe0f50, "vcvt%c.f64.%16?us%7?31%7?26\t%z1, %z1, #%5,0-3k"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0ebc0a40, 0x0fbe0f50, "vcvt%7`r%c.%16?su32.f32\t%y1, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_V1, 0x0ebc0b40, 0x0fbe0f50, "vcvt%7`r%c.%16?su32.f64\t%y1, %z0"},
nkeynes@1265:   {FPU_VFP_EXT_V3xD, 0x0ebe0a40, 0x0fbe0f50, "vcvt%c.%16?us%7?31%7?26.f32\t%y1, %y1, #%5,0-3k"},
nkeynes@1265:   {FPU_VFP_EXT_V3, 0x0ebe0b40, 0x0fbe0f50, "vcvt%c.%16?us%7?31%7?26.f64\t%z1, %z1, #%5,0-3k"},
nkeynes@1265:   {FPU_VFP_EXT_V1, 0x0c500b10, 0x0fb00ff0, "vmov%c\t%12-15r, %16-19r, %z0"},
nkeynes@1265:   {FPU_VFP_EXT_V3xD, 0x0eb00a00, 0x0fb00ff0, "vmov%c.f32\t%y1, #%0-3,16-19d"},
nkeynes@1265:   {FPU_VFP_EXT_V3, 0x0eb00b00, 0x0fb00ff0, "vmov%c.f64\t%z1, #%0-3,16-19d"},
nkeynes@1265:   {FPU_VFP_EXT_V2, 0x0c400a10, 0x0ff00fd0, "vmov%c\t%y4, %12-15r, %16-19r"},
nkeynes@1265:   {FPU_VFP_EXT_V2, 0x0c400b10, 0x0ff00fd0, "vmov%c\t%z0, %12-15r, %16-19r"},
nkeynes@1265:   {FPU_VFP_EXT_V2, 0x0c500a10, 0x0ff00fd0, "vmov%c\t%12-15r, %16-19r, %y4"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0e000a00, 0x0fb00f50, "vmla%c.f32\t%y1, %y2, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0e000a40, 0x0fb00f50, "vmls%c.f32\t%y1, %y2, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_V1, 0x0e000b00, 0x0fb00f50, "vmla%c.f64\t%z1, %z2, %z0"},
nkeynes@1265:   {FPU_VFP_EXT_V1, 0x0e000b40, 0x0fb00f50, "vmls%c.f64\t%z1, %z2, %z0"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0e100a00, 0x0fb00f50, "vnmls%c.f32\t%y1, %y2, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0e100a40, 0x0fb00f50, "vnmla%c.f32\t%y1, %y2, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_V1, 0x0e100b00, 0x0fb00f50, "vnmls%c.f64\t%z1, %z2, %z0"},
nkeynes@1265:   {FPU_VFP_EXT_V1, 0x0e100b40, 0x0fb00f50, "vnmla%c.f64\t%z1, %z2, %z0"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0e200a00, 0x0fb00f50, "vmul%c.f32\t%y1, %y2, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0e200a40, 0x0fb00f50, "vnmul%c.f32\t%y1, %y2, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_V1, 0x0e200b00, 0x0fb00f50, "vmul%c.f64\t%z1, %z2, %z0"},
nkeynes@1265:   {FPU_VFP_EXT_V1, 0x0e200b40, 0x0fb00f50, "vnmul%c.f64\t%z1, %z2, %z0"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0e300a00, 0x0fb00f50, "vadd%c.f32\t%y1, %y2, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0e300a40, 0x0fb00f50, "vsub%c.f32\t%y1, %y2, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_V1, 0x0e300b00, 0x0fb00f50, "vadd%c.f64\t%z1, %z2, %z0"},
nkeynes@1265:   {FPU_VFP_EXT_V1, 0x0e300b40, 0x0fb00f50, "vsub%c.f64\t%z1, %z2, %z0"},
nkeynes@1265:   {FPU_VFP_EXT_V1xD, 0x0e800a00, 0x0fb00f50, "vdiv%c.f32\t%y1, %y2, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_V1, 0x0e800b00, 0x0fb00f50, "vdiv%c.f64\t%z1, %z2, %z0"},
nkeynes@1265: 
nkeynes@1265:   /* Cirrus coprocessor instructions.  */
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0d100400, 0x0f500f00, "cfldrs%c\tmvf%12-15d, %A"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0c100400, 0x0f500f00, "cfldrs%c\tmvf%12-15d, %A"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0d500400, 0x0f500f00, "cfldrd%c\tmvd%12-15d, %A"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0c500400, 0x0f500f00, "cfldrd%c\tmvd%12-15d, %A"}, 
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0d100500, 0x0f500f00, "cfldr32%c\tmvfx%12-15d, %A"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0c100500, 0x0f500f00, "cfldr32%c\tmvfx%12-15d, %A"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0d500500, 0x0f500f00, "cfldr64%c\tmvdx%12-15d, %A"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0c500500, 0x0f500f00, "cfldr64%c\tmvdx%12-15d, %A"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0d000400, 0x0f500f00, "cfstrs%c\tmvf%12-15d, %A"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0c000400, 0x0f500f00, "cfstrs%c\tmvf%12-15d, %A"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0d400400, 0x0f500f00, "cfstrd%c\tmvd%12-15d, %A"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0c400400, 0x0f500f00, "cfstrd%c\tmvd%12-15d, %A"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0d000500, 0x0f500f00, "cfstr32%c\tmvfx%12-15d, %A"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0c000500, 0x0f500f00, "cfstr32%c\tmvfx%12-15d, %A"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0d400500, 0x0f500f00, "cfstr64%c\tmvdx%12-15d, %A"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0c400500, 0x0f500f00, "cfstr64%c\tmvdx%12-15d, %A"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e000450, 0x0ff00ff0, "cfmvsr%c\tmvf%16-19d, %12-15r"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e100450, 0x0ff00ff0, "cfmvrs%c\t%12-15r, mvf%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e000410, 0x0ff00ff0, "cfmvdlr%c\tmvd%16-19d, %12-15r"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e100410, 0x0ff00ff0, "cfmvrdl%c\t%12-15r, mvd%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e000430, 0x0ff00ff0, "cfmvdhr%c\tmvd%16-19d, %12-15r"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e100430, 0x0ff00fff, "cfmvrdh%c\t%12-15r, mvd%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e000510, 0x0ff00fff, "cfmv64lr%c\tmvdx%16-19d, %12-15r"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e100510, 0x0ff00fff, "cfmvr64l%c\t%12-15r, mvdx%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e000530, 0x0ff00fff, "cfmv64hr%c\tmvdx%16-19d, %12-15r"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e100530, 0x0ff00fff, "cfmvr64h%c\t%12-15r, mvdx%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e200440, 0x0ff00fff, "cfmval32%c\tmvax%12-15d, mvfx%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e100440, 0x0ff00fff, "cfmv32al%c\tmvfx%12-15d, mvax%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e200460, 0x0ff00fff, "cfmvam32%c\tmvax%12-15d, mvfx%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e100460, 0x0ff00fff, "cfmv32am%c\tmvfx%12-15d, mvax%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e200480, 0x0ff00fff, "cfmvah32%c\tmvax%12-15d, mvfx%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e100480, 0x0ff00fff, "cfmv32ah%c\tmvfx%12-15d, mvax%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e2004a0, 0x0ff00fff, "cfmva32%c\tmvax%12-15d, mvfx%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e1004a0, 0x0ff00fff, "cfmv32a%c\tmvfx%12-15d, mvax%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e2004c0, 0x0ff00fff, "cfmva64%c\tmvax%12-15d, mvdx%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e1004c0, 0x0ff00fff, "cfmv64a%c\tmvdx%12-15d, mvax%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e2004e0, 0x0fff0fff, "cfmvsc32%c\tdspsc, mvdx%12-15d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e1004e0, 0x0fff0fff, "cfmv32sc%c\tmvdx%12-15d, dspsc"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e000400, 0x0ff00fff, "cfcpys%c\tmvf%12-15d, mvf%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e000420, 0x0ff00fff, "cfcpyd%c\tmvd%12-15d, mvd%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e000460, 0x0ff00fff, "cfcvtsd%c\tmvd%12-15d, mvf%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e000440, 0x0ff00fff, "cfcvtds%c\tmvf%12-15d, mvd%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e000480, 0x0ff00fff, "cfcvt32s%c\tmvf%12-15d, mvfx%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e0004a0, 0x0ff00fff, "cfcvt32d%c\tmvd%12-15d, mvfx%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e0004c0, 0x0ff00fff, "cfcvt64s%c\tmvf%12-15d, mvdx%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e0004e0, 0x0ff00fff, "cfcvt64d%c\tmvd%12-15d, mvdx%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e100580, 0x0ff00fff, "cfcvts32%c\tmvfx%12-15d, mvf%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e1005a0, 0x0ff00fff, "cfcvtd32%c\tmvfx%12-15d, mvd%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e1005c0, 0x0ff00fff, "cftruncs32%c\tmvfx%12-15d, mvf%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e1005e0, 0x0ff00fff, "cftruncd32%c\tmvfx%12-15d, mvd%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e000550, 0x0ff00ff0, "cfrshl32%c\tmvfx%16-19d, mvfx%0-3d, %12-15r"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e000570, 0x0ff00ff0, "cfrshl64%c\tmvdx%16-19d, mvdx%0-3d, %12-15r"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e000500, 0x0ff00f10, "cfsh32%c\tmvfx%12-15d, mvfx%16-19d, #%I"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e200500, 0x0ff00f10, "cfsh64%c\tmvdx%12-15d, mvdx%16-19d, #%I"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e100490, 0x0ff00ff0, "cfcmps%c\t%12-15r, mvf%16-19d, mvf%0-3d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e1004b0, 0x0ff00ff0, "cfcmpd%c\t%12-15r, mvd%16-19d, mvd%0-3d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e100590, 0x0ff00ff0, "cfcmp32%c\t%12-15r, mvfx%16-19d, mvfx%0-3d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e1005b0, 0x0ff00ff0, "cfcmp64%c\t%12-15r, mvdx%16-19d, mvdx%0-3d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e300400, 0x0ff00fff, "cfabss%c\tmvf%12-15d, mvf%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e300420, 0x0ff00fff, "cfabsd%c\tmvd%12-15d, mvd%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e300440, 0x0ff00fff, "cfnegs%c\tmvf%12-15d, mvf%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e300460, 0x0ff00fff, "cfnegd%c\tmvd%12-15d, mvd%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e300480, 0x0ff00ff0, "cfadds%c\tmvf%12-15d, mvf%16-19d, mvf%0-3d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e3004a0, 0x0ff00ff0, "cfaddd%c\tmvd%12-15d, mvd%16-19d, mvd%0-3d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e3004c0, 0x0ff00ff0, "cfsubs%c\tmvf%12-15d, mvf%16-19d, mvf%0-3d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e3004e0, 0x0ff00ff0, "cfsubd%c\tmvd%12-15d, mvd%16-19d, mvd%0-3d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e100400, 0x0ff00ff0, "cfmuls%c\tmvf%12-15d, mvf%16-19d, mvf%0-3d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e100420, 0x0ff00ff0, "cfmuld%c\tmvd%12-15d, mvd%16-19d, mvd%0-3d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e300500, 0x0ff00fff, "cfabs32%c\tmvfx%12-15d, mvfx%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e300520, 0x0ff00fff, "cfabs64%c\tmvdx%12-15d, mvdx%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e300540, 0x0ff00fff, "cfneg32%c\tmvfx%12-15d, mvfx%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e300560, 0x0ff00fff, "cfneg64%c\tmvdx%12-15d, mvdx%16-19d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e300580, 0x0ff00ff0, "cfadd32%c\tmvfx%12-15d, mvfx%16-19d, mvfx%0-3d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e3005a0, 0x0ff00ff0, "cfadd64%c\tmvdx%12-15d, mvdx%16-19d, mvdx%0-3d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e3005c0, 0x0ff00ff0, "cfsub32%c\tmvfx%12-15d, mvfx%16-19d, mvfx%0-3d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e3005e0, 0x0ff00ff0, "cfsub64%c\tmvdx%12-15d, mvdx%16-19d, mvdx%0-3d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e100500, 0x0ff00ff0, "cfmul32%c\tmvfx%12-15d, mvfx%16-19d, mvfx%0-3d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e100520, 0x0ff00ff0, "cfmul64%c\tmvdx%12-15d, mvdx%16-19d, mvdx%0-3d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e100540, 0x0ff00ff0, "cfmac32%c\tmvfx%12-15d, mvfx%16-19d, mvfx%0-3d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e100560, 0x0ff00ff0, "cfmsc32%c\tmvfx%12-15d, mvfx%16-19d, mvfx%0-3d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e000600, 0x0ff00f10, "cfmadd32%c\tmvax%5-7d, mvfx%12-15d, mvfx%16-19d, mvfx%0-3d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e100600, 0x0ff00f10, "cfmsub32%c\tmvax%5-7d, mvfx%12-15d, mvfx%16-19d, mvfx%0-3d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e200600, 0x0ff00f10, "cfmadda32%c\tmvax%5-7d, mvax%12-15d, mvfx%16-19d, mvfx%0-3d"},
nkeynes@1265:   {ARM_CEXT_MAVERICK, 0x0e300600, 0x0ff00f10, "cfmsuba32%c\tmvax%5-7d, mvax%12-15d, mvfx%16-19d, mvfx%0-3d"},
nkeynes@1265: 
nkeynes@1265:   /* VFP Fused multiply add instructions.  */
nkeynes@1265:   {FPU_VFP_EXT_FMA, 0x0ea00a00, 0x0fb00f50, "vfma%c.f32\t%y1, %y2, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_FMA, 0x0ea00b00, 0x0fb00f50, "vfma%c.f64\t%z1, %z2, %z0"},
nkeynes@1265:   {FPU_VFP_EXT_FMA, 0x0ea00a40, 0x0fb00f50, "vfms%c.f32\t%y1, %y2, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_FMA, 0x0ea00b40, 0x0fb00f50, "vfms%c.f64\t%z1, %z2, %z0"},
nkeynes@1265:   {FPU_VFP_EXT_FMA, 0x0e900a40, 0x0fb00f50, "vfnma%c.f32\t%y1, %y2, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_FMA, 0x0e900b40, 0x0fb00f50, "vfnma%c.f64\t%z1, %z2, %z0"},
nkeynes@1265:   {FPU_VFP_EXT_FMA, 0x0e900a00, 0x0fb00f50, "vfnms%c.f32\t%y1, %y2, %y0"},
nkeynes@1265:   {FPU_VFP_EXT_FMA, 0x0e900b00, 0x0fb00f50, "vfnms%c.f64\t%z1, %z2, %z0"},
nkeynes@1265: 
nkeynes@1265:   /* Generic coprocessor instructions.  */
nkeynes@1265:   { 0, SENTINEL_GENERIC_START, 0, "" },
nkeynes@1265:   {ARM_EXT_V5E, 0x0c400000, 0x0ff00000, "mcrr%c\t%8-11d, %4-7d, %12-15R, %16-19r, cr%0-3d"},
nkeynes@1265:   {ARM_EXT_V5E, 0x0c500000, 0x0ff00000, "mrrc%c\t%8-11d, %4-7d, %12-15Ru, %16-19Ru, cr%0-3d"},
nkeynes@1265:   {ARM_EXT_V2, 0x0e000000, 0x0f000010, "cdp%c\t%8-11d, %20-23d, cr%12-15d, cr%16-19d, cr%0-3d, {%5-7d}"},
nkeynes@1265:   {ARM_EXT_V2, 0x0e10f010, 0x0f10f010, "mrc%c\t%8-11d, %21-23d, APSR_nzcv, cr%16-19d, cr%0-3d, {%5-7d}"},
nkeynes@1265:   {ARM_EXT_V2, 0x0e100010, 0x0f100010, "mrc%c\t%8-11d, %21-23d, %12-15r, cr%16-19d, cr%0-3d, {%5-7d}"},
nkeynes@1265:   {ARM_EXT_V2, 0x0e000010, 0x0f100010, "mcr%c\t%8-11d, %21-23d, %12-15R, cr%16-19d, cr%0-3d, {%5-7d}"},
nkeynes@1265:   {ARM_EXT_V2, 0x0c000000, 0x0e100000, "stc%22'l%c\t%8-11d, cr%12-15d, %A"},
nkeynes@1265:   {ARM_EXT_V2, 0x0c100000, 0x0e100000, "ldc%22'l%c\t%8-11d, cr%12-15d, %A"},
nkeynes@1265: 
nkeynes@1265:   /* V6 coprocessor instructions.  */
nkeynes@1265:   {ARM_EXT_V6, 0xfc500000, 0xfff00000, "mrrc2%c\t%8-11d, %4-7d, %12-15Ru, %16-19Ru, cr%0-3d"},
nkeynes@1265:   {ARM_EXT_V6, 0xfc400000, 0xfff00000, "mcrr2%c\t%8-11d, %4-7d, %12-15R, %16-19R, cr%0-3d"},
nkeynes@1265: 
nkeynes@1265:   /* V5 coprocessor instructions.  */
nkeynes@1265:   {ARM_EXT_V5, 0xfc100000, 0xfe100000, "ldc2%22'l%c\t%8-11d, cr%12-15d, %A"},
nkeynes@1265:   {ARM_EXT_V5, 0xfc000000, 0xfe100000, "stc2%22'l%c\t%8-11d, cr%12-15d, %A"},
nkeynes@1265:   {ARM_EXT_V5, 0xfe000000, 0xff000010, "cdp2%c\t%8-11d, %20-23d, cr%12-15d, cr%16-19d, cr%0-3d, {%5-7d}"},
nkeynes@1265:   {ARM_EXT_V5, 0xfe000010, 0xff100010, "mcr2%c\t%8-11d, %21-23d, %12-15R, cr%16-19d, cr%0-3d, {%5-7d}"},
nkeynes@1265:   {ARM_EXT_V5, 0xfe100010, 0xff100010, "mrc2%c\t%8-11d, %21-23d, %12-15r, cr%16-19d, cr%0-3d, {%5-7d}"},
nkeynes@1265: 
nkeynes@1265:   {0, 0, 0, 0}
nkeynes@1265: };
nkeynes@1265: 
nkeynes@1265: /* Neon opcode table:  This does not encode the top byte -- that is
nkeynes@1265:    checked by the print_insn_neon routine, as it depends on whether we are
nkeynes@1265:    doing thumb32 or arm32 disassembly.  */
nkeynes@1265: 
nkeynes@1265: /* print_insn_neon recognizes the following format control codes:
nkeynes@1265: 
nkeynes@1265:    %%			%
nkeynes@1265: 
nkeynes@1265:    %c			print condition code
nkeynes@1265:    %A			print v{st,ld}[1234] operands
nkeynes@1265:    %B			print v{st,ld}[1234] any one operands
nkeynes@1265:    %C			print v{st,ld}[1234] single->all operands
nkeynes@1265:    %D			print scalar
nkeynes@1265:    %E			print vmov, vmvn, vorr, vbic encoded constant
nkeynes@1265:    %F			print vtbl,vtbx register list
nkeynes@1265: 
nkeynes@1265:    %<bitfield>r		print as an ARM register
nkeynes@1265:    %<bitfield>d		print the bitfield in decimal
nkeynes@1265:    %<bitfield>e         print the 2^N - bitfield in decimal
nkeynes@1265:    %<bitfield>D		print as a NEON D register
nkeynes@1265:    %<bitfield>Q		print as a NEON Q register
nkeynes@1265:    %<bitfield>R		print as a NEON D or Q register
nkeynes@1265:    %<bitfield>Sn	print byte scaled width limited by n
nkeynes@1265:    %<bitfield>Tn	print short scaled width limited by n
nkeynes@1265:    %<bitfield>Un	print long scaled width limited by n
nkeynes@1265:    
nkeynes@1265:    %<bitfield>'c	print specified char iff bitfield is all ones
nkeynes@1265:    %<bitfield>`c	print specified char iff bitfield is all zeroes
nkeynes@1265:    %<bitfield>?ab...    select from array of values in big endian order.  */
nkeynes@1265: 
nkeynes@1265: static const struct opcode32 neon_opcodes[] =
nkeynes@1265: {
nkeynes@1265:   /* Extract.  */
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2b00840, 0xffb00850, "vext%c.8\t%12-15,22R, %16-19,7R, %0-3,5R, #%8-11d"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2b00000, 0xffb00810, "vext%c.8\t%12-15,22R, %16-19,7R, %0-3,5R, #%8-11d"},
nkeynes@1265: 
nkeynes@1265:   /* Move data element to all lanes.  */
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b40c00, 0xffb70f90, "vdup%c.32\t%12-15,22R, %0-3,5D[%19d]"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b20c00, 0xffb30f90, "vdup%c.16\t%12-15,22R, %0-3,5D[%18-19d]"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b10c00, 0xffb10f90, "vdup%c.8\t%12-15,22R, %0-3,5D[%17-19d]"},
nkeynes@1265: 
nkeynes@1265:   /* Table lookup.  */
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b00800, 0xffb00c50, "vtbl%c.8\t%12-15,22D, %F, %0-3,5D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b00840, 0xffb00c50, "vtbx%c.8\t%12-15,22D, %F, %0-3,5D"},
nkeynes@1265:   
nkeynes@1265:   /* Half-precision conversions.  */
nkeynes@1265:   {FPU_VFP_EXT_FP16, 0xf3b60600, 0xffbf0fd0, "vcvt%c.f16.f32\t%12-15,22D, %0-3,5Q"},
nkeynes@1265:   {FPU_VFP_EXT_FP16, 0xf3b60700, 0xffbf0fd0, "vcvt%c.f32.f16\t%12-15,22Q, %0-3,5D"},
nkeynes@1265: 
nkeynes@1265:   /* NEON fused multiply add instructions.  */
nkeynes@1265:   {FPU_NEON_EXT_FMA, 0xf2000c10, 0xffa00f10, "vfma%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_FMA, 0xf2200c10, 0xffa00f10, "vfms%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265: 
nkeynes@1265:   /* Two registers, miscellaneous.  */
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2880a10, 0xfebf0fd0, "vmovl%c.%24?us8\t%12-15,22Q, %0-3,5D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2900a10, 0xfebf0fd0, "vmovl%c.%24?us16\t%12-15,22Q, %0-3,5D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2a00a10, 0xfebf0fd0, "vmovl%c.%24?us32\t%12-15,22Q, %0-3,5D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b00500, 0xffbf0f90, "vcnt%c.8\t%12-15,22R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b00580, 0xffbf0f90, "vmvn%c\t%12-15,22R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b20000, 0xffbf0f90, "vswp%c\t%12-15,22R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b20200, 0xffb30fd0, "vmovn%c.i%18-19T2\t%12-15,22D, %0-3,5Q"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b20240, 0xffb30fd0, "vqmovun%c.s%18-19T2\t%12-15,22D, %0-3,5Q"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b20280, 0xffb30fd0, "vqmovn%c.s%18-19T2\t%12-15,22D, %0-3,5Q"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b202c0, 0xffb30fd0, "vqmovn%c.u%18-19T2\t%12-15,22D, %0-3,5Q"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b20300, 0xffb30fd0, "vshll%c.i%18-19S2\t%12-15,22Q, %0-3,5D, #%18-19S2"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3bb0400, 0xffbf0e90, "vrecpe%c.%8?fu%18-19S2\t%12-15,22R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3bb0480, 0xffbf0e90, "vrsqrte%c.%8?fu%18-19S2\t%12-15,22R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b00000, 0xffb30f90, "vrev64%c.%18-19S2\t%12-15,22R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b00080, 0xffb30f90, "vrev32%c.%18-19S2\t%12-15,22R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b00100, 0xffb30f90, "vrev16%c.%18-19S2\t%12-15,22R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b00400, 0xffb30f90, "vcls%c.s%18-19S2\t%12-15,22R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b00480, 0xffb30f90, "vclz%c.i%18-19S2\t%12-15,22R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b00700, 0xffb30f90, "vqabs%c.s%18-19S2\t%12-15,22R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b00780, 0xffb30f90, "vqneg%c.s%18-19S2\t%12-15,22R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b20080, 0xffb30f90, "vtrn%c.%18-19S2\t%12-15,22R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b20100, 0xffb30f90, "vuzp%c.%18-19S2\t%12-15,22R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b20180, 0xffb30f90, "vzip%c.%18-19S2\t%12-15,22R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b10000, 0xffb30b90, "vcgt%c.%10?fs%18-19S2\t%12-15,22R, %0-3,5R, #0"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b10080, 0xffb30b90, "vcge%c.%10?fs%18-19S2\t%12-15,22R, %0-3,5R, #0"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b10100, 0xffb30b90, "vceq%c.%10?fi%18-19S2\t%12-15,22R, %0-3,5R, #0"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b10180, 0xffb30b90, "vcle%c.%10?fs%18-19S2\t%12-15,22R, %0-3,5R, #0"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b10200, 0xffb30b90, "vclt%c.%10?fs%18-19S2\t%12-15,22R, %0-3,5R, #0"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b10300, 0xffb30b90, "vabs%c.%10?fs%18-19S2\t%12-15,22R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b10380, 0xffb30b90, "vneg%c.%10?fs%18-19S2\t%12-15,22R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b00200, 0xffb30f10, "vpaddl%c.%7?us%18-19S2\t%12-15,22R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b00600, 0xffb30f10, "vpadal%c.%7?us%18-19S2\t%12-15,22R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3b30600, 0xffb30e10, "vcvt%c.%7-8?usff%18-19Sa.%7-8?ffus%18-19Sa\t%12-15,22R, %0-3,5R"},
nkeynes@1265: 
nkeynes@1265:   /* Three registers of the same length.  */
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000110, 0xffb00f10, "vand%c\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2100110, 0xffb00f10, "vbic%c\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2200110, 0xffb00f10, "vorr%c\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2300110, 0xffb00f10, "vorn%c\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3000110, 0xffb00f10, "veor%c\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3100110, 0xffb00f10, "vbsl%c\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3200110, 0xffb00f10, "vbit%c\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3300110, 0xffb00f10, "vbif%c\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000d00, 0xffa00f10, "vadd%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000d10, 0xffa00f10, "vmla%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000e00, 0xffa00f10, "vceq%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000f00, 0xffa00f10, "vmax%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000f10, 0xffa00f10, "vrecps%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2200d00, 0xffa00f10, "vsub%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2200d10, 0xffa00f10, "vmls%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2200f00, 0xffa00f10, "vmin%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2200f10, 0xffa00f10, "vrsqrts%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3000d00, 0xffa00f10, "vpadd%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3000d10, 0xffa00f10, "vmul%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3000e00, 0xffa00f10, "vcge%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3000e10, 0xffa00f10, "vacge%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3000f00, 0xffa00f10, "vpmax%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3200d00, 0xffa00f10, "vabd%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3200e00, 0xffa00f10, "vcgt%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3200e10, 0xffa00f10, "vacgt%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3200f00, 0xffa00f10, "vpmin%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000800, 0xff800f10, "vadd%c.i%20-21S3\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000810, 0xff800f10, "vtst%c.%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000900, 0xff800f10, "vmla%c.i%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000b00, 0xff800f10, "vqdmulh%c.s%20-21S6\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000b10, 0xff800f10, "vpadd%c.i%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3000800, 0xff800f10, "vsub%c.i%20-21S3\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3000810, 0xff800f10, "vceq%c.i%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3000900, 0xff800f10, "vmls%c.i%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3000b00, 0xff800f10, "vqrdmulh%c.s%20-21S6\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000000, 0xfe800f10, "vhadd%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000010, 0xfe800f10, "vqadd%c.%24?us%20-21S3\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000100, 0xfe800f10, "vrhadd%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000200, 0xfe800f10, "vhsub%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000210, 0xfe800f10, "vqsub%c.%24?us%20-21S3\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000300, 0xfe800f10, "vcgt%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000310, 0xfe800f10, "vcge%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000400, 0xfe800f10, "vshl%c.%24?us%20-21S3\t%12-15,22R, %0-3,5R, %16-19,7R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000410, 0xfe800f10, "vqshl%c.%24?us%20-21S3\t%12-15,22R, %0-3,5R, %16-19,7R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000500, 0xfe800f10, "vrshl%c.%24?us%20-21S3\t%12-15,22R, %0-3,5R, %16-19,7R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000510, 0xfe800f10, "vqrshl%c.%24?us%20-21S3\t%12-15,22R, %0-3,5R, %16-19,7R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000600, 0xfe800f10, "vmax%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000610, 0xfe800f10, "vmin%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000700, 0xfe800f10, "vabd%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000710, 0xfe800f10, "vaba%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000910, 0xfe800f10, "vmul%c.%24?pi%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000a00, 0xfe800f10, "vpmax%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2000a10, 0xfe800f10, "vpmin%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
nkeynes@1265: 
nkeynes@1265:   /* One register and an immediate value.  */
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800e10, 0xfeb80fb0, "vmov%c.i8\t%12-15,22R, %E"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800e30, 0xfeb80fb0, "vmov%c.i64\t%12-15,22R, %E"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800f10, 0xfeb80fb0, "vmov%c.f32\t%12-15,22R, %E"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800810, 0xfeb80db0, "vmov%c.i16\t%12-15,22R, %E"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800830, 0xfeb80db0, "vmvn%c.i16\t%12-15,22R, %E"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800910, 0xfeb80db0, "vorr%c.i16\t%12-15,22R, %E"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800930, 0xfeb80db0, "vbic%c.i16\t%12-15,22R, %E"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800c10, 0xfeb80eb0, "vmov%c.i32\t%12-15,22R, %E"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800c30, 0xfeb80eb0, "vmvn%c.i32\t%12-15,22R, %E"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800110, 0xfeb809b0, "vorr%c.i32\t%12-15,22R, %E"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800130, 0xfeb809b0, "vbic%c.i32\t%12-15,22R, %E"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800010, 0xfeb808b0, "vmov%c.i32\t%12-15,22R, %E"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800030, 0xfeb808b0, "vmvn%c.i32\t%12-15,22R, %E"},
nkeynes@1265: 
nkeynes@1265:   /* Two registers and a shift amount.  */
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2880810, 0xffb80fd0, "vshrn%c.i16\t%12-15,22D, %0-3,5Q, #%16-18e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2880850, 0xffb80fd0, "vrshrn%c.i16\t%12-15,22D, %0-3,5Q, #%16-18e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2880810, 0xfeb80fd0, "vqshrun%c.s16\t%12-15,22D, %0-3,5Q, #%16-18e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2880850, 0xfeb80fd0, "vqrshrun%c.s16\t%12-15,22D, %0-3,5Q, #%16-18e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2880910, 0xfeb80fd0, "vqshrn%c.%24?us16\t%12-15,22D, %0-3,5Q, #%16-18e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2880950, 0xfeb80fd0, "vqrshrn%c.%24?us16\t%12-15,22D, %0-3,5Q, #%16-18e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2880a10, 0xfeb80fd0, "vshll%c.%24?us8\t%12-15,22D, %0-3,5Q, #%16-18d"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2900810, 0xffb00fd0, "vshrn%c.i32\t%12-15,22D, %0-3,5Q, #%16-19e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2900850, 0xffb00fd0, "vrshrn%c.i32\t%12-15,22D, %0-3,5Q, #%16-19e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2880510, 0xffb80f90, "vshl%c.%24?us8\t%12-15,22R, %0-3,5R, #%16-18d"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3880410, 0xffb80f90, "vsri%c.8\t%12-15,22R, %0-3,5R, #%16-18e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3880510, 0xffb80f90, "vsli%c.8\t%12-15,22R, %0-3,5R, #%16-18d"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3880610, 0xffb80f90, "vqshlu%c.s8\t%12-15,22R, %0-3,5R, #%16-18d"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2900810, 0xfeb00fd0, "vqshrun%c.s32\t%12-15,22D, %0-3,5Q, #%16-19e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2900850, 0xfeb00fd0, "vqrshrun%c.s32\t%12-15,22D, %0-3,5Q, #%16-19e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2900910, 0xfeb00fd0, "vqshrn%c.%24?us32\t%12-15,22D, %0-3,5Q, #%16-19e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2900950, 0xfeb00fd0, "vqrshrn%c.%24?us32\t%12-15,22D, %0-3,5Q, #%16-19e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2900a10, 0xfeb00fd0, "vshll%c.%24?us16\t%12-15,22D, %0-3,5Q, #%16-19d"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2880010, 0xfeb80f90, "vshr%c.%24?us8\t%12-15,22R, %0-3,5R, #%16-18e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2880110, 0xfeb80f90, "vsra%c.%24?us8\t%12-15,22R, %0-3,5R, #%16-18e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2880210, 0xfeb80f90, "vrshr%c.%24?us8\t%12-15,22R, %0-3,5R, #%16-18e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2880310, 0xfeb80f90, "vrsra%c.%24?us8\t%12-15,22R, %0-3,5R, #%16-18e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2880710, 0xfeb80f90, "vqshl%c.%24?us8\t%12-15,22R, %0-3,5R, #%16-18d"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2a00810, 0xffa00fd0, "vshrn%c.i64\t%12-15,22D, %0-3,5Q, #%16-20e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2a00850, 0xffa00fd0, "vrshrn%c.i64\t%12-15,22D, %0-3,5Q, #%16-20e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2900510, 0xffb00f90, "vshl%c.%24?us16\t%12-15,22R, %0-3,5R, #%16-19d"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3900410, 0xffb00f90, "vsri%c.16\t%12-15,22R, %0-3,5R, #%16-19e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3900510, 0xffb00f90, "vsli%c.16\t%12-15,22R, %0-3,5R, #%16-19d"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3900610, 0xffb00f90, "vqshlu%c.s16\t%12-15,22R, %0-3,5R, #%16-19d"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2a00a10, 0xfea00fd0, "vshll%c.%24?us32\t%12-15,22D, %0-3,5Q, #%16-20d"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2900010, 0xfeb00f90, "vshr%c.%24?us16\t%12-15,22R, %0-3,5R, #%16-19e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2900110, 0xfeb00f90, "vsra%c.%24?us16\t%12-15,22R, %0-3,5R, #%16-19e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2900210, 0xfeb00f90, "vrshr%c.%24?us16\t%12-15,22R, %0-3,5R, #%16-19e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2900310, 0xfeb00f90, "vrsra%c.%24?us16\t%12-15,22R, %0-3,5R, #%16-19e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2900710, 0xfeb00f90, "vqshl%c.%24?us16\t%12-15,22R, %0-3,5R, #%16-19d"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2a00810, 0xfea00fd0, "vqshrun%c.s64\t%12-15,22D, %0-3,5Q, #%16-20e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2a00850, 0xfea00fd0, "vqrshrun%c.s64\t%12-15,22D, %0-3,5Q, #%16-20e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2a00910, 0xfea00fd0, "vqshrn%c.%24?us64\t%12-15,22D, %0-3,5Q, #%16-20e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2a00950, 0xfea00fd0, "vqrshrn%c.%24?us64\t%12-15,22D, %0-3,5Q, #%16-20e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2a00510, 0xffa00f90, "vshl%c.%24?us32\t%12-15,22R, %0-3,5R, #%16-20d"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3a00410, 0xffa00f90, "vsri%c.32\t%12-15,22R, %0-3,5R, #%16-20e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3a00510, 0xffa00f90, "vsli%c.32\t%12-15,22R, %0-3,5R, #%16-20d"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3a00610, 0xffa00f90, "vqshlu%c.s32\t%12-15,22R, %0-3,5R, #%16-20d"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2a00010, 0xfea00f90, "vshr%c.%24?us32\t%12-15,22R, %0-3,5R, #%16-20e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2a00110, 0xfea00f90, "vsra%c.%24?us32\t%12-15,22R, %0-3,5R, #%16-20e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2a00210, 0xfea00f90, "vrshr%c.%24?us32\t%12-15,22R, %0-3,5R, #%16-20e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2a00310, 0xfea00f90, "vrsra%c.%24?us32\t%12-15,22R, %0-3,5R, #%16-20e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2a00710, 0xfea00f90, "vqshl%c.%24?us32\t%12-15,22R, %0-3,5R, #%16-20d"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800590, 0xff800f90, "vshl%c.%24?us64\t%12-15,22R, %0-3,5R, #%16-21d"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3800490, 0xff800f90, "vsri%c.64\t%12-15,22R, %0-3,5R, #%16-21e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3800590, 0xff800f90, "vsli%c.64\t%12-15,22R, %0-3,5R, #%16-21d"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3800690, 0xff800f90, "vqshlu%c.s64\t%12-15,22R, %0-3,5R, #%16-21d"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800090, 0xfe800f90, "vshr%c.%24?us64\t%12-15,22R, %0-3,5R, #%16-21e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800190, 0xfe800f90, "vsra%c.%24?us64\t%12-15,22R, %0-3,5R, #%16-21e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800290, 0xfe800f90, "vrshr%c.%24?us64\t%12-15,22R, %0-3,5R, #%16-21e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800390, 0xfe800f90, "vrsra%c.%24?us64\t%12-15,22R, %0-3,5R, #%16-21e"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800790, 0xfe800f90, "vqshl%c.%24?us64\t%12-15,22R, %0-3,5R, #%16-21d"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2a00e10, 0xfea00e90, "vcvt%c.%24,8?usff32.%24,8?ffus32\t%12-15,22R, %0-3,5R, #%16-20e"},
nkeynes@1265: 
nkeynes@1265:   /* Three registers of different lengths.  */
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800e00, 0xfea00f50, "vmull%c.p%20S0\t%12-15,22Q, %16-19,7D, %0-3,5D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800400, 0xff800f50, "vaddhn%c.i%20-21T2\t%12-15,22D, %16-19,7Q, %0-3,5Q"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800600, 0xff800f50, "vsubhn%c.i%20-21T2\t%12-15,22D, %16-19,7Q, %0-3,5Q"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800900, 0xff800f50, "vqdmlal%c.s%20-21S6\t%12-15,22Q, %16-19,7D, %0-3,5D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800b00, 0xff800f50, "vqdmlsl%c.s%20-21S6\t%12-15,22Q, %16-19,7D, %0-3,5D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800d00, 0xff800f50, "vqdmull%c.s%20-21S6\t%12-15,22Q, %16-19,7D, %0-3,5D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3800400, 0xff800f50, "vraddhn%c.i%20-21T2\t%12-15,22D, %16-19,7Q, %0-3,5Q"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3800600, 0xff800f50, "vrsubhn%c.i%20-21T2\t%12-15,22D, %16-19,7Q, %0-3,5Q"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800000, 0xfe800f50, "vaddl%c.%24?us%20-21S2\t%12-15,22Q, %16-19,7D, %0-3,5D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800100, 0xfe800f50, "vaddw%c.%24?us%20-21S2\t%12-15,22Q, %16-19,7Q, %0-3,5D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800200, 0xfe800f50, "vsubl%c.%24?us%20-21S2\t%12-15,22Q, %16-19,7D, %0-3,5D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800300, 0xfe800f50, "vsubw%c.%24?us%20-21S2\t%12-15,22Q, %16-19,7Q, %0-3,5D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800500, 0xfe800f50, "vabal%c.%24?us%20-21S2\t%12-15,22Q, %16-19,7D, %0-3,5D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800700, 0xfe800f50, "vabdl%c.%24?us%20-21S2\t%12-15,22Q, %16-19,7D, %0-3,5D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800800, 0xfe800f50, "vmlal%c.%24?us%20-21S2\t%12-15,22Q, %16-19,7D, %0-3,5D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800a00, 0xfe800f50, "vmlsl%c.%24?us%20-21S2\t%12-15,22Q, %16-19,7D, %0-3,5D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800c00, 0xfe800f50, "vmull%c.%24?us%20-21S2\t%12-15,22Q, %16-19,7D, %0-3,5D"},
nkeynes@1265: 
nkeynes@1265:   /* Two registers and a scalar.  */
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800040, 0xff800f50, "vmla%c.i%20-21S6\t%12-15,22D, %16-19,7D, %D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800140, 0xff800f50, "vmla%c.f%20-21Sa\t%12-15,22D, %16-19,7D, %D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800340, 0xff800f50, "vqdmlal%c.s%20-21S6\t%12-15,22Q, %16-19,7D, %D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800440, 0xff800f50, "vmls%c.i%20-21S6\t%12-15,22D, %16-19,7D, %D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800540, 0xff800f50, "vmls%c.f%20-21S6\t%12-15,22D, %16-19,7D, %D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800740, 0xff800f50, "vqdmlsl%c.s%20-21S6\t%12-15,22Q, %16-19,7D, %D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800840, 0xff800f50, "vmul%c.i%20-21S6\t%12-15,22D, %16-19,7D, %D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800940, 0xff800f50, "vmul%c.f%20-21Sa\t%12-15,22D, %16-19,7D, %D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800b40, 0xff800f50, "vqdmull%c.s%20-21S6\t%12-15,22Q, %16-19,7D, %D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800c40, 0xff800f50, "vqdmulh%c.s%20-21S6\t%12-15,22D, %16-19,7D, %D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800d40, 0xff800f50, "vqrdmulh%c.s%20-21S6\t%12-15,22D, %16-19,7D, %D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3800040, 0xff800f50, "vmla%c.i%20-21S6\t%12-15,22Q, %16-19,7Q, %D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3800140, 0xff800f50, "vmla%c.f%20-21Sa\t%12-15,22Q, %16-19,7Q, %D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3800440, 0xff800f50, "vmls%c.i%20-21S6\t%12-15,22Q, %16-19,7Q, %D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3800540, 0xff800f50, "vmls%c.f%20-21Sa\t%12-15,22Q, %16-19,7Q, %D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3800840, 0xff800f50, "vmul%c.i%20-21S6\t%12-15,22Q, %16-19,7Q, %D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3800940, 0xff800f50, "vmul%c.f%20-21Sa\t%12-15,22Q, %16-19,7Q, %D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3800c40, 0xff800f50, "vqdmulh%c.s%20-21S6\t%12-15,22Q, %16-19,7Q, %D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf3800d40, 0xff800f50, "vqrdmulh%c.s%20-21S6\t%12-15,22Q, %16-19,7Q, %D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800240, 0xfe800f50, "vmlal%c.%24?us%20-21S6\t%12-15,22Q, %16-19,7D, %D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800640, 0xfe800f50, "vmlsl%c.%24?us%20-21S6\t%12-15,22Q, %16-19,7D, %D"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf2800a40, 0xfe800f50, "vmull%c.%24?us%20-21S6\t%12-15,22Q, %16-19,7D, %D"},
nkeynes@1265: 
nkeynes@1265:   /* Element and structure load/store.  */
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf4a00fc0, 0xffb00fc0, "vld4%c.32\t%C"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf4a00c00, 0xffb00f00, "vld1%c.%6-7S2\t%C"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf4a00d00, 0xffb00f00, "vld2%c.%6-7S2\t%C"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf4a00e00, 0xffb00f00, "vld3%c.%6-7S2\t%C"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf4a00f00, 0xffb00f00, "vld4%c.%6-7S2\t%C"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf4000200, 0xff900f00, "v%21?ls%21?dt1%c.%6-7S3\t%A"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf4000300, 0xff900f00, "v%21?ls%21?dt2%c.%6-7S2\t%A"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf4000400, 0xff900f00, "v%21?ls%21?dt3%c.%6-7S2\t%A"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf4000500, 0xff900f00, "v%21?ls%21?dt3%c.%6-7S2\t%A"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf4000600, 0xff900f00, "v%21?ls%21?dt1%c.%6-7S3\t%A"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf4000700, 0xff900f00, "v%21?ls%21?dt1%c.%6-7S3\t%A"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf4000800, 0xff900f00, "v%21?ls%21?dt2%c.%6-7S2\t%A"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf4000900, 0xff900f00, "v%21?ls%21?dt2%c.%6-7S2\t%A"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf4000a00, 0xff900f00, "v%21?ls%21?dt1%c.%6-7S3\t%A"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf4000000, 0xff900e00, "v%21?ls%21?dt4%c.%6-7S2\t%A"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf4800000, 0xff900300, "v%21?ls%21?dt1%c.%10-11S2\t%B"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf4800100, 0xff900300, "v%21?ls%21?dt2%c.%10-11S2\t%B"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf4800200, 0xff900300, "v%21?ls%21?dt3%c.%10-11S2\t%B"},
nkeynes@1265:   {FPU_NEON_EXT_V1, 0xf4800300, 0xff900300, "v%21?ls%21?dt4%c.%10-11S2\t%B"},
nkeynes@1265: 
nkeynes@1265:   {0,0 ,0, 0}
nkeynes@1265: };
nkeynes@1265: 
nkeynes@1265: /* Opcode tables: ARM, 16-bit Thumb, 32-bit Thumb.  All three are partially
nkeynes@1265:    ordered: they must be searched linearly from the top to obtain a correct
nkeynes@1265:    match.  */
nkeynes@1265: 
nkeynes@1265: /* print_insn_arm recognizes the following format control codes:
nkeynes@1265: 
nkeynes@1265:    %%			%
nkeynes@1265: 
nkeynes@1265:    %a			print address for ldr/str instruction
nkeynes@1265:    %s                   print address for ldr/str halfword/signextend instruction
nkeynes@1265:    %S                   like %s but allow UNPREDICTABLE addressing
nkeynes@1265:    %b			print branch destination
nkeynes@1265:    %c			print condition code (always bits 28-31)
nkeynes@1265:    %m			print register mask for ldm/stm instruction
nkeynes@1265:    %o			print operand2 (immediate or register + shift)
nkeynes@1265:    %p			print 'p' iff bits 12-15 are 15
nkeynes@1265:    %t			print 't' iff bit 21 set and bit 24 clear
nkeynes@1265:    %B			print arm BLX(1) destination
nkeynes@1265:    %C			print the PSR sub type.
nkeynes@1265:    %U			print barrier type.
nkeynes@1265:    %P			print address for pli instruction.
nkeynes@1265: 
nkeynes@1265:    %<bitfield>r		print as an ARM register
nkeynes@1265:    %<bitfield>R		as %r but r15 is UNPREDICTABLE
nkeynes@1265:    %<bitfield>{r|R}u    as %{r|R} but if matches the other %u field then is UNPREDICTABLE
nkeynes@1265:    %<bitfield>{r|R}U    as %{r|R} but if matches the other %U field then is UNPREDICTABLE
nkeynes@1265:    %<bitfield>d		print the bitfield in decimal
nkeynes@1265:    %<bitfield>W         print the bitfield plus one in decimal 
nkeynes@1265:    %<bitfield>x		print the bitfield in hex
nkeynes@1265:    %<bitfield>X		print the bitfield as 1 hex digit without leading "0x"
nkeynes@1265:    
nkeynes@1265:    %<bitfield>'c	print specified char iff bitfield is all ones
nkeynes@1265:    %<bitfield>`c	print specified char iff bitfield is all zeroes
nkeynes@1265:    %<bitfield>?ab...    select from array of values in big endian order
nkeynes@1265: 
nkeynes@1265:    %e                   print arm SMI operand (bits 0..7,8..19).
nkeynes@1265:    %E			print the LSB and WIDTH fields of a BFI or BFC instruction.
nkeynes@1265:    %V                   print the 16-bit immediate field of a MOVT or MOVW instruction.
nkeynes@1265:    %R			print the SPSR/CPSR or banked register of an MRS.  */
nkeynes@1265: 
nkeynes@1265: static const struct opcode32 arm_opcodes[] =
nkeynes@1265: {
nkeynes@1265:   /* ARM instructions.  */
nkeynes@1265:   {ARM_EXT_V1, 0xe1a00000, 0xffffffff, "nop\t\t\t; (mov r0, r0)"},
nkeynes@1265:   {ARM_EXT_V4T | ARM_EXT_V5, 0x012FFF10, 0x0ffffff0, "bx%c\t%0-3r"},
nkeynes@1265:   {ARM_EXT_V2, 0x00000090, 0x0fe000f0, "mul%20's%c\t%16-19R, %0-3R, %8-11R"},
nkeynes@1265:   {ARM_EXT_V2, 0x00200090, 0x0fe000f0, "mla%20's%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
nkeynes@1265:   {ARM_EXT_V2S, 0x01000090, 0x0fb00ff0, "swp%22'b%c\t%12-15RU, %0-3Ru, [%16-19RuU]"},
nkeynes@1265:   {ARM_EXT_V3M, 0x00800090, 0x0fa000f0, "%22?sumull%20's%c\t%12-15Ru, %16-19Ru, %0-3R, %8-11R"},
nkeynes@1265:   {ARM_EXT_V3M, 0x00a00090, 0x0fa000f0, "%22?sumlal%20's%c\t%12-15Ru, %16-19Ru, %0-3R, %8-11R"},
nkeynes@1265: 
nkeynes@1265:   /* Virtualization Extension instructions.  */
nkeynes@1265:   {ARM_EXT_VIRT, 0x0160006e, 0x0fffffff, "eret%c"},
nkeynes@1265:   {ARM_EXT_VIRT, 0x01400070, 0x0ff000f0, "hvc%c\t%e"},
nkeynes@1265: 
nkeynes@1265:   /* Integer Divide Extension instructions.  */
nkeynes@1265:   {ARM_EXT_ADIV, 0x0710f010, 0x0ff0f0f0, "sdiv%c\t%16-19r, %0-3r, %8-11r"},
nkeynes@1265:   {ARM_EXT_ADIV, 0x0730f010, 0x0ff0f0f0, "udiv%c\t%16-19r, %0-3r, %8-11r"},
nkeynes@1265: 
nkeynes@1265:   /* MP Extension instructions.  */
nkeynes@1265:   {ARM_EXT_MP, 0xf410f000, 0xfc70f000, "pldw\t%a"},
nkeynes@1265: 
nkeynes@1265:   /* V7 instructions.  */
nkeynes@1265:   {ARM_EXT_V7, 0xf450f000, 0xfd70f000, "pli\t%P"},
nkeynes@1265:   {ARM_EXT_V7, 0x0320f0f0, 0x0ffffff0, "dbg%c\t#%0-3d"},
nkeynes@1265:   {ARM_EXT_V7, 0xf57ff050, 0xfffffff0, "dmb\t%U"},
nkeynes@1265:   {ARM_EXT_V7, 0xf57ff040, 0xfffffff0, "dsb\t%U"},
nkeynes@1265:   {ARM_EXT_V7, 0xf57ff060, 0xfffffff0, "isb\t%U"},
nkeynes@1265: 
nkeynes@1265:   /* ARM V6T2 instructions.  */
nkeynes@1265:   {ARM_EXT_V6T2, 0x07c0001f, 0x0fe0007f, "bfc%c\t%12-15R, %E"},
nkeynes@1265:   {ARM_EXT_V6T2, 0x07c00010, 0x0fe00070, "bfi%c\t%12-15R, %0-3r, %E"},
nkeynes@1265:   {ARM_EXT_V6T2, 0x00600090, 0x0ff000f0, "mls%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0x006000b0, 0x0f7000f0, "strht%c\t%12-15R, %S"},
nkeynes@1265:   
nkeynes@1265:   {ARM_EXT_V6T2, 0x00300090, 0x0f3000f0, UNDEFINED_INSTRUCTION },
nkeynes@1265:   {ARM_EXT_V6T2, 0x00300090, 0x0f300090, "ldr%6's%5?hbt%c\t%12-15R, %S"},
nkeynes@1265:   
nkeynes@1265:   {ARM_EXT_V6T2, 0x03000000, 0x0ff00000, "movw%c\t%12-15R, %V"},
nkeynes@1265:   {ARM_EXT_V6T2, 0x03400000, 0x0ff00000, "movt%c\t%12-15R, %V"},
nkeynes@1265:   {ARM_EXT_V6T2, 0x06ff0f30, 0x0fff0ff0, "rbit%c\t%12-15R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0x07a00050, 0x0fa00070, "%22?usbfx%c\t%12-15r, %0-3r, #%7-11d, #%16-20W"},
nkeynes@1265: 
nkeynes@1265:   /* ARM Security extension instructions.  */
nkeynes@1265:   {ARM_EXT_SEC, 0x01600070, 0x0ff000f0, "smc%c\t%e"},
nkeynes@1265: 
nkeynes@1265:   /* ARM V6K instructions.  */
nkeynes@1265:   {ARM_EXT_V6K, 0xf57ff01f, 0xffffffff, "clrex"},
nkeynes@1265:   {ARM_EXT_V6K, 0x01d00f9f, 0x0ff00fff, "ldrexb%c\t%12-15R, [%16-19R]"},
nkeynes@1265:   {ARM_EXT_V6K, 0x01b00f9f, 0x0ff00fff, "ldrexd%c\t%12-15r, [%16-19R]"},
nkeynes@1265:   {ARM_EXT_V6K, 0x01f00f9f, 0x0ff00fff, "ldrexh%c\t%12-15R, [%16-19R]"},
nkeynes@1265:   {ARM_EXT_V6K, 0x01c00f90, 0x0ff00ff0, "strexb%c\t%12-15R, %0-3R, [%16-19R]"},
nkeynes@1265:   {ARM_EXT_V6K, 0x01a00f90, 0x0ff00ff0, "strexd%c\t%12-15R, %0-3r, [%16-19R]"},
nkeynes@1265:   {ARM_EXT_V6K, 0x01e00f90, 0x0ff00ff0, "strexh%c\t%12-15R, %0-3R, [%16-19R]"},
nkeynes@1265: 
nkeynes@1265:   /* ARM V6K NOP hints.  */
nkeynes@1265:   {ARM_EXT_V6K, 0x0320f001, 0x0fffffff, "yield%c"},
nkeynes@1265:   {ARM_EXT_V6K, 0x0320f002, 0x0fffffff, "wfe%c"},
nkeynes@1265:   {ARM_EXT_V6K, 0x0320f003, 0x0fffffff, "wfi%c"},
nkeynes@1265:   {ARM_EXT_V6K, 0x0320f004, 0x0fffffff, "sev%c"},
nkeynes@1265:   {ARM_EXT_V6K, 0x0320f000, 0x0fffff00, "nop%c\t{%0-7d}"},
nkeynes@1265: 
nkeynes@1265:   /* ARM V6 instructions.  */
nkeynes@1265:   {ARM_EXT_V6, 0xf1080000, 0xfffffe3f, "cpsie\t%8'a%7'i%6'f"},
nkeynes@1265:   {ARM_EXT_V6, 0xf10a0000, 0xfffffe20, "cpsie\t%8'a%7'i%6'f,#%0-4d"},
nkeynes@1265:   {ARM_EXT_V6, 0xf10C0000, 0xfffffe3f, "cpsid\t%8'a%7'i%6'f"},
nkeynes@1265:   {ARM_EXT_V6, 0xf10e0000, 0xfffffe20, "cpsid\t%8'a%7'i%6'f,#%0-4d"},
nkeynes@1265:   {ARM_EXT_V6, 0xf1000000, 0xfff1fe20, "cps\t#%0-4d"},
nkeynes@1265:   {ARM_EXT_V6, 0x06800010, 0x0ff00ff0, "pkhbt%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06800010, 0x0ff00070, "pkhbt%c\t%12-15R, %16-19R, %0-3R, lsl #%7-11d"},
nkeynes@1265:   {ARM_EXT_V6, 0x06800050, 0x0ff00ff0, "pkhtb%c\t%12-15R, %16-19R, %0-3R, asr #32"},
nkeynes@1265:   {ARM_EXT_V6, 0x06800050, 0x0ff00070, "pkhtb%c\t%12-15R, %16-19R, %0-3R, asr #%7-11d"},
nkeynes@1265:   {ARM_EXT_V6, 0x01900f9f, 0x0ff00fff, "ldrex%c\tr%12-15d, [%16-19R]"},
nkeynes@1265:   {ARM_EXT_V6, 0x06200f10, 0x0ff00ff0, "qadd16%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06200f90, 0x0ff00ff0, "qadd8%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06200f30, 0x0ff00ff0, "qasx%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06200f70, 0x0ff00ff0, "qsub16%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06200ff0, 0x0ff00ff0, "qsub8%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06200f50, 0x0ff00ff0, "qsax%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06100f10, 0x0ff00ff0, "sadd16%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06100f90, 0x0ff00ff0, "sadd8%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06100f30, 0x0ff00ff0, "sasx%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06300f10, 0x0ff00ff0, "shadd16%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06300f90, 0x0ff00ff0, "shadd8%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06300f30, 0x0ff00ff0, "shasx%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06300f70, 0x0ff00ff0, "shsub16%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06300ff0, 0x0ff00ff0, "shsub8%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06300f50, 0x0ff00ff0, "shsax%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06100f70, 0x0ff00ff0, "ssub16%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06100ff0, 0x0ff00ff0, "ssub8%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06100f50, 0x0ff00ff0, "ssax%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06500f10, 0x0ff00ff0, "uadd16%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06500f90, 0x0ff00ff0, "uadd8%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06500f30, 0x0ff00ff0, "uasx%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06700f10, 0x0ff00ff0, "uhadd16%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06700f90, 0x0ff00ff0, "uhadd8%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06700f30, 0x0ff00ff0, "uhasx%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06700f70, 0x0ff00ff0, "uhsub16%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06700ff0, 0x0ff00ff0, "uhsub8%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06700f50, 0x0ff00ff0, "uhsax%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06600f10, 0x0ff00ff0, "uqadd16%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06600f90, 0x0ff00ff0, "uqadd8%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06600f30, 0x0ff00ff0, "uqasx%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06600f70, 0x0ff00ff0, "uqsub16%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06600ff0, 0x0ff00ff0, "uqsub8%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06600f50, 0x0ff00ff0, "uqsax%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06500f70, 0x0ff00ff0, "usub16%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06500ff0, 0x0ff00ff0, "usub8%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06500f50, 0x0ff00ff0, "usax%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06bf0f30, 0x0fff0ff0, "rev%c\t%12-15R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06bf0fb0, 0x0fff0ff0, "rev16%c\t%12-15R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06ff0fb0, 0x0fff0ff0, "revsh%c\t%12-15R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0xf8100a00, 0xfe50ffff, "rfe%23?id%24?ba\t%16-19r%21'!"},
nkeynes@1265:   {ARM_EXT_V6, 0x06bf0070, 0x0fff0ff0, "sxth%c\t%12-15R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06bf0470, 0x0fff0ff0, "sxth%c\t%12-15R, %0-3R, ror #8"},
nkeynes@1265:   {ARM_EXT_V6, 0x06bf0870, 0x0fff0ff0, "sxth%c\t%12-15R, %0-3R, ror #16"},
nkeynes@1265:   {ARM_EXT_V6, 0x06bf0c70, 0x0fff0ff0, "sxth%c\t%12-15R, %0-3R, ror #24"},
nkeynes@1265:   {ARM_EXT_V6, 0x068f0070, 0x0fff0ff0, "sxtb16%c\t%12-15R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x068f0470, 0x0fff0ff0, "sxtb16%c\t%12-15R, %0-3R, ror #8"},
nkeynes@1265:   {ARM_EXT_V6, 0x068f0870, 0x0fff0ff0, "sxtb16%c\t%12-15R, %0-3R, ror #16"},
nkeynes@1265:   {ARM_EXT_V6, 0x068f0c70, 0x0fff0ff0, "sxtb16%c\t%12-15R, %0-3R, ror #24"},
nkeynes@1265:   {ARM_EXT_V6, 0x06af0070, 0x0fff0ff0, "sxtb%c\t%12-15R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06af0470, 0x0fff0ff0, "sxtb%c\t%12-15R, %0-3R, ror #8"},
nkeynes@1265:   {ARM_EXT_V6, 0x06af0870, 0x0fff0ff0, "sxtb%c\t%12-15R, %0-3R, ror #16"},
nkeynes@1265:   {ARM_EXT_V6, 0x06af0c70, 0x0fff0ff0, "sxtb%c\t%12-15R, %0-3R, ror #24"},
nkeynes@1265:   {ARM_EXT_V6, 0x06ff0070, 0x0fff0ff0, "uxth%c\t%12-15R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06ff0470, 0x0fff0ff0, "uxth%c\t%12-15R, %0-3R, ror #8"},
nkeynes@1265:   {ARM_EXT_V6, 0x06ff0870, 0x0fff0ff0, "uxth%c\t%12-15R, %0-3R, ror #16"},
nkeynes@1265:   {ARM_EXT_V6, 0x06ff0c70, 0x0fff0ff0, "uxth%c\t%12-15R, %0-3R, ror #24"},
nkeynes@1265:   {ARM_EXT_V6, 0x06cf0070, 0x0fff0ff0, "uxtb16%c\t%12-15R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06cf0470, 0x0fff0ff0, "uxtb16%c\t%12-15R, %0-3R, ror #8"},
nkeynes@1265:   {ARM_EXT_V6, 0x06cf0870, 0x0fff0ff0, "uxtb16%c\t%12-15R, %0-3R, ror #16"},
nkeynes@1265:   {ARM_EXT_V6, 0x06cf0c70, 0x0fff0ff0, "uxtb16%c\t%12-15R, %0-3R, ror #24"},
nkeynes@1265:   {ARM_EXT_V6, 0x06ef0070, 0x0fff0ff0, "uxtb%c\t%12-15R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06ef0470, 0x0fff0ff0, "uxtb%c\t%12-15R, %0-3R, ror #8"},
nkeynes@1265:   {ARM_EXT_V6, 0x06ef0870, 0x0fff0ff0, "uxtb%c\t%12-15R, %0-3R, ror #16"},
nkeynes@1265:   {ARM_EXT_V6, 0x06ef0c70, 0x0fff0ff0, "uxtb%c\t%12-15R, %0-3R, ror #24"},
nkeynes@1265:   {ARM_EXT_V6, 0x06b00070, 0x0ff00ff0, "sxtah%c\t%12-15R, %16-19r, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06b00470, 0x0ff00ff0, "sxtah%c\t%12-15R, %16-19r, %0-3R, ror #8"},
nkeynes@1265:   {ARM_EXT_V6, 0x06b00870, 0x0ff00ff0, "sxtah%c\t%12-15R, %16-19r, %0-3R, ror #16"},
nkeynes@1265:   {ARM_EXT_V6, 0x06b00c70, 0x0ff00ff0, "sxtah%c\t%12-15R, %16-19r, %0-3R, ror #24"},
nkeynes@1265:   {ARM_EXT_V6, 0x06800070, 0x0ff00ff0, "sxtab16%c\t%12-15R, %16-19r, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06800470, 0x0ff00ff0, "sxtab16%c\t%12-15R, %16-19r, %0-3R, ror #8"},
nkeynes@1265:   {ARM_EXT_V6, 0x06800870, 0x0ff00ff0, "sxtab16%c\t%12-15R, %16-19r, %0-3R, ror #16"},
nkeynes@1265:   {ARM_EXT_V6, 0x06800c70, 0x0ff00ff0, "sxtab16%c\t%12-15R, %16-19r, %0-3R, ror #24"},
nkeynes@1265:   {ARM_EXT_V6, 0x06a00070, 0x0ff00ff0, "sxtab%c\t%12-15R, %16-19r, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06a00470, 0x0ff00ff0, "sxtab%c\t%12-15R, %16-19r, %0-3R, ror #8"},
nkeynes@1265:   {ARM_EXT_V6, 0x06a00870, 0x0ff00ff0, "sxtab%c\t%12-15R, %16-19r, %0-3R, ror #16"},
nkeynes@1265:   {ARM_EXT_V6, 0x06a00c70, 0x0ff00ff0, "sxtab%c\t%12-15R, %16-19r, %0-3R, ror #24"},
nkeynes@1265:   {ARM_EXT_V6, 0x06f00070, 0x0ff00ff0, "uxtah%c\t%12-15R, %16-19r, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06f00470, 0x0ff00ff0, "uxtah%c\t%12-15R, %16-19r, %0-3R, ror #8"},
nkeynes@1265:   {ARM_EXT_V6, 0x06f00870, 0x0ff00ff0, "uxtah%c\t%12-15R, %16-19r, %0-3R, ror #16"},
nkeynes@1265:   {ARM_EXT_V6, 0x06f00c70, 0x0ff00ff0, "uxtah%c\t%12-15R, %16-19r, %0-3R, ror #24"},
nkeynes@1265:   {ARM_EXT_V6, 0x06c00070, 0x0ff00ff0, "uxtab16%c\t%12-15R, %16-19r, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06c00470, 0x0ff00ff0, "uxtab16%c\t%12-15R, %16-19r, %0-3R, ror #8"},
nkeynes@1265:   {ARM_EXT_V6, 0x06c00870, 0x0ff00ff0, "uxtab16%c\t%12-15R, %16-19r, %0-3R, ror #16"},
nkeynes@1265:   {ARM_EXT_V6, 0x06c00c70, 0x0ff00ff0, "uxtab16%c\t%12-15R, %16-19r, %0-3R, ROR #24"},
nkeynes@1265:   {ARM_EXT_V6, 0x06e00070, 0x0ff00ff0, "uxtab%c\t%12-15R, %16-19r, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06e00470, 0x0ff00ff0, "uxtab%c\t%12-15R, %16-19r, %0-3R, ror #8"},
nkeynes@1265:   {ARM_EXT_V6, 0x06e00870, 0x0ff00ff0, "uxtab%c\t%12-15R, %16-19r, %0-3R, ror #16"},
nkeynes@1265:   {ARM_EXT_V6, 0x06e00c70, 0x0ff00ff0, "uxtab%c\t%12-15R, %16-19r, %0-3R, ror #24"},
nkeynes@1265:   {ARM_EXT_V6, 0x06800fb0, 0x0ff00ff0, "sel%c\t%12-15R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0xf1010000, 0xfffffc00, "setend\t%9?ble"},
nkeynes@1265:   {ARM_EXT_V6, 0x0700f010, 0x0ff0f0d0, "smuad%5'x%c\t%16-19R, %0-3R, %8-11R"},
nkeynes@1265:   {ARM_EXT_V6, 0x0700f050, 0x0ff0f0d0, "smusd%5'x%c\t%16-19R, %0-3R, %8-11R"},
nkeynes@1265:   {ARM_EXT_V6, 0x07000010, 0x0ff000d0, "smlad%5'x%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
nkeynes@1265:   {ARM_EXT_V6, 0x07400010, 0x0ff000d0, "smlald%5'x%c\t%12-15Ru, %16-19Ru, %0-3R, %8-11R"},
nkeynes@1265:   {ARM_EXT_V6, 0x07000050, 0x0ff000d0, "smlsd%5'x%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
nkeynes@1265:   {ARM_EXT_V6, 0x07400050, 0x0ff000d0, "smlsld%5'x%c\t%12-15Ru, %16-19Ru, %0-3R, %8-11R"},
nkeynes@1265:   {ARM_EXT_V6, 0x0750f010, 0x0ff0f0d0, "smmul%5'r%c\t%16-19R, %0-3R, %8-11R"},
nkeynes@1265:   {ARM_EXT_V6, 0x07500010, 0x0ff000d0, "smmla%5'r%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
nkeynes@1265:   {ARM_EXT_V6, 0x075000d0, 0x0ff000d0, "smmls%5'r%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
nkeynes@1265:   {ARM_EXT_V6, 0xf84d0500, 0xfe5fffe0, "srs%23?id%24?ba\t%16-19r%21'!, #%0-4d"},
nkeynes@1265:   {ARM_EXT_V6, 0x06a00010, 0x0fe00ff0, "ssat%c\t%12-15R, #%16-20W, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06a00010, 0x0fe00070, "ssat%c\t%12-15R, #%16-20W, %0-3R, lsl #%7-11d"},
nkeynes@1265:   {ARM_EXT_V6, 0x06a00050, 0x0fe00070, "ssat%c\t%12-15R, #%16-20W, %0-3R, asr #%7-11d"},
nkeynes@1265:   {ARM_EXT_V6, 0x06a00f30, 0x0ff00ff0, "ssat16%c\t%12-15r, #%16-19W, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6, 0x01800f90, 0x0ff00ff0, "strex%c\t%12-15R, %0-3R, [%16-19R]"},
nkeynes@1265:   {ARM_EXT_V6, 0x00400090, 0x0ff000f0, "umaal%c\t%12-15R, %16-19R, %0-3R, %8-11R"},
nkeynes@1265:   {ARM_EXT_V6, 0x0780f010, 0x0ff0f0f0, "usad8%c\t%16-19R, %0-3R, %8-11R"},
nkeynes@1265:   {ARM_EXT_V6, 0x07800010, 0x0ff000f0, "usada8%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06e00010, 0x0fe00ff0, "usat%c\t%12-15R, #%16-20d, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6, 0x06e00010, 0x0fe00070, "usat%c\t%12-15R, #%16-20d, %0-3R, lsl #%7-11d"},
nkeynes@1265:   {ARM_EXT_V6, 0x06e00050, 0x0fe00070, "usat%c\t%12-15R, #%16-20d, %0-3R, asr #%7-11d"},
nkeynes@1265:   {ARM_EXT_V6, 0x06e00f30, 0x0ff00ff0, "usat16%c\t%12-15R, #%16-19d, %0-3R"},
nkeynes@1265: 
nkeynes@1265:   /* V5J instruction.  */
nkeynes@1265:   {ARM_EXT_V5J, 0x012fff20, 0x0ffffff0, "bxj%c\t%0-3R"},
nkeynes@1265: 
nkeynes@1265:   /* V5 Instructions.  */
nkeynes@1265:   {ARM_EXT_V5, 0xe1200070, 0xfff000f0, "bkpt\t0x%16-19X%12-15X%8-11X%0-3X"},
nkeynes@1265:   {ARM_EXT_V5, 0xfa000000, 0xfe000000, "blx\t%B"},
nkeynes@1265:   {ARM_EXT_V5, 0x012fff30, 0x0ffffff0, "blx%c\t%0-3R"},
nkeynes@1265:   {ARM_EXT_V5, 0x016f0f10, 0x0fff0ff0, "clz%c\t%12-15R, %0-3R"},
nkeynes@1265: 
nkeynes@1265:   /* V5E "El Segundo" Instructions.  */    
nkeynes@1265:   {ARM_EXT_V5E, 0x000000d0, 0x0e1000f0, "ldrd%c\t%12-15r, %s"},
nkeynes@1265:   {ARM_EXT_V5E, 0x000000f0, 0x0e1000f0, "strd%c\t%12-15r, %s"},
nkeynes@1265:   {ARM_EXT_V5E, 0xf450f000, 0xfc70f000, "pld\t%a"},
nkeynes@1265:   {ARM_EXT_V5ExP, 0x01000080, 0x0ff000f0, "smlabb%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
nkeynes@1265:   {ARM_EXT_V5ExP, 0x010000a0, 0x0ff000f0, "smlatb%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
nkeynes@1265:   {ARM_EXT_V5ExP, 0x010000c0, 0x0ff000f0, "smlabt%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
nkeynes@1265:   {ARM_EXT_V5ExP, 0x010000e0, 0x0ff000f0, "smlatt%c\t%16-19r, %0-3r, %8-11R, %12-15R"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V5ExP, 0x01200080, 0x0ff000f0, "smlawb%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
nkeynes@1265:   {ARM_EXT_V5ExP, 0x012000c0, 0x0ff000f0, "smlawt%c\t%16-19R, %0-3r, %8-11R, %12-15R"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V5ExP, 0x01400080, 0x0ff000f0, "smlalbb%c\t%12-15Ru, %16-19Ru, %0-3R, %8-11R"},
nkeynes@1265:   {ARM_EXT_V5ExP, 0x014000a0, 0x0ff000f0, "smlaltb%c\t%12-15Ru, %16-19Ru, %0-3R, %8-11R"},
nkeynes@1265:   {ARM_EXT_V5ExP, 0x014000c0, 0x0ff000f0, "smlalbt%c\t%12-15Ru, %16-19Ru, %0-3R, %8-11R"},
nkeynes@1265:   {ARM_EXT_V5ExP, 0x014000e0, 0x0ff000f0, "smlaltt%c\t%12-15Ru, %16-19Ru, %0-3R, %8-11R"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V5ExP, 0x01600080, 0x0ff0f0f0, "smulbb%c\t%16-19R, %0-3R, %8-11R"},
nkeynes@1265:   {ARM_EXT_V5ExP, 0x016000a0, 0x0ff0f0f0, "smultb%c\t%16-19R, %0-3R, %8-11R"},
nkeynes@1265:   {ARM_EXT_V5ExP, 0x016000c0, 0x0ff0f0f0, "smulbt%c\t%16-19R, %0-3R, %8-11R"},
nkeynes@1265:   {ARM_EXT_V5ExP, 0x016000e0, 0x0ff0f0f0, "smultt%c\t%16-19R, %0-3R, %8-11R"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V5ExP, 0x012000a0, 0x0ff0f0f0, "smulwb%c\t%16-19R, %0-3R, %8-11R"},
nkeynes@1265:   {ARM_EXT_V5ExP, 0x012000e0, 0x0ff0f0f0, "smulwt%c\t%16-19R, %0-3R, %8-11R"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V5ExP, 0x01000050, 0x0ff00ff0,  "qadd%c\t%12-15R, %0-3R, %16-19R"},
nkeynes@1265:   {ARM_EXT_V5ExP, 0x01400050, 0x0ff00ff0, "qdadd%c\t%12-15R, %0-3R, %16-19R"},
nkeynes@1265:   {ARM_EXT_V5ExP, 0x01200050, 0x0ff00ff0,  "qsub%c\t%12-15R, %0-3R, %16-19R"},
nkeynes@1265:   {ARM_EXT_V5ExP, 0x01600050, 0x0ff00ff0, "qdsub%c\t%12-15R, %0-3R, %16-19R"},
nkeynes@1265: 
nkeynes@1265:   /* ARM Instructions.  */
nkeynes@1265:   {ARM_EXT_V1, 0x052d0004, 0x0fff0fff, "push%c\t{%12-15r}\t\t; (str%c %12-15r, %a)"},
nkeynes@1265:   
nkeynes@1265:   {ARM_EXT_V1, 0x04400000, 0x0e500000, "strb%t%c\t%12-15R, %a"},
nkeynes@1265:   {ARM_EXT_V1, 0x04000000, 0x0e500000, "str%t%c\t%12-15r, %a"},
nkeynes@1265:   {ARM_EXT_V1, 0x06400000, 0x0e500ff0, "strb%t%c\t%12-15R, %a"},
nkeynes@1265:   {ARM_EXT_V1, 0x06000000, 0x0e500ff0, "str%t%c\t%12-15r, %a"},
nkeynes@1265:   {ARM_EXT_V1, 0x04400000, 0x0c500010, "strb%t%c\t%12-15R, %a"},
nkeynes@1265:   {ARM_EXT_V1, 0x04000000, 0x0c500010, "str%t%c\t%12-15r, %a"},
nkeynes@1265:   
nkeynes@1265:   {ARM_EXT_V1, 0x04400000, 0x0e500000, "strb%c\t%12-15R, %a"},
nkeynes@1265:   {ARM_EXT_V1, 0x06400000, 0x0e500010, "strb%c\t%12-15R, %a"},
nkeynes@1265:   {ARM_EXT_V1, 0x004000b0, 0x0e5000f0, "strh%c\t%12-15R, %s"},
nkeynes@1265:   {ARM_EXT_V1, 0x000000b0, 0x0e500ff0, "strh%c\t%12-15R, %s"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V1, 0x00500090, 0x0e5000f0, UNDEFINED_INSTRUCTION},
nkeynes@1265:   {ARM_EXT_V1, 0x00500090, 0x0e500090, "ldr%6's%5?hb%c\t%12-15R, %s"},
nkeynes@1265:   {ARM_EXT_V1, 0x00100090, 0x0e500ff0, UNDEFINED_INSTRUCTION},
nkeynes@1265:   {ARM_EXT_V1, 0x00100090, 0x0e500f90, "ldr%6's%5?hb%c\t%12-15R, %s"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V1, 0x02000000, 0x0fe00000, "and%20's%c\t%12-15r, %16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x00000000, 0x0fe00010, "and%20's%c\t%12-15r, %16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x00000010, 0x0fe00090, "and%20's%c\t%12-15R, %16-19R, %o"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V1, 0x02200000, 0x0fe00000, "eor%20's%c\t%12-15r, %16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x00200000, 0x0fe00010, "eor%20's%c\t%12-15r, %16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x00200010, 0x0fe00090, "eor%20's%c\t%12-15R, %16-19R, %o"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V1, 0x02400000, 0x0fe00000, "sub%20's%c\t%12-15r, %16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x00400000, 0x0fe00010, "sub%20's%c\t%12-15r, %16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x00400010, 0x0fe00090, "sub%20's%c\t%12-15R, %16-19R, %o"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V1, 0x02600000, 0x0fe00000, "rsb%20's%c\t%12-15r, %16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x00600000, 0x0fe00010, "rsb%20's%c\t%12-15r, %16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x00600010, 0x0fe00090, "rsb%20's%c\t%12-15R, %16-19R, %o"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V1, 0x02800000, 0x0fe00000, "add%20's%c\t%12-15r, %16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x00800000, 0x0fe00010, "add%20's%c\t%12-15r, %16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x00800010, 0x0fe00090, "add%20's%c\t%12-15R, %16-19R, %o"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V1, 0x02a00000, 0x0fe00000, "adc%20's%c\t%12-15r, %16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x00a00000, 0x0fe00010, "adc%20's%c\t%12-15r, %16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x00a00010, 0x0fe00090, "adc%20's%c\t%12-15R, %16-19R, %o"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V1, 0x02c00000, 0x0fe00000, "sbc%20's%c\t%12-15r, %16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x00c00000, 0x0fe00010, "sbc%20's%c\t%12-15r, %16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x00c00010, 0x0fe00090, "sbc%20's%c\t%12-15R, %16-19R, %o"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V1, 0x02e00000, 0x0fe00000, "rsc%20's%c\t%12-15r, %16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x00e00000, 0x0fe00010, "rsc%20's%c\t%12-15r, %16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x00e00010, 0x0fe00090, "rsc%20's%c\t%12-15R, %16-19R, %o"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_VIRT, 0x0120f200, 0x0fb0f200, "msr%c\t%C, %0-3r"},
nkeynes@1265:   {ARM_EXT_V3, 0x0120f000, 0x0db0f000, "msr%c\t%C, %o"},
nkeynes@1265:   {ARM_EXT_V3, 0x01000000, 0x0fb00cff, "mrs%c\t%12-15R, %R"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V1, 0x03000000, 0x0fe00000, "tst%p%c\t%16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x01000000, 0x0fe00010, "tst%p%c\t%16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x01000010, 0x0fe00090, "tst%p%c\t%16-19R, %o"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V1, 0x03200000, 0x0fe00000, "teq%p%c\t%16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x01200000, 0x0fe00010, "teq%p%c\t%16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x01200010, 0x0fe00090, "teq%p%c\t%16-19R, %o"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V1, 0x03400000, 0x0fe00000, "cmp%p%c\t%16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x01400000, 0x0fe00010, "cmp%p%c\t%16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x01400010, 0x0fe00090, "cmp%p%c\t%16-19R, %o"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V1, 0x03600000, 0x0fe00000, "cmn%p%c\t%16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x01600000, 0x0fe00010, "cmn%p%c\t%16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x01600010, 0x0fe00090, "cmn%p%c\t%16-19R, %o"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V1, 0x03800000, 0x0fe00000, "orr%20's%c\t%12-15r, %16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x01800000, 0x0fe00010, "orr%20's%c\t%12-15r, %16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x01800010, 0x0fe00090, "orr%20's%c\t%12-15R, %16-19R, %o"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V1, 0x03a00000, 0x0fef0000, "mov%20's%c\t%12-15r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x01a00000, 0x0def0ff0, "mov%20's%c\t%12-15r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V1, 0x01a00000, 0x0def0060, "lsl%20's%c\t%12-15R, %q"},
nkeynes@1265:   {ARM_EXT_V1, 0x01a00020, 0x0def0060, "lsr%20's%c\t%12-15R, %q"},
nkeynes@1265:   {ARM_EXT_V1, 0x01a00040, 0x0def0060, "asr%20's%c\t%12-15R, %q"},
nkeynes@1265:   {ARM_EXT_V1, 0x01a00060, 0x0def0ff0, "rrx%20's%c\t%12-15r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V1, 0x01a00060, 0x0def0060, "ror%20's%c\t%12-15R, %q"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V1, 0x03c00000, 0x0fe00000, "bic%20's%c\t%12-15r, %16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x01c00000, 0x0fe00010, "bic%20's%c\t%12-15r, %16-19r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x01c00010, 0x0fe00090, "bic%20's%c\t%12-15R, %16-19R, %o"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V1, 0x03e00000, 0x0fe00000, "mvn%20's%c\t%12-15r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x01e00000, 0x0fe00010, "mvn%20's%c\t%12-15r, %o"},
nkeynes@1265:   {ARM_EXT_V1, 0x01e00010, 0x0fe00090, "mvn%20's%c\t%12-15R, %o"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V1, 0x06000010, 0x0e000010, UNDEFINED_INSTRUCTION},
nkeynes@1265:   {ARM_EXT_V1, 0x049d0004, 0x0fff0fff, "pop%c\t{%12-15r}\t\t; (ldr%c %12-15r, %a)"},
nkeynes@1265:   
nkeynes@1265:   {ARM_EXT_V1, 0x04500000, 0x0c500000, "ldrb%t%c\t%12-15R, %a"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V1, 0x04300000, 0x0d700000, "ldrt%c\t%12-15R, %a"},
nkeynes@1265:   {ARM_EXT_V1, 0x04100000, 0x0c500000, "ldr%c\t%12-15r, %a"},
nkeynes@1265:   
nkeynes@1265:   {ARM_EXT_V1, 0x092d0000, 0x0fff0000, "push%c\t%m"},
nkeynes@1265:   {ARM_EXT_V1, 0x08800000, 0x0ff00000, "stm%c\t%16-19R%21'!, %m%22'^"},
nkeynes@1265:   {ARM_EXT_V1, 0x08000000, 0x0e100000, "stm%23?id%24?ba%c\t%16-19R%21'!, %m%22'^"},
nkeynes@1265:   {ARM_EXT_V1, 0x08bd0000, 0x0fff0000, "pop%c\t%m"},
nkeynes@1265:   {ARM_EXT_V1, 0x08900000, 0x0f900000, "ldm%c\t%16-19R%21'!, %m%22'^"},
nkeynes@1265:   {ARM_EXT_V1, 0x08100000, 0x0e100000, "ldm%23?id%24?ba%c\t%16-19R%21'!, %m%22'^"},
nkeynes@1265:   {ARM_EXT_V1, 0x0a000000, 0x0e000000, "b%24'l%c\t%b"},
nkeynes@1265:   {ARM_EXT_V1, 0x0f000000, 0x0f000000, "svc%c\t%0-23x"},
nkeynes@1265: 
nkeynes@1265:   /* The rest.  */
nkeynes@1265:   {ARM_EXT_V1, 0x00000000, 0x00000000, UNDEFINED_INSTRUCTION},
nkeynes@1265:   {0, 0x00000000, 0x00000000, 0}
nkeynes@1265: };
nkeynes@1265: 
nkeynes@1265: /* print_insn_thumb16 recognizes the following format control codes:
nkeynes@1265: 
nkeynes@1265:    %S                   print Thumb register (bits 3..5 as high number if bit 6 set)
nkeynes@1265:    %D                   print Thumb register (bits 0..2 as high number if bit 7 set)
nkeynes@1265:    %<bitfield>I         print bitfield as a signed decimal
nkeynes@1265:    				(top bit of range being the sign bit)
nkeynes@1265:    %N                   print Thumb register mask (with LR)
nkeynes@1265:    %O                   print Thumb register mask (with PC)
nkeynes@1265:    %M                   print Thumb register mask
nkeynes@1265:    %b			print CZB's 6-bit unsigned branch destination
nkeynes@1265:    %s			print Thumb right-shift immediate (6..10; 0 == 32).
nkeynes@1265:    %c			print the condition code
nkeynes@1265:    %C			print the condition code, or "s" if not conditional
nkeynes@1265:    %x			print warning if conditional an not at end of IT block"
nkeynes@1265:    %X			print "\t; unpredictable <IT:code>" if conditional
nkeynes@1265:    %I			print IT instruction suffix and operands
nkeynes@1265:    %W			print Thumb Writeback indicator for LDMIA
nkeynes@1265:    %<bitfield>r		print bitfield as an ARM register
nkeynes@1265:    %<bitfield>d		print bitfield as a decimal
nkeynes@1265:    %<bitfield>H         print (bitfield * 2) as a decimal
nkeynes@1265:    %<bitfield>W         print (bitfield * 4) as a decimal
nkeynes@1265:    %<bitfield>a         print (bitfield * 4) as a pc-rel offset + decoded symbol
nkeynes@1265:    %<bitfield>B         print Thumb branch destination (signed displacement)
nkeynes@1265:    %<bitfield>c         print bitfield as a condition code
nkeynes@1265:    %<bitnum>'c		print specified char iff bit is one
nkeynes@1265:    %<bitnum>?ab		print a if bit is one else print b.  */
nkeynes@1265: 
nkeynes@1265: static const struct opcode16 thumb_opcodes[] =
nkeynes@1265: {
nkeynes@1265:   /* Thumb instructions.  */
nkeynes@1265: 
nkeynes@1265:   /* ARM V6K no-argument instructions.  */
nkeynes@1265:   {ARM_EXT_V6K, 0xbf00, 0xffff, "nop%c"},
nkeynes@1265:   {ARM_EXT_V6K, 0xbf10, 0xffff, "yield%c"},
nkeynes@1265:   {ARM_EXT_V6K, 0xbf20, 0xffff, "wfe%c"},
nkeynes@1265:   {ARM_EXT_V6K, 0xbf30, 0xffff, "wfi%c"},
nkeynes@1265:   {ARM_EXT_V6K, 0xbf40, 0xffff, "sev%c"},
nkeynes@1265:   {ARM_EXT_V6K, 0xbf00, 0xff0f, "nop%c\t{%4-7d}"},
nkeynes@1265: 
nkeynes@1265:   /* ARM V6T2 instructions.  */
nkeynes@1265:   {ARM_EXT_V6T2, 0xb900, 0xfd00, "cbnz\t%0-2r, %b%X"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xb100, 0xfd00, "cbz\t%0-2r, %b%X"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xbf00, 0xff00, "it%I%X"},
nkeynes@1265: 
nkeynes@1265:   /* ARM V6.  */
nkeynes@1265:   {ARM_EXT_V6, 0xb660, 0xfff8, "cpsie\t%2'a%1'i%0'f%X"},
nkeynes@1265:   {ARM_EXT_V6, 0xb670, 0xfff8, "cpsid\t%2'a%1'i%0'f%X"},
nkeynes@1265:   {ARM_EXT_V6, 0x4600, 0xffc0, "mov%c\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V6, 0xba00, 0xffc0, "rev%c\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V6, 0xba40, 0xffc0, "rev16%c\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V6, 0xbac0, 0xffc0, "revsh%c\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V6, 0xb650, 0xfff7, "setend\t%3?ble%X"},
nkeynes@1265:   {ARM_EXT_V6, 0xb200, 0xffc0, "sxth%c\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V6, 0xb240, 0xffc0, "sxtb%c\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V6, 0xb280, 0xffc0, "uxth%c\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V6, 0xb2c0, 0xffc0, "uxtb%c\t%0-2r, %3-5r"},
nkeynes@1265: 
nkeynes@1265:   /* ARM V5 ISA extends Thumb.  */
nkeynes@1265:   {ARM_EXT_V5T, 0xbe00, 0xff00, "bkpt\t%0-7x"}, /* Is always unconditional.  */
nkeynes@1265:   /* This is BLX(2).  BLX(1) is a 32-bit instruction.  */
nkeynes@1265:   {ARM_EXT_V5T, 0x4780, 0xff87, "blx%c\t%3-6r%x"},	/* note: 4 bit register number.  */
nkeynes@1265:   /* ARM V4T ISA (Thumb v1).  */
nkeynes@1265:   {ARM_EXT_V4T, 0x46C0, 0xFFFF, "nop%c\t\t\t; (mov r8, r8)"},
nkeynes@1265:   /* Format 4.  */
nkeynes@1265:   {ARM_EXT_V4T, 0x4000, 0xFFC0, "and%C\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V4T, 0x4040, 0xFFC0, "eor%C\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V4T, 0x4080, 0xFFC0, "lsl%C\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V4T, 0x40C0, 0xFFC0, "lsr%C\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V4T, 0x4100, 0xFFC0, "asr%C\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V4T, 0x4140, 0xFFC0, "adc%C\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V4T, 0x4180, 0xFFC0, "sbc%C\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V4T, 0x41C0, 0xFFC0, "ror%C\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V4T, 0x4200, 0xFFC0, "tst%c\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V4T, 0x4240, 0xFFC0, "neg%C\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V4T, 0x4280, 0xFFC0, "cmp%c\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V4T, 0x42C0, 0xFFC0, "cmn%c\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V4T, 0x4300, 0xFFC0, "orr%C\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V4T, 0x4340, 0xFFC0, "mul%C\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V4T, 0x4380, 0xFFC0, "bic%C\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V4T, 0x43C0, 0xFFC0, "mvn%C\t%0-2r, %3-5r"},
nkeynes@1265:   /* format 13 */
nkeynes@1265:   {ARM_EXT_V4T, 0xB000, 0xFF80, "add%c\tsp, #%0-6W"},
nkeynes@1265:   {ARM_EXT_V4T, 0xB080, 0xFF80, "sub%c\tsp, #%0-6W"},
nkeynes@1265:   /* format 5 */
nkeynes@1265:   {ARM_EXT_V4T, 0x4700, 0xFF80, "bx%c\t%S%x"},
nkeynes@1265:   {ARM_EXT_V4T, 0x4400, 0xFF00, "add%c\t%D, %S"},
nkeynes@1265:   {ARM_EXT_V4T, 0x4500, 0xFF00, "cmp%c\t%D, %S"},
nkeynes@1265:   {ARM_EXT_V4T, 0x4600, 0xFF00, "mov%c\t%D, %S"},
nkeynes@1265:   /* format 14 */
nkeynes@1265:   {ARM_EXT_V4T, 0xB400, 0xFE00, "push%c\t%N"},
nkeynes@1265:   {ARM_EXT_V4T, 0xBC00, 0xFE00, "pop%c\t%O"},
nkeynes@1265:   /* format 2 */
nkeynes@1265:   {ARM_EXT_V4T, 0x1800, 0xFE00, "add%C\t%0-2r, %3-5r, %6-8r"},
nkeynes@1265:   {ARM_EXT_V4T, 0x1A00, 0xFE00, "sub%C\t%0-2r, %3-5r, %6-8r"},
nkeynes@1265:   {ARM_EXT_V4T, 0x1C00, 0xFE00, "add%C\t%0-2r, %3-5r, #%6-8d"},
nkeynes@1265:   {ARM_EXT_V4T, 0x1E00, 0xFE00, "sub%C\t%0-2r, %3-5r, #%6-8d"},
nkeynes@1265:   /* format 8 */
nkeynes@1265:   {ARM_EXT_V4T, 0x5200, 0xFE00, "strh%c\t%0-2r, [%3-5r, %6-8r]"},
nkeynes@1265:   {ARM_EXT_V4T, 0x5A00, 0xFE00, "ldrh%c\t%0-2r, [%3-5r, %6-8r]"},
nkeynes@1265:   {ARM_EXT_V4T, 0x5600, 0xF600, "ldrs%11?hb%c\t%0-2r, [%3-5r, %6-8r]"},
nkeynes@1265:   /* format 7 */
nkeynes@1265:   {ARM_EXT_V4T, 0x5000, 0xFA00, "str%10'b%c\t%0-2r, [%3-5r, %6-8r]"},
nkeynes@1265:   {ARM_EXT_V4T, 0x5800, 0xFA00, "ldr%10'b%c\t%0-2r, [%3-5r, %6-8r]"},
nkeynes@1265:   /* format 1 */
nkeynes@1265:   {ARM_EXT_V4T, 0x0000, 0xFFC0, "mov%C\t%0-2r, %3-5r"},
nkeynes@1265:   {ARM_EXT_V4T, 0x0000, 0xF800, "lsl%C\t%0-2r, %3-5r, #%6-10d"},
nkeynes@1265:   {ARM_EXT_V4T, 0x0800, 0xF800, "lsr%C\t%0-2r, %3-5r, %s"},
nkeynes@1265:   {ARM_EXT_V4T, 0x1000, 0xF800, "asr%C\t%0-2r, %3-5r, %s"},
nkeynes@1265:   /* format 3 */
nkeynes@1265:   {ARM_EXT_V4T, 0x2000, 0xF800, "mov%C\t%8-10r, #%0-7d"},
nkeynes@1265:   {ARM_EXT_V4T, 0x2800, 0xF800, "cmp%c\t%8-10r, #%0-7d"},
nkeynes@1265:   {ARM_EXT_V4T, 0x3000, 0xF800, "add%C\t%8-10r, #%0-7d"},
nkeynes@1265:   {ARM_EXT_V4T, 0x3800, 0xF800, "sub%C\t%8-10r, #%0-7d"},
nkeynes@1265:   /* format 6 */
nkeynes@1265:   {ARM_EXT_V4T, 0x4800, 0xF800, "ldr%c\t%8-10r, [pc, #%0-7W]\t; (%0-7a)"},  /* TODO: Disassemble PC relative "LDR rD,=<symbolic>" */
nkeynes@1265:   /* format 9 */
nkeynes@1265:   {ARM_EXT_V4T, 0x6000, 0xF800, "str%c\t%0-2r, [%3-5r, #%6-10W]"},
nkeynes@1265:   {ARM_EXT_V4T, 0x6800, 0xF800, "ldr%c\t%0-2r, [%3-5r, #%6-10W]"},
nkeynes@1265:   {ARM_EXT_V4T, 0x7000, 0xF800, "strb%c\t%0-2r, [%3-5r, #%6-10d]"},
nkeynes@1265:   {ARM_EXT_V4T, 0x7800, 0xF800, "ldrb%c\t%0-2r, [%3-5r, #%6-10d]"},
nkeynes@1265:   /* format 10 */
nkeynes@1265:   {ARM_EXT_V4T, 0x8000, 0xF800, "strh%c\t%0-2r, [%3-5r, #%6-10H]"},
nkeynes@1265:   {ARM_EXT_V4T, 0x8800, 0xF800, "ldrh%c\t%0-2r, [%3-5r, #%6-10H]"},
nkeynes@1265:   /* format 11 */
nkeynes@1265:   {ARM_EXT_V4T, 0x9000, 0xF800, "str%c\t%8-10r, [sp, #%0-7W]"},
nkeynes@1265:   {ARM_EXT_V4T, 0x9800, 0xF800, "ldr%c\t%8-10r, [sp, #%0-7W]"},
nkeynes@1265:   /* format 12 */
nkeynes@1265:   {ARM_EXT_V4T, 0xA000, 0xF800, "add%c\t%8-10r, pc, #%0-7W\t; (adr %8-10r, %0-7a)"},
nkeynes@1265:   {ARM_EXT_V4T, 0xA800, 0xF800, "add%c\t%8-10r, sp, #%0-7W"},
nkeynes@1265:   /* format 15 */
nkeynes@1265:   {ARM_EXT_V4T, 0xC000, 0xF800, "stmia%c\t%8-10r!, %M"},
nkeynes@1265:   {ARM_EXT_V4T, 0xC800, 0xF800, "ldmia%c\t%8-10r%W, %M"},
nkeynes@1265:   /* format 17 */
nkeynes@1265:   {ARM_EXT_V4T, 0xDF00, 0xFF00, "svc%c\t%0-7d"},
nkeynes@1265:   /* format 16 */
nkeynes@1265:   {ARM_EXT_V4T, 0xDE00, 0xFE00, UNDEFINED_INSTRUCTION},
nkeynes@1265:   {ARM_EXT_V4T, 0xD000, 0xF000, "b%8-11c.n\t%0-7B%X"},
nkeynes@1265:   /* format 18 */
nkeynes@1265:   {ARM_EXT_V4T, 0xE000, 0xF800, "b%c.n\t%0-10B%x"},
nkeynes@1265: 
nkeynes@1265:   /* The E800 .. FFFF range is unconditionally redirected to the
nkeynes@1265:      32-bit table, because even in pre-V6T2 ISAs, BL and BLX(1) pairs
nkeynes@1265:      are processed via that table.  Thus, we can never encounter a
nkeynes@1265:      bare "second half of BL/BLX(1)" instruction here.  */
nkeynes@1265:   {ARM_EXT_V1,  0x0000, 0x0000, UNDEFINED_INSTRUCTION},
nkeynes@1265:   {0, 0, 0, 0}
nkeynes@1265: };
nkeynes@1265: 
nkeynes@1265: /* Thumb32 opcodes use the same table structure as the ARM opcodes.
nkeynes@1265:    We adopt the convention that hw1 is the high 16 bits of .value and
nkeynes@1265:    .mask, hw2 the low 16 bits.
nkeynes@1265: 
nkeynes@1265:    print_insn_thumb32 recognizes the following format control codes:
nkeynes@1265: 
nkeynes@1265:        %%		%
nkeynes@1265: 
nkeynes@1265:        %I		print a 12-bit immediate from hw1[10],hw2[14:12,7:0]
nkeynes@1265:        %M		print a modified 12-bit immediate (same location)
nkeynes@1265:        %J		print a 16-bit immediate from hw1[3:0,10],hw2[14:12,7:0]
nkeynes@1265:        %K		print a 16-bit immediate from hw2[3:0],hw1[3:0],hw2[11:4]
nkeynes@1265:        %H		print a 16-bit immediate from hw2[3:0],hw1[11:0]
nkeynes@1265:        %S		print a possibly-shifted Rm
nkeynes@1265: 
nkeynes@1265:        %L		print address for a ldrd/strd instruction
nkeynes@1265:        %a		print the address of a plain load/store
nkeynes@1265:        %w		print the width and signedness of a core load/store
nkeynes@1265:        %m		print register mask for ldm/stm
nkeynes@1265: 
nkeynes@1265:        %E		print the lsb and width fields of a bfc/bfi instruction
nkeynes@1265:        %F		print the lsb and width fields of a sbfx/ubfx instruction
nkeynes@1265:        %b		print a conditional branch offset
nkeynes@1265:        %B		print an unconditional branch offset
nkeynes@1265:        %s		print the shift field of an SSAT instruction
nkeynes@1265:        %R		print the rotation field of an SXT instruction
nkeynes@1265:        %U		print barrier type.
nkeynes@1265:        %P		print address for pli instruction.
nkeynes@1265:        %c		print the condition code
nkeynes@1265:        %x		print warning if conditional an not at end of IT block"
nkeynes@1265:        %X		print "\t; unpredictable <IT:code>" if conditional
nkeynes@1265: 
nkeynes@1265:        %<bitfield>d	print bitfield in decimal
nkeynes@1265:        %<bitfield>W	print bitfield*4 in decimal
nkeynes@1265:        %<bitfield>r	print bitfield as an ARM register
nkeynes@1265:        %<bitfield>R	as %<>r bit r15 is UNPREDICTABLE
nkeynes@1265:        %<bitfield>c	print bitfield as a condition code
nkeynes@1265: 
nkeynes@1265:        %<bitfield>'c	print specified char iff bitfield is all ones
nkeynes@1265:        %<bitfield>`c	print specified char iff bitfield is all zeroes
nkeynes@1265:        %<bitfield>?ab... select from array of values in big endian order
nkeynes@1265: 
nkeynes@1265:    With one exception at the bottom (done because BL and BLX(1) need
nkeynes@1265:    to come dead last), this table was machine-sorted first in
nkeynes@1265:    decreasing order of number of bits set in the mask, then in
nkeynes@1265:    increasing numeric order of mask, then in increasing numeric order
nkeynes@1265:    of opcode.  This order is not the clearest for a human reader, but
nkeynes@1265:    is guaranteed never to catch a special-case bit pattern with a more
nkeynes@1265:    general mask, which is important, because this instruction encoding
nkeynes@1265:    makes heavy use of special-case bit patterns.  */
nkeynes@1265: static const struct opcode32 thumb32_opcodes[] =
nkeynes@1265: {
nkeynes@1265:   /* V7 instructions.  */
nkeynes@1265:   {ARM_EXT_V7, 0xf910f000, 0xff70f000, "pli%c\t%a"},
nkeynes@1265:   {ARM_EXT_V7, 0xf3af80f0, 0xfffffff0, "dbg%c\t#%0-3d"},
nkeynes@1265:   {ARM_EXT_V7, 0xf3bf8f50, 0xfffffff0, "dmb%c\t%U"},
nkeynes@1265:   {ARM_EXT_V7, 0xf3bf8f40, 0xfffffff0, "dsb%c\t%U"},
nkeynes@1265:   {ARM_EXT_V7, 0xf3bf8f60, 0xfffffff0, "isb%c\t%U"},
nkeynes@1265:   {ARM_EXT_DIV, 0xfb90f0f0, 0xfff0f0f0, "sdiv%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_DIV, 0xfbb0f0f0, 0xfff0f0f0, "udiv%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265: 
nkeynes@1265:   /* Virtualization Extension instructions.  */
nkeynes@1265:   {ARM_EXT_VIRT, 0xf7e08000, 0xfff0f000, "hvc%c\t%V"},
nkeynes@1265:   /* We skip ERET as that is SUBS pc, lr, #0.  */
nkeynes@1265: 
nkeynes@1265:   /* MP Extension instructions.  */
nkeynes@1265:   {ARM_EXT_MP,   0xf830f000, 0xff70f000, "pldw%c\t%a"},
nkeynes@1265: 
nkeynes@1265:   /* Security extension instructions.  */
nkeynes@1265:   {ARM_EXT_SEC,  0xf7f08000, 0xfff0f000, "smc%c\t%K"},
nkeynes@1265: 
nkeynes@1265:   /* Instructions defined in the basic V6T2 set.  */
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3af8000, 0xffffffff, "nop%c.w"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3af8001, 0xffffffff, "yield%c.w"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3af8002, 0xffffffff, "wfe%c.w"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3af8003, 0xffffffff, "wfi%c.w"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3af8004, 0xffffffff, "sev%c.w"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3af8000, 0xffffff00, "nop%c.w\t{%0-7d}"},
nkeynes@1265: 
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3bf8f2f, 0xffffffff, "clrex%c"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3af8400, 0xffffff1f, "cpsie.w\t%7'a%6'i%5'f%X"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3af8600, 0xffffff1f, "cpsid.w\t%7'a%6'i%5'f%X"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3c08f00, 0xfff0ffff, "bxj%c\t%16-19r%x"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe810c000, 0xffd0ffff, "rfedb%c\t%16-19r%21'!"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe990c000, 0xffd0ffff, "rfeia%c\t%16-19r%21'!"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3e08000, 0xffe0f000, "mrs%c\t%8-11r, %D"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3af8100, 0xffffffe0, "cps\t#%0-4d%X"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe8d0f000, 0xfff0fff0, "tbb%c\t[%16-19r, %0-3r]%x"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe8d0f010, 0xfff0fff0, "tbh%c\t[%16-19r, %0-3r, lsl #1]%x"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3af8500, 0xffffff00, "cpsie\t%7'a%6'i%5'f, #%0-4d%X"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3af8700, 0xffffff00, "cpsid\t%7'a%6'i%5'f, #%0-4d%X"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3de8f00, 0xffffff00, "subs%c\tpc, lr, #%0-7d"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3808000, 0xffe0f000, "msr%c\t%C, %16-19r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe8500f00, 0xfff00fff, "ldrex%c\t%12-15r, [%16-19r]"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe8d00f4f, 0xfff00fef, "ldrex%4?hb%c\t%12-15r, [%16-19r]"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe800c000, 0xffd0ffe0, "srsdb%c\t%16-19r%21'!, #%0-4d"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe980c000, 0xffd0ffe0, "srsia%c\t%16-19r%21'!, #%0-4d"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa0ff080, 0xfffff0c0, "sxth%c.w\t%8-11r, %0-3r%R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa1ff080, 0xfffff0c0, "uxth%c.w\t%8-11r, %0-3r%R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa2ff080, 0xfffff0c0, "sxtb16%c\t%8-11r, %0-3r%R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa3ff080, 0xfffff0c0, "uxtb16%c\t%8-11r, %0-3r%R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa4ff080, 0xfffff0c0, "sxtb%c.w\t%8-11r, %0-3r%R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa5ff080, 0xfffff0c0, "uxtb%c.w\t%8-11r, %0-3r%R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe8400000, 0xfff000ff, "strex%c\t%8-11r, %12-15r, [%16-19r]"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe8d0007f, 0xfff000ff, "ldrexd%c\t%12-15r, %8-11r, [%16-19r]"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa80f000, 0xfff0f0f0, "sadd8%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa80f010, 0xfff0f0f0, "qadd8%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa80f020, 0xfff0f0f0, "shadd8%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa80f040, 0xfff0f0f0, "uadd8%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa80f050, 0xfff0f0f0, "uqadd8%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa80f060, 0xfff0f0f0, "uhadd8%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa80f080, 0xfff0f0f0, "qadd%c\t%8-11r, %0-3r, %16-19r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa80f090, 0xfff0f0f0, "qdadd%c\t%8-11r, %0-3r, %16-19r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa80f0a0, 0xfff0f0f0, "qsub%c\t%8-11r, %0-3r, %16-19r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa80f0b0, 0xfff0f0f0, "qdsub%c\t%8-11r, %0-3r, %16-19r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa90f000, 0xfff0f0f0, "sadd16%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa90f010, 0xfff0f0f0, "qadd16%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa90f020, 0xfff0f0f0, "shadd16%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa90f040, 0xfff0f0f0, "uadd16%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa90f050, 0xfff0f0f0, "uqadd16%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa90f060, 0xfff0f0f0, "uhadd16%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa90f080, 0xfff0f0f0, "rev%c.w\t%8-11r, %16-19r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa90f090, 0xfff0f0f0, "rev16%c.w\t%8-11r, %16-19r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa90f0a0, 0xfff0f0f0, "rbit%c\t%8-11r, %16-19r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa90f0b0, 0xfff0f0f0, "revsh%c.w\t%8-11r, %16-19r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfaa0f000, 0xfff0f0f0, "sasx%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfaa0f010, 0xfff0f0f0, "qasx%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfaa0f020, 0xfff0f0f0, "shasx%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfaa0f040, 0xfff0f0f0, "uasx%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfaa0f050, 0xfff0f0f0, "uqasx%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfaa0f060, 0xfff0f0f0, "uhasx%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfaa0f080, 0xfff0f0f0, "sel%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfab0f080, 0xfff0f0f0, "clz%c\t%8-11r, %16-19r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfac0f000, 0xfff0f0f0, "ssub8%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfac0f010, 0xfff0f0f0, "qsub8%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfac0f020, 0xfff0f0f0, "shsub8%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfac0f040, 0xfff0f0f0, "usub8%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfac0f050, 0xfff0f0f0, "uqsub8%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfac0f060, 0xfff0f0f0, "uhsub8%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfad0f000, 0xfff0f0f0, "ssub16%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfad0f010, 0xfff0f0f0, "qsub16%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfad0f020, 0xfff0f0f0, "shsub16%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfad0f040, 0xfff0f0f0, "usub16%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfad0f050, 0xfff0f0f0, "uqsub16%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfad0f060, 0xfff0f0f0, "uhsub16%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfae0f000, 0xfff0f0f0, "ssax%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfae0f010, 0xfff0f0f0, "qsax%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfae0f020, 0xfff0f0f0, "shsax%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfae0f040, 0xfff0f0f0, "usax%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfae0f050, 0xfff0f0f0, "uqsax%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfae0f060, 0xfff0f0f0, "uhsax%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfb00f000, 0xfff0f0f0, "mul%c.w\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfb70f000, 0xfff0f0f0, "usad8%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa00f000, 0xffe0f0f0, "lsl%20's%c.w\t%8-11R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa20f000, 0xffe0f0f0, "lsr%20's%c.w\t%8-11R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa40f000, 0xffe0f0f0, "asr%20's%c.w\t%8-11R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa60f000, 0xffe0f0f0, "ror%20's%c.w\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe8c00f40, 0xfff00fe0, "strex%4?hb%c\t%0-3r, %12-15r, [%16-19r]"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3200000, 0xfff0f0e0, "ssat16%c\t%8-11r, #%0-4d, %16-19r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3a00000, 0xfff0f0e0, "usat16%c\t%8-11r, #%0-4d, %16-19r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfb20f000, 0xfff0f0e0, "smuad%4'x%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfb30f000, 0xfff0f0e0, "smulw%4?tb%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfb40f000, 0xfff0f0e0, "smusd%4'x%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfb50f000, 0xfff0f0e0, "smmul%4'r%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa00f080, 0xfff0f0c0, "sxtah%c\t%8-11r, %16-19r, %0-3r%R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa10f080, 0xfff0f0c0, "uxtah%c\t%8-11r, %16-19r, %0-3r%R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa20f080, 0xfff0f0c0, "sxtab16%c\t%8-11r, %16-19r, %0-3r%R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa30f080, 0xfff0f0c0, "uxtab16%c\t%8-11r, %16-19r, %0-3r%R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa40f080, 0xfff0f0c0, "sxtab%c\t%8-11r, %16-19r, %0-3r%R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfa50f080, 0xfff0f0c0, "uxtab%c\t%8-11r, %16-19r, %0-3r%R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfb10f000, 0xfff0f0c0, "smul%5?tb%4?tb%c\t%8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf36f0000, 0xffff8020, "bfc%c\t%8-11r, %E"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xea100f00, 0xfff08f00, "tst%c.w\t%16-19r, %S"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xea900f00, 0xfff08f00, "teq%c\t%16-19r, %S"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xeb100f00, 0xfff08f00, "cmn%c.w\t%16-19r, %S"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xebb00f00, 0xfff08f00, "cmp%c.w\t%16-19r, %S"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf0100f00, 0xfbf08f00, "tst%c.w\t%16-19r, %M"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf0900f00, 0xfbf08f00, "teq%c\t%16-19r, %M"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf1100f00, 0xfbf08f00, "cmn%c.w\t%16-19r, %M"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf1b00f00, 0xfbf08f00, "cmp%c.w\t%16-19r, %M"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xea4f0000, 0xffef8000, "mov%20's%c.w\t%8-11r, %S"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xea6f0000, 0xffef8000, "mvn%20's%c.w\t%8-11r, %S"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe8c00070, 0xfff000f0, "strexd%c\t%0-3r, %12-15r, %8-11r, [%16-19r]"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfb000000, 0xfff000f0, "mla%c\t%8-11r, %16-19r, %0-3r, %12-15r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfb000010, 0xfff000f0, "mls%c\t%8-11r, %16-19r, %0-3r, %12-15r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfb700000, 0xfff000f0, "usada8%c\t%8-11R, %16-19R, %0-3R, %12-15R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfb800000, 0xfff000f0, "smull%c\t%12-15R, %8-11R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfba00000, 0xfff000f0, "umull%c\t%12-15R, %8-11R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfbc00000, 0xfff000f0, "smlal%c\t%12-15R, %8-11R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfbe00000, 0xfff000f0, "umlal%c\t%12-15R, %8-11R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfbe00060, 0xfff000f0, "umaal%c\t%12-15R, %8-11R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe8500f00, 0xfff00f00, "ldrex%c\t%12-15r, [%16-19r, #%0-7W]"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf04f0000, 0xfbef8000, "mov%20's%c.w\t%8-11r, %M"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf06f0000, 0xfbef8000, "mvn%20's%c.w\t%8-11r, %M"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf810f000, 0xff70f000, "pld%c\t%a"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfb200000, 0xfff000e0, "smlad%4'x%c\t%8-11R, %16-19R, %0-3R, %12-15R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfb300000, 0xfff000e0, "smlaw%4?tb%c\t%8-11R, %16-19R, %0-3R, %12-15R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfb400000, 0xfff000e0, "smlsd%4'x%c\t%8-11R, %16-19R, %0-3R, %12-15R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfb500000, 0xfff000e0, "smmla%4'r%c\t%8-11R, %16-19R, %0-3R, %12-15R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfb600000, 0xfff000e0, "smmls%4'r%c\t%8-11R, %16-19R, %0-3R, %12-15R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfbc000c0, 0xfff000e0, "smlald%4'x%c\t%12-15R, %8-11R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfbd000c0, 0xfff000e0, "smlsld%4'x%c\t%12-15R, %8-11R, %16-19R, %0-3R"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xeac00000, 0xfff08030, "pkhbt%c\t%8-11r, %16-19r, %S"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xeac00020, 0xfff08030, "pkhtb%c\t%8-11r, %16-19r, %S"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3400000, 0xfff08020, "sbfx%c\t%8-11r, %16-19r, %F"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3c00000, 0xfff08020, "ubfx%c\t%8-11r, %16-19r, %F"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf8000e00, 0xff900f00, "str%wt%c\t%12-15r, %a"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfb100000, 0xfff000c0, "smla%5?tb%4?tb%c\t%8-11r, %16-19r, %0-3r, %12-15r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xfbc00080, 0xfff000c0, "smlal%5?tb%4?tb%c\t%12-15r, %8-11r, %16-19r, %0-3r"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3600000, 0xfff08020, "bfi%c\t%8-11r, %16-19r, %E"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf8100e00, 0xfe900f00, "ldr%wt%c\t%12-15r, %a"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3000000, 0xffd08020, "ssat%c\t%8-11r, #%0-4d, %16-19r%s"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3800000, 0xffd08020, "usat%c\t%8-11r, #%0-4d, %16-19r%s"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf2000000, 0xfbf08000, "addw%c\t%8-11r, %16-19r, %I"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf2400000, 0xfbf08000, "movw%c\t%8-11r, %J"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf2a00000, 0xfbf08000, "subw%c\t%8-11r, %16-19r, %I"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf2c00000, 0xfbf08000, "movt%c\t%8-11r, %J"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xea000000, 0xffe08000, "and%20's%c.w\t%8-11r, %16-19r, %S"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xea200000, 0xffe08000, "bic%20's%c.w\t%8-11r, %16-19r, %S"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xea400000, 0xffe08000, "orr%20's%c.w\t%8-11r, %16-19r, %S"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xea600000, 0xffe08000, "orn%20's%c\t%8-11r, %16-19r, %S"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xea800000, 0xffe08000, "eor%20's%c.w\t%8-11r, %16-19r, %S"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xeb000000, 0xffe08000, "add%20's%c.w\t%8-11r, %16-19r, %S"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xeb400000, 0xffe08000, "adc%20's%c.w\t%8-11r, %16-19r, %S"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xeb600000, 0xffe08000, "sbc%20's%c.w\t%8-11r, %16-19r, %S"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xeba00000, 0xffe08000, "sub%20's%c.w\t%8-11r, %16-19r, %S"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xebc00000, 0xffe08000, "rsb%20's%c\t%8-11r, %16-19r, %S"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe8400000, 0xfff00000, "strex%c\t%8-11r, %12-15r, [%16-19r, #%0-7W]"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf0000000, 0xfbe08000, "and%20's%c.w\t%8-11r, %16-19r, %M"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf0200000, 0xfbe08000, "bic%20's%c.w\t%8-11r, %16-19r, %M"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf0400000, 0xfbe08000, "orr%20's%c.w\t%8-11r, %16-19r, %M"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf0600000, 0xfbe08000, "orn%20's%c\t%8-11r, %16-19r, %M"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf0800000, 0xfbe08000, "eor%20's%c.w\t%8-11r, %16-19r, %M"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf1000000, 0xfbe08000, "add%20's%c.w\t%8-11r, %16-19r, %M"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf1400000, 0xfbe08000, "adc%20's%c.w\t%8-11r, %16-19r, %M"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf1600000, 0xfbe08000, "sbc%20's%c.w\t%8-11r, %16-19r, %M"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf1a00000, 0xfbe08000, "sub%20's%c.w\t%8-11r, %16-19r, %M"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf1c00000, 0xfbe08000, "rsb%20's%c\t%8-11r, %16-19r, %M"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe8800000, 0xffd00000, "stmia%c.w\t%16-19r%21'!, %m"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe8900000, 0xffd00000, "ldmia%c.w\t%16-19r%21'!, %m"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe9000000, 0xffd00000, "stmdb%c\t%16-19r%21'!, %m"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe9100000, 0xffd00000, "ldmdb%c\t%16-19r%21'!, %m"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe9c00000, 0xffd000ff, "strd%c\t%12-15r, %8-11r, [%16-19r]"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe9d00000, 0xffd000ff, "ldrd%c\t%12-15r, %8-11r, [%16-19r]"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe9400000, 0xff500000, "strd%c\t%12-15r, %8-11r, [%16-19r, #%23`-%0-7W]%21'!%L"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe9500000, 0xff500000, "ldrd%c\t%12-15r, %8-11r, [%16-19r, #%23`-%0-7W]%21'!%L"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe8600000, 0xff700000, "strd%c\t%12-15r, %8-11r, [%16-19r], #%23`-%0-7W%L"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xe8700000, 0xff700000, "ldrd%c\t%12-15r, %8-11r, [%16-19r], #%23`-%0-7W%L"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf8000000, 0xff100000, "str%w%c.w\t%12-15r, %a"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf8100000, 0xfe100000, "ldr%w%c.w\t%12-15r, %a"},
nkeynes@1265: 
nkeynes@1265:   /* Filter out Bcc with cond=E or F, which are used for other instructions.  */
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3c08000, 0xfbc0d000, "undefined (bcc, cond=0xF)"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf3808000, 0xfbc0d000, "undefined (bcc, cond=0xE)"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf0008000, 0xf800d000, "b%22-25c.w\t%b%X"},
nkeynes@1265:   {ARM_EXT_V6T2, 0xf0009000, 0xf800d000, "b%c.w\t%B%x"},
nkeynes@1265: 
nkeynes@1265:   /* These have been 32-bit since the invention of Thumb.  */
nkeynes@1265:   {ARM_EXT_V4T,  0xf000c000, 0xf800d001, "blx%c\t%B%x"},
nkeynes@1265:   {ARM_EXT_V4T,  0xf000d000, 0xf800d000, "bl%c\t%B%x"},
nkeynes@1265: 
nkeynes@1265:   /* Fallback.  */
nkeynes@1265:   {ARM_EXT_V1,   0x00000000, 0x00000000, UNDEFINED_INSTRUCTION},
nkeynes@1265:   {0, 0, 0, 0}
nkeynes@1265: };
nkeynes@1265: 
nkeynes@1265: static const char *const arm_conditional[] =
nkeynes@1265: {"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc",
nkeynes@1265:  "hi", "ls", "ge", "lt", "gt", "le", "al", "<und>", ""};
nkeynes@1265: 
nkeynes@1265: static const char *const arm_fp_const[] =
nkeynes@1265: {"0.0", "1.0", "2.0", "3.0", "4.0", "5.0", "0.5", "10.0"};
nkeynes@1265: 
nkeynes@1265: static const char *const arm_shift[] =
nkeynes@1265: {"lsl", "lsr", "asr", "ror"};
nkeynes@1265: 
nkeynes@1265: typedef struct
nkeynes@1265: {
nkeynes@1265:   const char *name;
nkeynes@1265:   const char *description;
nkeynes@1265:   const char *reg_names[16];
nkeynes@1265: }
nkeynes@1265: arm_regname;
nkeynes@1265: 
nkeynes@1265: static const arm_regname regnames[] =
nkeynes@1265: {
nkeynes@1265:   { "raw" , "Select raw register names",
nkeynes@1265:     { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"}},
nkeynes@1265:   { "gcc",  "Select register names used by GCC",
nkeynes@1265:     { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "sl",  "fp",  "ip",  "sp",  "lr",  "pc" }},
nkeynes@1265:   { "std",  "Select register names used in ARM's ISA documentation",
nkeynes@1265:     { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "sp",  "lr",  "pc" }},
nkeynes@1265:   { "apcs", "Select register names used in the APCS",
nkeynes@1265:     { "a1", "a2", "a3", "a4", "v1", "v2", "v3", "v4", "v5", "v6", "sl",  "fp",  "ip",  "sp",  "lr",  "pc" }},
nkeynes@1265:   { "atpcs", "Select register names used in the ATPCS",
nkeynes@1265:     { "a1", "a2", "a3", "a4", "v1", "v2", "v3", "v4", "v5", "v6", "v7",  "v8",  "IP",  "SP",  "LR",  "PC" }},
nkeynes@1265:   { "special-atpcs", "Select special register names used in the ATPCS",
nkeynes@1265:     { "a1", "a2", "a3", "a4", "v1", "v2", "v3", "WR", "v5", "SB", "SL",  "FP",  "IP",  "SP",  "LR",  "PC" }},
nkeynes@1265: };
nkeynes@1265: 
nkeynes@1265: static const char *const iwmmxt_wwnames[] =
nkeynes@1265: {"b", "h", "w", "d"};
nkeynes@1265: 
nkeynes@1265: static const char *const iwmmxt_wwssnames[] =
nkeynes@1265: {"b", "bus", "bc", "bss",
nkeynes@1265:  "h", "hus", "hc", "hss",
nkeynes@1265:  "w", "wus", "wc", "wss",
nkeynes@1265:  "d", "dus", "dc", "dss"
nkeynes@1265: };
nkeynes@1265: 
nkeynes@1265: static const char *const iwmmxt_regnames[] =
nkeynes@1265: { "wr0", "wr1", "wr2", "wr3", "wr4", "wr5", "wr6", "wr7",
nkeynes@1265:   "wr8", "wr9", "wr10", "wr11", "wr12", "wr13", "wr14", "wr15"
nkeynes@1265: };
nkeynes@1265: 
nkeynes@1265: static const char *const iwmmxt_cregnames[] =
nkeynes@1265: { "wcid", "wcon", "wcssf", "wcasf", "reserved", "reserved", "reserved", "reserved",
nkeynes@1265:   "wcgr0", "wcgr1", "wcgr2", "wcgr3", "reserved", "reserved", "reserved", "reserved"
nkeynes@1265: };
nkeynes@1265: 
nkeynes@1265: /* Default to GCC register name set.  */
nkeynes@1265: static unsigned int regname_selected = 1;
nkeynes@1265: 
nkeynes@1265: #define NUM_ARM_REGNAMES  NUM_ELEM (regnames)
nkeynes@1265: #define arm_regnames      regnames[regname_selected].reg_names
nkeynes@1265: 
nkeynes@1265: static bfd_boolean force_thumb = FALSE;
nkeynes@1265: 
nkeynes@1265: /* Current IT instruction state.  This contains the same state as the IT
nkeynes@1265:    bits in the CPSR.  */
nkeynes@1265: static unsigned int ifthen_state;
nkeynes@1265: /* IT state for the next instruction.  */
nkeynes@1265: static unsigned int ifthen_next_state;
nkeynes@1265: /* The address of the insn for which the IT state is valid.  */
nkeynes@1265: static bfd_vma ifthen_address;
nkeynes@1265: #define IFTHEN_COND ((ifthen_state >> 4) & 0xf)
nkeynes@1265: 
nkeynes@1265: 
nkeynes@1265: /* Functions.  */
nkeynes@1265: int
nkeynes@1265: get_arm_regname_num_options (void)
nkeynes@1265: {
nkeynes@1265:   return NUM_ARM_REGNAMES;
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: int
nkeynes@1265: set_arm_regname_option (int option)
nkeynes@1265: {
nkeynes@1265:   int old = regname_selected;
nkeynes@1265:   regname_selected = option;
nkeynes@1265:   return old;
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: int
nkeynes@1265: get_arm_regnames (int option,
nkeynes@1265: 		  const char **setname,
nkeynes@1265: 		  const char **setdescription,
nkeynes@1265: 		  const char *const **register_names)
nkeynes@1265: {
nkeynes@1265:   *setname = regnames[option].name;
nkeynes@1265:   *setdescription = regnames[option].description;
nkeynes@1265:   *register_names = regnames[option].reg_names;
nkeynes@1265:   return 16;
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: /* Decode a bitfield of the form matching regexp (N(-N)?,)*N(-N)?.
nkeynes@1265:    Returns pointer to following character of the format string and
nkeynes@1265:    fills in *VALUEP and *WIDTHP with the extracted value and number of
nkeynes@1265:    bits extracted.  WIDTHP can be NULL.  */
nkeynes@1265: 
nkeynes@1265: static const char *
nkeynes@1265: arm_decode_bitfield (const char *ptr,
nkeynes@1265: 		     unsigned long insn,
nkeynes@1265: 		     unsigned long *valuep,
nkeynes@1265: 		     int *widthp)
nkeynes@1265: {
nkeynes@1265:   unsigned long value = 0;
nkeynes@1265:   int width = 0;
nkeynes@1265:   
nkeynes@1265:   do 
nkeynes@1265:     {
nkeynes@1265:       int start, end;
nkeynes@1265:       int bits;
nkeynes@1265: 
nkeynes@1265:       for (start = 0; *ptr >= '0' && *ptr <= '9'; ptr++)
nkeynes@1265: 	start = start * 10 + *ptr - '0';
nkeynes@1265:       if (*ptr == '-')
nkeynes@1265: 	for (end = 0, ptr++; *ptr >= '0' && *ptr <= '9'; ptr++)
nkeynes@1265: 	  end = end * 10 + *ptr - '0';
nkeynes@1265:       else
nkeynes@1265: 	end = start;
nkeynes@1265:       bits = end - start;
nkeynes@1265:       if (bits < 0)
nkeynes@1265: 	abort ();
nkeynes@1265:       value |= ((insn >> start) & ((2ul << bits) - 1)) << width;
nkeynes@1265:       width += bits + 1;
nkeynes@1265:     }
nkeynes@1265:   while (*ptr++ == ',');
nkeynes@1265:   *valuep = value;
nkeynes@1265:   if (widthp)
nkeynes@1265:     *widthp = width;
nkeynes@1265:   return ptr - 1;
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: static void
nkeynes@1265: arm_decode_shift (long given, fprintf_ftype func, void *stream,
nkeynes@1265: 		  bfd_boolean print_shift)
nkeynes@1265: {
nkeynes@1265:   func (stream, "%s", arm_regnames[given & 0xf]);
nkeynes@1265: 
nkeynes@1265:   if ((given & 0xff0) != 0)
nkeynes@1265:     {
nkeynes@1265:       if ((given & 0x10) == 0)
nkeynes@1265: 	{
nkeynes@1265: 	  int amount = (given & 0xf80) >> 7;
nkeynes@1265: 	  int shift = (given & 0x60) >> 5;
nkeynes@1265: 
nkeynes@1265: 	  if (amount == 0)
nkeynes@1265: 	    {
nkeynes@1265: 	      if (shift == 3)
nkeynes@1265: 		{
nkeynes@1265: 		  func (stream, ", rrx");
nkeynes@1265: 		  return;
nkeynes@1265: 		}
nkeynes@1265: 
nkeynes@1265: 	      amount = 32;
nkeynes@1265: 	    }
nkeynes@1265: 
nkeynes@1265: 	  if (print_shift)
nkeynes@1265: 	    func (stream, ", %s #%d", arm_shift[shift], amount);
nkeynes@1265: 	  else
nkeynes@1265: 	    func (stream, ", #%d", amount);
nkeynes@1265: 	}
nkeynes@1265:       else if ((given & 0x80) == 0x80)
nkeynes@1265: 	func (stream, "\t; <illegal shifter operand>");
nkeynes@1265:       else if (print_shift)
nkeynes@1265: 	func (stream, ", %s %s", arm_shift[(given & 0x60) >> 5],
nkeynes@1265: 	      arm_regnames[(given & 0xf00) >> 8]);
nkeynes@1265:       else
nkeynes@1265: 	func (stream, ", %s", arm_regnames[(given & 0xf00) >> 8]);
nkeynes@1265:     }
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: #define W_BIT 21
nkeynes@1265: #define I_BIT 22
nkeynes@1265: #define U_BIT 23
nkeynes@1265: #define P_BIT 24
nkeynes@1265: 
nkeynes@1265: #define WRITEBACK_BIT_SET   (given & (1 << W_BIT))
nkeynes@1265: #define IMMEDIATE_BIT_SET   (given & (1 << I_BIT))
nkeynes@1265: #define NEGATIVE_BIT_SET   ((given & (1 << U_BIT)) == 0)
nkeynes@1265: #define PRE_BIT_SET         (given & (1 << P_BIT))
nkeynes@1265: 
nkeynes@1265: /* Print one coprocessor instruction on INFO->STREAM.
nkeynes@1265:    Return TRUE if the instuction matched, FALSE if this is not a
nkeynes@1265:    recognised coprocessor instruction.  */
nkeynes@1265: 
nkeynes@1265: static bfd_boolean
nkeynes@1265: print_insn_coprocessor (bfd_vma pc,
nkeynes@1265: 			struct disassemble_info *info,
nkeynes@1265: 			long given,
nkeynes@1265: 			bfd_boolean thumb)
nkeynes@1265: {
nkeynes@1265:   const struct opcode32 *insn;
nkeynes@1265:   void *stream = info->stream;
nkeynes@1265:   fprintf_ftype func = info->fprintf_func;
nkeynes@1265:   unsigned long mask;
nkeynes@1265:   unsigned long value = 0;
nkeynes@1265:   struct arm_private_data *private_data = info->private_data;
nkeynes@1265:   unsigned long allowed_arches = private_data->features.coproc;
nkeynes@1265:   int cond;
nkeynes@1265: 
nkeynes@1265:   for (insn = coprocessor_opcodes; insn->assembler; insn++)
nkeynes@1265:     {
nkeynes@1265:       unsigned long u_reg = 16;
nkeynes@1265:       bfd_boolean is_unpredictable = FALSE;
nkeynes@1265:       signed long value_in_comment = 0;
nkeynes@1265:       const char *c;
nkeynes@1265: 
nkeynes@1265:       if (insn->arch == 0)
nkeynes@1265: 	switch (insn->value)
nkeynes@1265: 	  {
nkeynes@1265: 	  case SENTINEL_IWMMXT_START:
nkeynes@1265: 	    if (info->mach != bfd_mach_arm_XScale
nkeynes@1265: 		&& info->mach != bfd_mach_arm_iWMMXt
nkeynes@1265: 		&& info->mach != bfd_mach_arm_iWMMXt2)
nkeynes@1265: 	      do
nkeynes@1265: 		insn++;
nkeynes@1265: 	      while (insn->arch != 0 && insn->value != SENTINEL_IWMMXT_END);
nkeynes@1265: 	    continue;
nkeynes@1265: 
nkeynes@1265: 	  case SENTINEL_IWMMXT_END:
nkeynes@1265: 	    continue;
nkeynes@1265: 
nkeynes@1265: 	  case SENTINEL_GENERIC_START:
nkeynes@1265: 	    allowed_arches = private_data->features.core;
nkeynes@1265: 	    continue;
nkeynes@1265: 
nkeynes@1265: 	  default:
nkeynes@1265: 	    abort ();
nkeynes@1265: 	  }
nkeynes@1265: 
nkeynes@1265:       mask = insn->mask;
nkeynes@1265:       value = insn->value;
nkeynes@1265:       if (thumb)
nkeynes@1265: 	{
nkeynes@1265: 	  /* The high 4 bits are 0xe for Arm conditional instructions, and
nkeynes@1265: 	     0xe for arm unconditional instructions.  The rest of the
nkeynes@1265: 	     encoding is the same.  */
nkeynes@1265: 	  mask |= 0xf0000000;
nkeynes@1265: 	  value |= 0xe0000000;
nkeynes@1265: 	  if (ifthen_state)
nkeynes@1265: 	    cond = IFTHEN_COND;
nkeynes@1265: 	  else
nkeynes@1265: 	    cond = 16;
nkeynes@1265: 	}
nkeynes@1265:       else
nkeynes@1265: 	{
nkeynes@1265: 	  /* Only match unconditional instuctions against unconditional
nkeynes@1265: 	     patterns.  */
nkeynes@1265: 	  if ((given & 0xf0000000) == 0xf0000000)
nkeynes@1265: 	    {
nkeynes@1265: 	      mask |= 0xf0000000;
nkeynes@1265: 	      cond = 16;
nkeynes@1265: 	    }
nkeynes@1265: 	  else
nkeynes@1265: 	    {
nkeynes@1265: 	      cond = (given >> 28) & 0xf;
nkeynes@1265: 	      if (cond == 0xe)
nkeynes@1265: 		cond = 16;
nkeynes@1265: 	    }
nkeynes@1265: 	}
nkeynes@1265:       
nkeynes@1265:       if ((given & mask) != value)
nkeynes@1265: 	continue;
nkeynes@1265: 
nkeynes@1265:       if ((insn->arch & allowed_arches) == 0)
nkeynes@1265: 	continue;
nkeynes@1265: 
nkeynes@1265:       for (c = insn->assembler; *c; c++)
nkeynes@1265: 	{
nkeynes@1265: 	  if (*c == '%')
nkeynes@1265: 	    {
nkeynes@1265: 	      switch (*++c)
nkeynes@1265: 		{
nkeynes@1265: 		case '%':
nkeynes@1265: 		  func (stream, "%%");
nkeynes@1265: 		  break;
nkeynes@1265: 
nkeynes@1265: 		case 'A':
nkeynes@1265: 		  {
nkeynes@1265: 		    int rn = (given >> 16) & 0xf;
nkeynes@1265:   		    bfd_vma offset = given & 0xff;
nkeynes@1265: 
nkeynes@1265: 		    func (stream, "[%s", arm_regnames [(given >> 16) & 0xf]);
nkeynes@1265: 
nkeynes@1265: 		    if (PRE_BIT_SET || WRITEBACK_BIT_SET)
nkeynes@1265: 		      {
nkeynes@1265: 			/* Not unindexed.  The offset is scaled.  */
nkeynes@1265: 			offset = offset * 4;
nkeynes@1265: 			if (NEGATIVE_BIT_SET)
nkeynes@1265: 			  offset = - offset;
nkeynes@1265: 			if (rn != 15)
nkeynes@1265: 			  value_in_comment = offset;
nkeynes@1265: 		      }
nkeynes@1265: 
nkeynes@1265: 		    if (PRE_BIT_SET)
nkeynes@1265: 		      {
nkeynes@1265: 			if (offset)
nkeynes@1265: 			  func (stream, ", #%d]%s",
nkeynes@1265: 				offset,
nkeynes@1265: 				WRITEBACK_BIT_SET ? "!" : "");
nkeynes@1265: 			else if (NEGATIVE_BIT_SET)
nkeynes@1265: 			  func (stream, ", #-0]");
nkeynes@1265: 			else
nkeynes@1265: 			  func (stream, "]");
nkeynes@1265: 		      }
nkeynes@1265: 		    else
nkeynes@1265: 		      {
nkeynes@1265: 			func (stream, "]");
nkeynes@1265: 
nkeynes@1265: 			if (WRITEBACK_BIT_SET)
nkeynes@1265: 			  {
nkeynes@1265: 			    if (offset)
nkeynes@1265: 			      func (stream, ", #%d", offset);
nkeynes@1265: 			    else if (NEGATIVE_BIT_SET)
nkeynes@1265: 			      func (stream, ", #-0");
nkeynes@1265: 			  }
nkeynes@1265: 			else
nkeynes@1265: 			  {
nkeynes@1265: 			    func (stream, ", {%s%d}",
nkeynes@1265: 				  (NEGATIVE_BIT_SET && !offset) ? "-" : "",
nkeynes@1265: 				  offset);
nkeynes@1265: 			    value_in_comment = offset;
nkeynes@1265: 			  }
nkeynes@1265: 		      }
nkeynes@1265: 		    if (rn == 15 && (PRE_BIT_SET || WRITEBACK_BIT_SET))
nkeynes@1265: 		      {
nkeynes@1265: 			func (stream, "\t; ");
nkeynes@1265: 			/* For unaligned PCs, apply off-by-alignment
nkeynes@1265: 			   correction.  */
nkeynes@1265: 			info->print_address_func (offset + pc 
nkeynes@1265: 						  + info->bytes_per_chunk * 2
nkeynes@1265: 						  - (pc & 3),
nkeynes@1265: 				 		  info);
nkeynes@1265: 		      }
nkeynes@1265: 		  }
nkeynes@1265: 		  break;
nkeynes@1265: 
nkeynes@1265: 		case 'B':
nkeynes@1265: 		  {
nkeynes@1265: 		    int regno = ((given >> 12) & 0xf) | ((given >> (22 - 4)) & 0x10);
nkeynes@1265: 		    int offset = (given >> 1) & 0x3f;
nkeynes@1265: 
nkeynes@1265: 		    if (offset == 1)
nkeynes@1265: 		      func (stream, "{d%d}", regno);
nkeynes@1265: 		    else if (regno + offset > 32)
nkeynes@1265: 		      func (stream, "{d%d-<overflow reg d%d>}", regno, regno + offset - 1);
nkeynes@1265: 		    else
nkeynes@1265: 		      func (stream, "{d%d-d%d}", regno, regno + offset - 1);
nkeynes@1265: 		  }
nkeynes@1265: 		  break;
nkeynes@1265: 
nkeynes@1265: 		case 'c':
nkeynes@1265: 		  func (stream, "%s", arm_conditional[cond]);
nkeynes@1265: 		  break;
nkeynes@1265: 
nkeynes@1265: 		case 'I':
nkeynes@1265: 		  /* Print a Cirrus/DSP shift immediate.  */
nkeynes@1265: 		  /* Immediates are 7bit signed ints with bits 0..3 in
nkeynes@1265: 		     bits 0..3 of opcode and bits 4..6 in bits 5..7
nkeynes@1265: 		     of opcode.  */
nkeynes@1265: 		  {
nkeynes@1265: 		    int imm;
nkeynes@1265: 
nkeynes@1265: 		    imm = (given & 0xf) | ((given & 0xe0) >> 1);
nkeynes@1265: 
nkeynes@1265: 		    /* Is ``imm'' a negative number?  */
nkeynes@1265: 		    if (imm & 0x40)
nkeynes@1265: 		      imm |= (-1 << 7);
nkeynes@1265: 
nkeynes@1265: 		    func (stream, "%d", imm);
nkeynes@1265: 		  }
nkeynes@1265: 
nkeynes@1265: 		  break;
nkeynes@1265: 
nkeynes@1265: 		case 'F':
nkeynes@1265: 		  switch (given & 0x00408000)
nkeynes@1265: 		    {
nkeynes@1265: 		    case 0:
nkeynes@1265: 		      func (stream, "4");
nkeynes@1265: 		      break;
nkeynes@1265: 		    case 0x8000:
nkeynes@1265: 		      func (stream, "1");
nkeynes@1265: 		      break;
nkeynes@1265: 		    case 0x00400000:
nkeynes@1265: 		      func (stream, "2");
nkeynes@1265: 		      break;
nkeynes@1265: 		    default:
nkeynes@1265: 		      func (stream, "3");
nkeynes@1265: 		    }
nkeynes@1265: 		  break;
nkeynes@1265: 
nkeynes@1265: 		case 'P':
nkeynes@1265: 		  switch (given & 0x00080080)
nkeynes@1265: 		    {
nkeynes@1265: 		    case 0:
nkeynes@1265: 		      func (stream, "s");
nkeynes@1265: 		      break;
nkeynes@1265: 		    case 0x80:
nkeynes@1265: 		      func (stream, "d");
nkeynes@1265: 		      break;
nkeynes@1265: 		    case 0x00080000:
nkeynes@1265: 		      func (stream, "e");
nkeynes@1265: 		      break;
nkeynes@1265: 		    default:
nkeynes@1265: 		      func (stream, _("<illegal precision>"));
nkeynes@1265: 		      break;
nkeynes@1265: 		    }
nkeynes@1265: 		  break;
nkeynes@1265: 
nkeynes@1265: 		case 'Q':
nkeynes@1265: 		  switch (given & 0x00408000)
nkeynes@1265: 		    {
nkeynes@1265: 		    case 0:
nkeynes@1265: 		      func (stream, "s");
nkeynes@1265: 		      break;
nkeynes@1265: 		    case 0x8000:
nkeynes@1265: 		      func (stream, "d");
nkeynes@1265: 		      break;
nkeynes@1265: 		    case 0x00400000:
nkeynes@1265: 		      func (stream, "e");
nkeynes@1265: 		      break;
nkeynes@1265: 		    default:
nkeynes@1265: 		      func (stream, "p");
nkeynes@1265: 		      break;
nkeynes@1265: 		    }
nkeynes@1265: 		  break;
nkeynes@1265: 
nkeynes@1265: 		case 'R':
nkeynes@1265: 		  switch (given & 0x60)
nkeynes@1265: 		    {
nkeynes@1265: 		    case 0:
nkeynes@1265: 		      break;
nkeynes@1265: 		    case 0x20:
nkeynes@1265: 		      func (stream, "p");
nkeynes@1265: 		      break;
nkeynes@1265: 		    case 0x40:
nkeynes@1265: 		      func (stream, "m");
nkeynes@1265: 		      break;
nkeynes@1265: 		    default:
nkeynes@1265: 		      func (stream, "z");
nkeynes@1265: 		      break;
nkeynes@1265: 		    }
nkeynes@1265: 		  break;
nkeynes@1265: 
nkeynes@1265: 		case '0': case '1': case '2': case '3': case '4':
nkeynes@1265: 		case '5': case '6': case '7': case '8': case '9':
nkeynes@1265: 		  {
nkeynes@1265: 		    int width;
nkeynes@1265: 
nkeynes@1265: 		    c = arm_decode_bitfield (c, given, &value, &width);
nkeynes@1265: 
nkeynes@1265: 		    switch (*c)
nkeynes@1265: 		      {
nkeynes@1265: 		      case 'R':
nkeynes@1265: 			if (value == 15)
nkeynes@1265: 			  is_unpredictable = TRUE;
nkeynes@1265: 			/* Fall through.  */
nkeynes@1265: 		      case 'r':
nkeynes@1265: 			if (c[1] == 'u')
nkeynes@1265: 			  {
nkeynes@1265: 			    /* Eat the 'u' character.  */
nkeynes@1265: 			    ++ c;
nkeynes@1265: 
nkeynes@1265: 			    if (u_reg == value)
nkeynes@1265: 			      is_unpredictable = TRUE;
nkeynes@1265: 			    u_reg = value;
nkeynes@1265: 			  }
nkeynes@1265: 			func (stream, "%s", arm_regnames[value]);
nkeynes@1265: 			break;
nkeynes@1265: 		      case 'D':
nkeynes@1265: 			func (stream, "d%ld", value);
nkeynes@1265: 			break;
nkeynes@1265: 		      case 'Q':
nkeynes@1265: 			if (value & 1)
nkeynes@1265: 			  func (stream, "<illegal reg q%ld.5>", value >> 1);
nkeynes@1265: 			else
nkeynes@1265: 			  func (stream, "q%ld", value >> 1);
nkeynes@1265: 			break;
nkeynes@1265: 		      case 'd':
nkeynes@1265: 			func (stream, "%ld", value);
nkeynes@1265: 			value_in_comment = value;
nkeynes@1265: 			break;
nkeynes@1265: 		      case 'k':
nkeynes@1265: 			{
nkeynes@1265: 			  int from = (given & (1 << 7)) ? 32 : 16;
nkeynes@1265: 			  func (stream, "%ld", from - value);
nkeynes@1265: 			}
nkeynes@1265: 			break;
nkeynes@1265: 
nkeynes@1265: 		      case 'f':
nkeynes@1265: 			if (value > 7)
nkeynes@1265: 			  func (stream, "#%s", arm_fp_const[value & 7]);
nkeynes@1265: 			else
nkeynes@1265: 			  func (stream, "f%ld", value);
nkeynes@1265: 			break;
nkeynes@1265: 
nkeynes@1265: 		      case 'w':
nkeynes@1265: 			if (width == 2)
nkeynes@1265: 			  func (stream, "%s", iwmmxt_wwnames[value]);
nkeynes@1265: 			else
nkeynes@1265: 			  func (stream, "%s", iwmmxt_wwssnames[value]);
nkeynes@1265: 			break;
nkeynes@1265: 
nkeynes@1265: 		      case 'g':
nkeynes@1265: 			func (stream, "%s", iwmmxt_regnames[value]);
nkeynes@1265: 			break;
nkeynes@1265: 		      case 'G':
nkeynes@1265: 			func (stream, "%s", iwmmxt_cregnames[value]);
nkeynes@1265: 			break;
nkeynes@1265: 
nkeynes@1265: 		      case 'x':
nkeynes@1265: 			func (stream, "0x%lx", (value & 0xffffffffUL));
nkeynes@1265: 			break;
nkeynes@1265: 
nkeynes@1265: 		      case '`':
nkeynes@1265: 			c++;
nkeynes@1265: 			if (value == 0)
nkeynes@1265: 			  func (stream, "%c", *c);
nkeynes@1265: 			break;
nkeynes@1265: 		      case '\'':
nkeynes@1265: 			c++;
nkeynes@1265: 			if (value == ((1ul << width) - 1))
nkeynes@1265: 			  func (stream, "%c", *c);
nkeynes@1265: 			break;
nkeynes@1265: 		      case '?':
nkeynes@1265: 			func (stream, "%c", c[(1 << width) - (int) value]);
nkeynes@1265: 			c += 1 << width;
nkeynes@1265: 			break;
nkeynes@1265: 		      default:
nkeynes@1265: 			abort ();
nkeynes@1265: 		      }
nkeynes@1265: 		    break;
nkeynes@1265: 
nkeynes@1265: 		  case 'y':
nkeynes@1265: 		  case 'z':
nkeynes@1265: 		    {
nkeynes@1265: 		      int single = *c++ == 'y';
nkeynes@1265: 		      int regno;
nkeynes@1265: 
nkeynes@1265: 		      switch (*c)
nkeynes@1265: 			{
nkeynes@1265: 			case '4': /* Sm pair */
nkeynes@1265: 			case '0': /* Sm, Dm */
nkeynes@1265: 			  regno = given & 0x0000000f;
nkeynes@1265: 			  if (single)
nkeynes@1265: 			    {
nkeynes@1265: 			      regno <<= 1;
nkeynes@1265: 			      regno += (given >> 5) & 1;
nkeynes@1265: 			    }
nkeynes@1265: 			  else
nkeynes@1265: 			    regno += ((given >> 5) & 1) << 4;
nkeynes@1265: 			  break;
nkeynes@1265: 
nkeynes@1265: 			case '1': /* Sd, Dd */
nkeynes@1265: 			  regno = (given >> 12) & 0x0000000f;
nkeynes@1265: 			  if (single)
nkeynes@1265: 			    {
nkeynes@1265: 			      regno <<= 1;
nkeynes@1265: 			      regno += (given >> 22) & 1;
nkeynes@1265: 			    }
nkeynes@1265: 			  else
nkeynes@1265: 			    regno += ((given >> 22) & 1) << 4;
nkeynes@1265: 			  break;
nkeynes@1265: 
nkeynes@1265: 			case '2': /* Sn, Dn */
nkeynes@1265: 			  regno = (given >> 16) & 0x0000000f;
nkeynes@1265: 			  if (single)
nkeynes@1265: 			    {
nkeynes@1265: 			      regno <<= 1;
nkeynes@1265: 			      regno += (given >> 7) & 1;
nkeynes@1265: 			    }
nkeynes@1265: 			  else
nkeynes@1265: 			    regno += ((given >> 7) & 1) << 4;
nkeynes@1265: 			  break;
nkeynes@1265: 
nkeynes@1265: 			case '3': /* List */
nkeynes@1265: 			  func (stream, "{");
nkeynes@1265: 			  regno = (given >> 12) & 0x0000000f;
nkeynes@1265: 			  if (single)
nkeynes@1265: 			    {
nkeynes@1265: 			      regno <<= 1;
nkeynes@1265: 			      regno += (given >> 22) & 1;
nkeynes@1265: 			    }
nkeynes@1265: 			  else
nkeynes@1265: 			    regno += ((given >> 22) & 1) << 4;
nkeynes@1265: 			  break;
nkeynes@1265: 
nkeynes@1265: 			default:
nkeynes@1265: 			  abort ();
nkeynes@1265: 			}
nkeynes@1265: 
nkeynes@1265: 		      func (stream, "%c%d", single ? 's' : 'd', regno);
nkeynes@1265: 
nkeynes@1265: 		      if (*c == '3')
nkeynes@1265: 			{
nkeynes@1265: 			  int count = given & 0xff;
nkeynes@1265: 
nkeynes@1265: 			  if (single == 0)
nkeynes@1265: 			    count >>= 1;
nkeynes@1265: 
nkeynes@1265: 			  if (--count)
nkeynes@1265: 			    {
nkeynes@1265: 			      func (stream, "-%c%d",
nkeynes@1265: 				    single ? 's' : 'd',
nkeynes@1265: 				    regno + count);
nkeynes@1265: 			    }
nkeynes@1265: 
nkeynes@1265: 			  func (stream, "}");
nkeynes@1265: 			}
nkeynes@1265: 		      else if (*c == '4')
nkeynes@1265: 			func (stream, ", %c%d", single ? 's' : 'd',
nkeynes@1265: 			      regno + 1);
nkeynes@1265: 		    }
nkeynes@1265: 		    break;
nkeynes@1265: 
nkeynes@1265: 		  case 'L':
nkeynes@1265: 		    switch (given & 0x00400100)
nkeynes@1265: 		      {
nkeynes@1265: 		      case 0x00000000: func (stream, "b"); break;
nkeynes@1265: 		      case 0x00400000: func (stream, "h"); break;
nkeynes@1265: 		      case 0x00000100: func (stream, "w"); break;
nkeynes@1265: 		      case 0x00400100: func (stream, "d"); break;
nkeynes@1265: 		      default:
nkeynes@1265: 			break;
nkeynes@1265: 		      }
nkeynes@1265: 		    break;
nkeynes@1265: 
nkeynes@1265: 		  case 'Z':
nkeynes@1265: 		    {
nkeynes@1265: 		      /* given (20, 23) | given (0, 3) */
nkeynes@1265: 		      value = ((given >> 16) & 0xf0) | (given & 0xf);
nkeynes@1265: 		      func (stream, "%d", value);
nkeynes@1265: 		    }
nkeynes@1265: 		    break;
nkeynes@1265: 
nkeynes@1265: 		  case 'l':
nkeynes@1265: 		    /* This is like the 'A' operator, except that if
nkeynes@1265: 		       the width field "M" is zero, then the offset is
nkeynes@1265: 		       *not* multiplied by four.  */
nkeynes@1265: 		    {
nkeynes@1265: 		      int offset = given & 0xff;
nkeynes@1265: 		      int multiplier = (given & 0x00000100) ? 4 : 1;
nkeynes@1265: 
nkeynes@1265: 		      func (stream, "[%s", arm_regnames [(given >> 16) & 0xf]);
nkeynes@1265: 
nkeynes@1265: 		      if (multiplier > 1)
nkeynes@1265: 			{
nkeynes@1265: 			  value_in_comment = offset * multiplier;
nkeynes@1265: 			  if (NEGATIVE_BIT_SET)
nkeynes@1265: 			    value_in_comment = - value_in_comment;
nkeynes@1265: 			}
nkeynes@1265: 
nkeynes@1265: 		      if (offset)
nkeynes@1265: 			{
nkeynes@1265: 			  if (PRE_BIT_SET)
nkeynes@1265: 			    func (stream, ", #%s%d]%s",
nkeynes@1265: 				  NEGATIVE_BIT_SET ? "-" : "",
nkeynes@1265: 				  offset * multiplier,
nkeynes@1265: 				  WRITEBACK_BIT_SET ? "!" : "");
nkeynes@1265: 			  else
nkeynes@1265: 			    func (stream, "], #%s%d",
nkeynes@1265: 				  NEGATIVE_BIT_SET ? "-" : "",
nkeynes@1265: 				  offset * multiplier);
nkeynes@1265: 			}
nkeynes@1265: 		      else
nkeynes@1265: 			func (stream, "]");
nkeynes@1265: 		    }
nkeynes@1265: 		    break;
nkeynes@1265: 
nkeynes@1265: 		  case 'r':
nkeynes@1265: 		    {
nkeynes@1265: 		      int imm4 = (given >> 4) & 0xf;
nkeynes@1265: 		      int puw_bits = ((given >> 22) & 6) | ((given >> W_BIT) & 1);
nkeynes@1265: 		      int ubit = ! NEGATIVE_BIT_SET;
nkeynes@1265: 		      const char *rm = arm_regnames [given & 0xf];
nkeynes@1265: 		      const char *rn = arm_regnames [(given >> 16) & 0xf];
nkeynes@1265: 
nkeynes@1265: 		      switch (puw_bits)
nkeynes@1265: 			{
nkeynes@1265: 			case 1:
nkeynes@1265: 			case 3:
nkeynes@1265: 			  func (stream, "[%s], %c%s", rn, ubit ? '+' : '-', rm);
nkeynes@1265: 			  if (imm4)
nkeynes@1265: 			    func (stream, ", lsl #%d", imm4);
nkeynes@1265: 			  break;
nkeynes@1265: 
nkeynes@1265: 			case 4:
nkeynes@1265: 			case 5:
nkeynes@1265: 			case 6:
nkeynes@1265: 			case 7:
nkeynes@1265: 			  func (stream, "[%s, %c%s", rn, ubit ? '+' : '-', rm);
nkeynes@1265: 			  if (imm4 > 0)
nkeynes@1265: 			    func (stream, ", lsl #%d", imm4);
nkeynes@1265: 			  func (stream, "]");
nkeynes@1265: 			  if (puw_bits == 5 || puw_bits == 7)
nkeynes@1265: 			    func (stream, "!");
nkeynes@1265: 			  break;
nkeynes@1265: 
nkeynes@1265: 			default:
nkeynes@1265: 			  func (stream, "INVALID");
nkeynes@1265: 			}
nkeynes@1265: 		    }
nkeynes@1265: 		    break;
nkeynes@1265: 
nkeynes@1265: 		  case 'i':
nkeynes@1265: 		    {
nkeynes@1265: 		      long imm5;
nkeynes@1265: 		      imm5 = ((given & 0x100) >> 4) | (given & 0xf);
nkeynes@1265: 		      func (stream, "%ld", (imm5 == 0) ? 32 : imm5);
nkeynes@1265: 		    }
nkeynes@1265: 		    break;
nkeynes@1265: 
nkeynes@1265: 		  default:
nkeynes@1265: 		    abort ();
nkeynes@1265: 		  }
nkeynes@1265: 		}
nkeynes@1265: 	    }
nkeynes@1265: 	  else
nkeynes@1265: 	    func (stream, "%c", *c);
nkeynes@1265: 	}
nkeynes@1265: 
nkeynes@1265:       if (value_in_comment > 32 || value_in_comment < -16)
nkeynes@1265: 	func (stream, "\t; 0x%lx", (value_in_comment & 0xffffffffUL));
nkeynes@1265: 
nkeynes@1265:       if (is_unpredictable)
nkeynes@1265: 	func (stream, UNPREDICTABLE_INSTRUCTION);
nkeynes@1265: 
nkeynes@1265:       return TRUE;
nkeynes@1265:     }
nkeynes@1265:   return FALSE;
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: /* Decodes and prints ARM addressing modes.  Returns the offset
nkeynes@1265:    used in the address, if any, if it is worthwhile printing the
nkeynes@1265:    offset as a hexadecimal value in a comment at the end of the
nkeynes@1265:    line of disassembly.  */
nkeynes@1265: 
nkeynes@1265: static signed long
nkeynes@1265: print_arm_address (bfd_vma pc, struct disassemble_info *info, long given)
nkeynes@1265: {
nkeynes@1265:   void *stream = info->stream;
nkeynes@1265:   fprintf_ftype func = info->fprintf_func;
nkeynes@1265:   bfd_vma offset = 0;
nkeynes@1265: 
nkeynes@1265:   if (((given & 0x000f0000) == 0x000f0000)
nkeynes@1265:       && ((given & 0x02000000) == 0))
nkeynes@1265:     {
nkeynes@1265:       offset = given & 0xfff;
nkeynes@1265: 
nkeynes@1265:       func (stream, "[pc");
nkeynes@1265: 
nkeynes@1265:       if (PRE_BIT_SET)
nkeynes@1265: 	{
nkeynes@1265: 	  /* Pre-indexed.  Elide offset of positive zero when
nkeynes@1265: 	     non-writeback.  */
nkeynes@1265: 	  if (WRITEBACK_BIT_SET || NEGATIVE_BIT_SET || offset)
nkeynes@1265: 	    func (stream, ", #%s%d", NEGATIVE_BIT_SET ? "-" : "", offset);
nkeynes@1265: 
nkeynes@1265: 	  if (NEGATIVE_BIT_SET)
nkeynes@1265: 	    offset = -offset;
nkeynes@1265: 
nkeynes@1265: 	  offset += pc + 8;
nkeynes@1265: 
nkeynes@1265: 	  /* Cope with the possibility of write-back
nkeynes@1265: 	     being used.  Probably a very dangerous thing
nkeynes@1265: 	     for the programmer to do, but who are we to
nkeynes@1265: 	     argue ?  */
nkeynes@1265: 	  func (stream, "]%s", WRITEBACK_BIT_SET ? "!" : "");
nkeynes@1265: 	}
nkeynes@1265:       else  /* Post indexed.  */
nkeynes@1265: 	{
nkeynes@1265: 	  func (stream, "], #%s%d", NEGATIVE_BIT_SET ? "-" : "", offset);
nkeynes@1265: 
nkeynes@1265: 	  /* Ie ignore the offset.  */
nkeynes@1265: 	  offset = pc + 8;
nkeynes@1265: 	}
nkeynes@1265: 
nkeynes@1265:       func (stream, "\t; ");
nkeynes@1265:       info->print_address_func (offset, info);
nkeynes@1265:       offset = 0;
nkeynes@1265:     }
nkeynes@1265:   else
nkeynes@1265:     {
nkeynes@1265:       func (stream, "[%s",
nkeynes@1265: 	    arm_regnames[(given >> 16) & 0xf]);
nkeynes@1265: 
nkeynes@1265:       if (PRE_BIT_SET)
nkeynes@1265: 	{
nkeynes@1265: 	  if ((given & 0x02000000) == 0)
nkeynes@1265: 	    {
nkeynes@1265: 	      /* Elide offset of positive zero when non-writeback.  */
nkeynes@1265: 	      offset = given & 0xfff;
nkeynes@1265: 	      if (WRITEBACK_BIT_SET || NEGATIVE_BIT_SET || offset)
nkeynes@1265: 		func (stream, ", #%s%d", NEGATIVE_BIT_SET ? "-" : "", offset);
nkeynes@1265: 	    }
nkeynes@1265: 	  else
nkeynes@1265: 	    {
nkeynes@1265: 	      func (stream, ", %s", NEGATIVE_BIT_SET ? "-" : "");
nkeynes@1265: 	      arm_decode_shift (given, func, stream, TRUE);
nkeynes@1265: 	    }
nkeynes@1265: 
nkeynes@1265: 	  func (stream, "]%s",
nkeynes@1265: 		WRITEBACK_BIT_SET ? "!" : "");
nkeynes@1265: 	}
nkeynes@1265:       else
nkeynes@1265: 	{
nkeynes@1265: 	  if ((given & 0x02000000) == 0)
nkeynes@1265: 	    {
nkeynes@1265: 	      /* Always show offset.  */
nkeynes@1265: 	      offset = given & 0xfff;
nkeynes@1265: 	      func (stream, "], #%s%d",
nkeynes@1265: 		    NEGATIVE_BIT_SET ? "-" : "", offset);
nkeynes@1265: 	    }
nkeynes@1265: 	  else
nkeynes@1265: 	    {
nkeynes@1265: 	      func (stream, "], %s",
nkeynes@1265: 		    NEGATIVE_BIT_SET ? "-" : "");
nkeynes@1265: 	      arm_decode_shift (given, func, stream, TRUE);
nkeynes@1265: 	    }
nkeynes@1265: 	}
nkeynes@1265:     }
nkeynes@1265: 
nkeynes@1265:   return (signed long) offset;
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: /* Print one neon instruction on INFO->STREAM.
nkeynes@1265:    Return TRUE if the instuction matched, FALSE if this is not a
nkeynes@1265:    recognised neon instruction.  */
nkeynes@1265: 
nkeynes@1265: static bfd_boolean
nkeynes@1265: print_insn_neon (struct disassemble_info *info, long given, bfd_boolean thumb)
nkeynes@1265: {
nkeynes@1265:   const struct opcode32 *insn;
nkeynes@1265:   void *stream = info->stream;
nkeynes@1265:   fprintf_ftype func = info->fprintf_func;
nkeynes@1265: 
nkeynes@1265:   if (thumb)
nkeynes@1265:     {
nkeynes@1265:       if ((given & 0xef000000) == 0xef000000)
nkeynes@1265: 	{
nkeynes@1265: 	  /* Move bit 28 to bit 24 to translate Thumb2 to ARM encoding.  */
nkeynes@1265: 	  unsigned long bit28 = given & (1 << 28);
nkeynes@1265: 
nkeynes@1265: 	  given &= 0x00ffffff;
nkeynes@1265: 	  if (bit28)
nkeynes@1265:             given |= 0xf3000000;
nkeynes@1265:           else
nkeynes@1265: 	    given |= 0xf2000000;
nkeynes@1265: 	}
nkeynes@1265:       else if ((given & 0xff000000) == 0xf9000000)
nkeynes@1265: 	given ^= 0xf9000000 ^ 0xf4000000;
nkeynes@1265:       else
nkeynes@1265: 	return FALSE;
nkeynes@1265:     }
nkeynes@1265:   
nkeynes@1265:   for (insn = neon_opcodes; insn->assembler; insn++)
nkeynes@1265:     {
nkeynes@1265:       if ((given & insn->mask) == insn->value)
nkeynes@1265: 	{
nkeynes@1265: 	  signed long value_in_comment = 0;
nkeynes@1265: 	  const char *c;
nkeynes@1265: 
nkeynes@1265: 	  for (c = insn->assembler; *c; c++)
nkeynes@1265: 	    {
nkeynes@1265: 	      if (*c == '%')
nkeynes@1265: 		{
nkeynes@1265: 		  switch (*++c)
nkeynes@1265: 		    {
nkeynes@1265: 		    case '%':
nkeynes@1265: 		      func (stream, "%%");
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 'c':
nkeynes@1265: 		      if (thumb && ifthen_state)
nkeynes@1265: 			func (stream, "%s", arm_conditional[IFTHEN_COND]);
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 'A':
nkeynes@1265: 		      {
nkeynes@1265: 			static const unsigned char enc[16] = 
nkeynes@1265: 			{
nkeynes@1265: 			  0x4, 0x14, /* st4 0,1 */
nkeynes@1265: 			  0x4, /* st1 2 */
nkeynes@1265: 			  0x4, /* st2 3 */
nkeynes@1265: 			  0x3, /* st3 4 */
nkeynes@1265: 			  0x13, /* st3 5 */
nkeynes@1265: 			  0x3, /* st1 6 */
nkeynes@1265: 			  0x1, /* st1 7 */
nkeynes@1265: 			  0x2, /* st2 8 */
nkeynes@1265: 			  0x12, /* st2 9 */
nkeynes@1265: 			  0x2, /* st1 10 */
nkeynes@1265: 			  0, 0, 0, 0, 0
nkeynes@1265: 			};
nkeynes@1265: 			int rd = ((given >> 12) & 0xf) | (((given >> 22) & 1) << 4);
nkeynes@1265: 			int rn = ((given >> 16) & 0xf);
nkeynes@1265: 			int rm = ((given >> 0) & 0xf);
nkeynes@1265: 			int align = ((given >> 4) & 0x3);
nkeynes@1265: 			int type = ((given >> 8) & 0xf);
nkeynes@1265: 			int n = enc[type] & 0xf;
nkeynes@1265: 			int stride = (enc[type] >> 4) + 1;
nkeynes@1265: 			int ix;
nkeynes@1265: 			
nkeynes@1265: 			func (stream, "{");
nkeynes@1265: 			if (stride > 1)
nkeynes@1265: 			  for (ix = 0; ix != n; ix++)
nkeynes@1265: 			    func (stream, "%sd%d", ix ? "," : "", rd + ix * stride);
nkeynes@1265: 			else if (n == 1)
nkeynes@1265: 			  func (stream, "d%d", rd);
nkeynes@1265: 			else
nkeynes@1265: 			  func (stream, "d%d-d%d", rd, rd + n - 1);
nkeynes@1265: 			func (stream, "}, [%s", arm_regnames[rn]);
nkeynes@1265: 			if (align)
nkeynes@1265: 			  func (stream, " :%d", 32 << align);
nkeynes@1265: 			func (stream, "]");
nkeynes@1265: 			if (rm == 0xd)
nkeynes@1265: 			  func (stream, "!");
nkeynes@1265: 			else if (rm != 0xf)
nkeynes@1265: 			  func (stream, ", %s", arm_regnames[rm]);
nkeynes@1265: 		      }
nkeynes@1265: 		      break;
nkeynes@1265: 		      
nkeynes@1265: 		    case 'B':
nkeynes@1265: 		      {
nkeynes@1265: 			int rd = ((given >> 12) & 0xf) | (((given >> 22) & 1) << 4);
nkeynes@1265: 			int rn = ((given >> 16) & 0xf);
nkeynes@1265: 			int rm = ((given >> 0) & 0xf);
nkeynes@1265: 			int idx_align = ((given >> 4) & 0xf);
nkeynes@1265:                         int align = 0;
nkeynes@1265: 			int size = ((given >> 10) & 0x3);
nkeynes@1265: 			int idx = idx_align >> (size + 1);
nkeynes@1265:                         int length = ((given >> 8) & 3) + 1;
nkeynes@1265:                         int stride = 1;
nkeynes@1265:                         int i;
nkeynes@1265: 
nkeynes@1265:                         if (length > 1 && size > 0)
nkeynes@1265:                           stride = (idx_align & (1 << size)) ? 2 : 1;
nkeynes@1265: 			
nkeynes@1265:                         switch (length)
nkeynes@1265:                           {
nkeynes@1265:                           case 1:
nkeynes@1265:                             {
nkeynes@1265:                               int amask = (1 << size) - 1;
nkeynes@1265:                               if ((idx_align & (1 << size)) != 0)
nkeynes@1265:                                 return FALSE;
nkeynes@1265:                               if (size > 0)
nkeynes@1265:                                 {
nkeynes@1265:                                   if ((idx_align & amask) == amask)
nkeynes@1265:                                     align = 8 << size;
nkeynes@1265:                                   else if ((idx_align & amask) != 0)
nkeynes@1265:                                     return FALSE;
nkeynes@1265:                                 }
nkeynes@1265:                               }
nkeynes@1265:                             break;
nkeynes@1265:                           
nkeynes@1265:                           case 2:
nkeynes@1265:                             if (size == 2 && (idx_align & 2) != 0)
nkeynes@1265:                               return FALSE;
nkeynes@1265:                             align = (idx_align & 1) ? 16 << size : 0;
nkeynes@1265:                             break;
nkeynes@1265:                           
nkeynes@1265:                           case 3:
nkeynes@1265:                             if ((size == 2 && (idx_align & 3) != 0)
nkeynes@1265:                                 || (idx_align & 1) != 0)
nkeynes@1265:                               return FALSE;
nkeynes@1265:                             break;
nkeynes@1265:                           
nkeynes@1265:                           case 4:
nkeynes@1265:                             if (size == 2)
nkeynes@1265:                               {
nkeynes@1265:                                 if ((idx_align & 3) == 3)
nkeynes@1265:                                   return FALSE;
nkeynes@1265:                                 align = (idx_align & 3) * 64;
nkeynes@1265:                               }
nkeynes@1265:                             else
nkeynes@1265:                               align = (idx_align & 1) ? 32 << size : 0;
nkeynes@1265:                             break;
nkeynes@1265:                           
nkeynes@1265:                           default:
nkeynes@1265:                             abort ();
nkeynes@1265:                           }
nkeynes@1265:                                 
nkeynes@1265: 			func (stream, "{");
nkeynes@1265:                         for (i = 0; i < length; i++)
nkeynes@1265:                           func (stream, "%sd%d[%d]", (i == 0) ? "" : ",",
nkeynes@1265:                             rd + i * stride, idx);
nkeynes@1265:                         func (stream, "}, [%s", arm_regnames[rn]);
nkeynes@1265: 			if (align)
nkeynes@1265: 			  func (stream, " :%d", align);
nkeynes@1265: 			func (stream, "]");
nkeynes@1265: 			if (rm == 0xd)
nkeynes@1265: 			  func (stream, "!");
nkeynes@1265: 			else if (rm != 0xf)
nkeynes@1265: 			  func (stream, ", %s", arm_regnames[rm]);
nkeynes@1265: 		      }
nkeynes@1265: 		      break;
nkeynes@1265: 		      
nkeynes@1265: 		    case 'C':
nkeynes@1265: 		      {
nkeynes@1265: 			int rd = ((given >> 12) & 0xf) | (((given >> 22) & 1) << 4);
nkeynes@1265: 			int rn = ((given >> 16) & 0xf);
nkeynes@1265: 			int rm = ((given >> 0) & 0xf);
nkeynes@1265: 			int align = ((given >> 4) & 0x1);
nkeynes@1265: 			int size = ((given >> 6) & 0x3);
nkeynes@1265: 			int type = ((given >> 8) & 0x3);
nkeynes@1265: 			int n = type + 1;
nkeynes@1265: 			int stride = ((given >> 5) & 0x1);
nkeynes@1265: 			int ix;
nkeynes@1265: 			
nkeynes@1265: 			if (stride && (n == 1))
nkeynes@1265: 			  n++;
nkeynes@1265: 			else
nkeynes@1265: 			  stride++;
nkeynes@1265: 			
nkeynes@1265: 			func (stream, "{");
nkeynes@1265: 			if (stride > 1)
nkeynes@1265: 			  for (ix = 0; ix != n; ix++)
nkeynes@1265: 			    func (stream, "%sd%d[]", ix ? "," : "", rd + ix * stride);
nkeynes@1265: 			else if (n == 1)
nkeynes@1265: 			  func (stream, "d%d[]", rd);
nkeynes@1265: 			else
nkeynes@1265: 			  func (stream, "d%d[]-d%d[]", rd, rd + n - 1);
nkeynes@1265: 			func (stream, "}, [%s", arm_regnames[rn]);
nkeynes@1265: 			if (align)
nkeynes@1265: 			  {
nkeynes@1265:                             align = (8 * (type + 1)) << size;
nkeynes@1265:                             if (type == 3)
nkeynes@1265:                               align = (size > 1) ? align >> 1 : align;
nkeynes@1265: 			    if (type == 2 || (type == 0 && !size))
nkeynes@1265: 			      func (stream, " :<bad align %d>", align);
nkeynes@1265: 			    else
nkeynes@1265: 			      func (stream, " :%d", align);
nkeynes@1265: 			  }
nkeynes@1265: 			func (stream, "]");
nkeynes@1265: 			if (rm == 0xd)
nkeynes@1265: 			  func (stream, "!");
nkeynes@1265: 			else if (rm != 0xf)
nkeynes@1265: 			  func (stream, ", %s", arm_regnames[rm]);
nkeynes@1265: 		      }
nkeynes@1265: 		      break;
nkeynes@1265: 		      
nkeynes@1265: 		    case 'D':
nkeynes@1265: 		      {
nkeynes@1265: 			int raw_reg = (given & 0xf) | ((given >> 1) & 0x10);
nkeynes@1265: 			int size = (given >> 20) & 3;
nkeynes@1265: 			int reg = raw_reg & ((4 << size) - 1);
nkeynes@1265: 			int ix = raw_reg >> size >> 2;
nkeynes@1265: 			
nkeynes@1265: 			func (stream, "d%d[%d]", reg, ix);
nkeynes@1265: 		      }
nkeynes@1265: 		      break;
nkeynes@1265: 		      
nkeynes@1265: 		    case 'E':
nkeynes@1265: 		      /* Neon encoded constant for mov, mvn, vorr, vbic.  */
nkeynes@1265: 		      {
nkeynes@1265: 			int bits = 0;
nkeynes@1265: 			int cmode = (given >> 8) & 0xf;
nkeynes@1265: 			int op = (given >> 5) & 0x1;
nkeynes@1265: 			unsigned long value = 0, hival = 0;
nkeynes@1265: 			unsigned shift;
nkeynes@1265:                         int size = 0;
nkeynes@1265:                         int isfloat = 0;
nkeynes@1265: 			
nkeynes@1265: 			bits |= ((given >> 24) & 1) << 7;
nkeynes@1265: 			bits |= ((given >> 16) & 7) << 4;
nkeynes@1265: 			bits |= ((given >> 0) & 15) << 0;
nkeynes@1265: 			
nkeynes@1265: 			if (cmode < 8)
nkeynes@1265: 			  {
nkeynes@1265: 			    shift = (cmode >> 1) & 3;
nkeynes@1265: 			    value = (unsigned long) bits << (8 * shift);
nkeynes@1265:                             size = 32;
nkeynes@1265: 			  }
nkeynes@1265: 			else if (cmode < 12)
nkeynes@1265: 			  {
nkeynes@1265: 			    shift = (cmode >> 1) & 1;
nkeynes@1265: 			    value = (unsigned long) bits << (8 * shift);
nkeynes@1265:                             size = 16;
nkeynes@1265: 			  }
nkeynes@1265: 			else if (cmode < 14)
nkeynes@1265: 			  {
nkeynes@1265: 			    shift = (cmode & 1) + 1;
nkeynes@1265: 			    value = (unsigned long) bits << (8 * shift);
nkeynes@1265: 			    value |= (1ul << (8 * shift)) - 1;
nkeynes@1265:                             size = 32;
nkeynes@1265: 			  }
nkeynes@1265: 			else if (cmode == 14)
nkeynes@1265: 			  {
nkeynes@1265: 			    if (op)
nkeynes@1265: 			      {
nkeynes@1265: 				/* Bit replication into bytes.  */
nkeynes@1265: 				int ix;
nkeynes@1265: 				unsigned long mask;
nkeynes@1265: 				
nkeynes@1265: 				value = 0;
nkeynes@1265:                                 hival = 0;
nkeynes@1265: 				for (ix = 7; ix >= 0; ix--)
nkeynes@1265: 				  {
nkeynes@1265: 				    mask = ((bits >> ix) & 1) ? 0xff : 0;
nkeynes@1265:                                     if (ix <= 3)
nkeynes@1265: 				      value = (value << 8) | mask;
nkeynes@1265:                                     else
nkeynes@1265:                                       hival = (hival << 8) | mask;
nkeynes@1265: 				  }
nkeynes@1265:                                 size = 64;
nkeynes@1265: 			      }
nkeynes@1265:                             else
nkeynes@1265:                               {
nkeynes@1265:                                 /* Byte replication.  */
nkeynes@1265:                                 value = (unsigned long) bits;
nkeynes@1265:                                 size = 8;
nkeynes@1265:                               }
nkeynes@1265: 			  }
nkeynes@1265: 			else if (!op)
nkeynes@1265: 			  {
nkeynes@1265: 			    /* Floating point encoding.  */
nkeynes@1265: 			    int tmp;
nkeynes@1265: 			    
nkeynes@1265: 			    value = (unsigned long)  (bits & 0x7f) << 19;
nkeynes@1265: 			    value |= (unsigned long) (bits & 0x80) << 24;
nkeynes@1265: 			    tmp = bits & 0x40 ? 0x3c : 0x40;
nkeynes@1265: 			    value |= (unsigned long) tmp << 24;
nkeynes@1265:                             size = 32;
nkeynes@1265:                             isfloat = 1;
nkeynes@1265: 			  }
nkeynes@1265: 			else
nkeynes@1265: 			  {
nkeynes@1265: 			    func (stream, "<illegal constant %.8x:%x:%x>",
nkeynes@1265:                                   bits, cmode, op);
nkeynes@1265:                             size = 32;
nkeynes@1265: 			    break;
nkeynes@1265: 			  }
nkeynes@1265:                         switch (size)
nkeynes@1265:                           {
nkeynes@1265:                           case 8:
nkeynes@1265: 			    func (stream, "#%ld\t; 0x%.2lx", value, value);
nkeynes@1265:                             break;
nkeynes@1265:                           
nkeynes@1265:                           case 16:
nkeynes@1265:                             func (stream, "#%ld\t; 0x%.4lx", value, value);
nkeynes@1265:                             break;
nkeynes@1265: 
nkeynes@1265:                           case 32:
nkeynes@1265:                             if (isfloat)
nkeynes@1265:                               {
nkeynes@1265:                                 unsigned char valbytes[4];
nkeynes@1265:                                 double fvalue;
nkeynes@1265:                                 
nkeynes@1265:                                 /* Do this a byte at a time so we don't have to
nkeynes@1265:                                    worry about the host's endianness.  */
nkeynes@1265:                                 valbytes[0] = value & 0xff;
nkeynes@1265:                                 valbytes[1] = (value >> 8) & 0xff;
nkeynes@1265:                                 valbytes[2] = (value >> 16) & 0xff;
nkeynes@1265:                                 valbytes[3] = (value >> 24) & 0xff;
nkeynes@1265:                                 
nkeynes@1265:                                 floatformat_to_double 
nkeynes@1265:                                   (& floatformat_ieee_single_little, valbytes,
nkeynes@1265:                                   & fvalue);
nkeynes@1265:                                                                 
nkeynes@1265:                                 func (stream, "#%.7g\t; 0x%.8lx", fvalue,
nkeynes@1265:                                       value);
nkeynes@1265:                               }
nkeynes@1265:                             else
nkeynes@1265:                               func (stream, "#%ld\t; 0x%.8lx",
nkeynes@1265: 				    (long) (((value & 0x80000000L) != 0) 
nkeynes@1265: 					    ? value | ~0xffffffffL : value),
nkeynes@1265: 				    value);
nkeynes@1265:                             break;
nkeynes@1265: 
nkeynes@1265:                           case 64:
nkeynes@1265:                             func (stream, "#0x%.8lx%.8lx", hival, value);
nkeynes@1265:                             break;
nkeynes@1265:                           
nkeynes@1265:                           default:
nkeynes@1265:                             abort ();
nkeynes@1265:                           }
nkeynes@1265: 		      }
nkeynes@1265: 		      break;
nkeynes@1265: 		      
nkeynes@1265: 		    case 'F':
nkeynes@1265: 		      {
nkeynes@1265: 			int regno = ((given >> 16) & 0xf) | ((given >> (7 - 4)) & 0x10);
nkeynes@1265: 			int num = (given >> 8) & 0x3;
nkeynes@1265: 			
nkeynes@1265: 			if (!num)
nkeynes@1265: 			  func (stream, "{d%d}", regno);
nkeynes@1265: 			else if (num + regno >= 32)
nkeynes@1265: 			  func (stream, "{d%d-<overflow reg d%d}", regno, regno + num);
nkeynes@1265: 			else
nkeynes@1265: 			  func (stream, "{d%d-d%d}", regno, regno + num);
nkeynes@1265: 		      }
nkeynes@1265: 		      break;
nkeynes@1265:       
nkeynes@1265: 
nkeynes@1265: 		    case '0': case '1': case '2': case '3': case '4':
nkeynes@1265: 		    case '5': case '6': case '7': case '8': case '9':
nkeynes@1265: 		      {
nkeynes@1265: 			int width;
nkeynes@1265: 			unsigned long value;
nkeynes@1265: 
nkeynes@1265: 			c = arm_decode_bitfield (c, given, &value, &width);
nkeynes@1265: 			
nkeynes@1265: 			switch (*c)
nkeynes@1265: 			  {
nkeynes@1265: 			  case 'r':
nkeynes@1265: 			    func (stream, "%s", arm_regnames[value]);
nkeynes@1265: 			    break;
nkeynes@1265: 			  case 'd':
nkeynes@1265: 			    func (stream, "%ld", value);
nkeynes@1265: 			    value_in_comment = value;
nkeynes@1265: 			    break;
nkeynes@1265: 			  case 'e':
nkeynes@1265: 			    func (stream, "%ld", (1ul << width) - value);
nkeynes@1265: 			    break;
nkeynes@1265: 			    
nkeynes@1265: 			  case 'S':
nkeynes@1265: 			  case 'T':
nkeynes@1265: 			  case 'U':
nkeynes@1265: 			    /* Various width encodings.  */
nkeynes@1265: 			    {
nkeynes@1265: 			      int base = 8 << (*c - 'S'); /* 8,16 or 32 */
nkeynes@1265: 			      int limit;
nkeynes@1265: 			      unsigned low, high;
nkeynes@1265: 
nkeynes@1265: 			      c++;
nkeynes@1265: 			      if (*c >= '0' && *c <= '9')
nkeynes@1265: 				limit = *c - '0';
nkeynes@1265: 			      else if (*c >= 'a' && *c <= 'f')
nkeynes@1265: 				limit = *c - 'a' + 10;
nkeynes@1265: 			      else
nkeynes@1265: 				abort ();
nkeynes@1265: 			      low = limit >> 2;
nkeynes@1265: 			      high = limit & 3;
nkeynes@1265: 
nkeynes@1265: 			      if (value < low || value > high)
nkeynes@1265: 				func (stream, "<illegal width %d>", base << value);
nkeynes@1265: 			      else
nkeynes@1265: 				func (stream, "%d", base << value);
nkeynes@1265: 			    }
nkeynes@1265: 			    break;
nkeynes@1265: 			  case 'R':
nkeynes@1265: 			    if (given & (1 << 6))
nkeynes@1265: 			      goto Q;
nkeynes@1265: 			    /* FALLTHROUGH */
nkeynes@1265: 			  case 'D':
nkeynes@1265: 			    func (stream, "d%ld", value);
nkeynes@1265: 			    break;
nkeynes@1265: 			  case 'Q':
nkeynes@1265: 			  Q:
nkeynes@1265: 			    if (value & 1)
nkeynes@1265: 			      func (stream, "<illegal reg q%ld.5>", value >> 1);
nkeynes@1265: 			    else
nkeynes@1265: 			      func (stream, "q%ld", value >> 1);
nkeynes@1265: 			    break;
nkeynes@1265: 			    
nkeynes@1265: 			  case '`':
nkeynes@1265: 			    c++;
nkeynes@1265: 			    if (value == 0)
nkeynes@1265: 			      func (stream, "%c", *c);
nkeynes@1265: 			    break;
nkeynes@1265: 			  case '\'':
nkeynes@1265: 			    c++;
nkeynes@1265: 			    if (value == ((1ul << width) - 1))
nkeynes@1265: 			      func (stream, "%c", *c);
nkeynes@1265: 			    break;
nkeynes@1265: 			  case '?':
nkeynes@1265: 			    func (stream, "%c", c[(1 << width) - (int) value]);
nkeynes@1265: 			    c += 1 << width;
nkeynes@1265: 			    break;
nkeynes@1265: 			  default:
nkeynes@1265: 			    abort ();
nkeynes@1265: 			  }
nkeynes@1265: 			break;
nkeynes@1265: 
nkeynes@1265: 		      default:
nkeynes@1265: 			abort ();
nkeynes@1265: 		      }
nkeynes@1265: 		    }
nkeynes@1265: 		}
nkeynes@1265: 	      else
nkeynes@1265: 		func (stream, "%c", *c);
nkeynes@1265: 	    }
nkeynes@1265: 
nkeynes@1265: 	  if (value_in_comment > 32 || value_in_comment < -16)
nkeynes@1265: 	    func (stream, "\t; 0x%lx", value_in_comment);
nkeynes@1265: 
nkeynes@1265: 	  return TRUE;
nkeynes@1265: 	}
nkeynes@1265:     }
nkeynes@1265:   return FALSE;
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: /* Return the name of a v7A special register.  */
nkeynes@1265: 
nkeynes@1265: static const char * 
nkeynes@1265: banked_regname (unsigned reg)
nkeynes@1265: {
nkeynes@1265:   switch (reg)
nkeynes@1265:     {
nkeynes@1265:       case 15: return "CPSR";
nkeynes@1265:       case 32: return "R8_usr"; 
nkeynes@1265:       case 33: return "R9_usr";
nkeynes@1265:       case 34: return "R10_usr";
nkeynes@1265:       case 35: return "R11_usr";
nkeynes@1265:       case 36: return "R12_usr";
nkeynes@1265:       case 37: return "SP_usr";
nkeynes@1265:       case 38: return "LR_usr";
nkeynes@1265:       case 40: return "R8_fiq"; 
nkeynes@1265:       case 41: return "R9_fiq";
nkeynes@1265:       case 42: return "R10_fiq";
nkeynes@1265:       case 43: return "R11_fiq";
nkeynes@1265:       case 44: return "R12_fiq";
nkeynes@1265:       case 45: return "SP_fiq";
nkeynes@1265:       case 46: return "LR_fiq";
nkeynes@1265:       case 48: return "LR_irq";
nkeynes@1265:       case 49: return "SP_irq";
nkeynes@1265:       case 50: return "LR_svc";
nkeynes@1265:       case 51: return "SP_svc";
nkeynes@1265:       case 52: return "LR_abt";
nkeynes@1265:       case 53: return "SP_abt";
nkeynes@1265:       case 54: return "LR_und";
nkeynes@1265:       case 55: return "SP_und";
nkeynes@1265:       case 60: return "LR_mon";
nkeynes@1265:       case 61: return "SP_mon";
nkeynes@1265:       case 62: return "ELR_hyp";
nkeynes@1265:       case 63: return "SP_hyp";
nkeynes@1265:       case 79: return "SPSR";
nkeynes@1265:       case 110: return "SPSR_fiq";
nkeynes@1265:       case 112: return "SPSR_irq";
nkeynes@1265:       case 114: return "SPSR_svc";
nkeynes@1265:       case 116: return "SPSR_abt";
nkeynes@1265:       case 118: return "SPSR_und";
nkeynes@1265:       case 124: return "SPSR_mon";
nkeynes@1265:       case 126: return "SPSR_hyp";
nkeynes@1265:       default: return NULL;
nkeynes@1265:     }
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: /* Print one ARM instruction from PC on INFO->STREAM.  */
nkeynes@1265: 
nkeynes@1265: static void
nkeynes@1265: print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given)
nkeynes@1265: {
nkeynes@1265:   const struct opcode32 *insn;
nkeynes@1265:   void *stream = info->stream;
nkeynes@1265:   fprintf_ftype func = info->fprintf_func;
nkeynes@1265:   struct arm_private_data *private_data = info->private_data;
nkeynes@1265: 
nkeynes@1265:   if (print_insn_coprocessor (pc, info, given, FALSE))
nkeynes@1265:     return;
nkeynes@1265: 
nkeynes@1265:   if (print_insn_neon (info, given, FALSE))
nkeynes@1265:     return;
nkeynes@1265: 
nkeynes@1265:   for (insn = arm_opcodes; insn->assembler; insn++)
nkeynes@1265:     {
nkeynes@1265:       if ((given & insn->mask) != insn->value)
nkeynes@1265: 	continue;
nkeynes@1265:     
nkeynes@1265:       if ((insn->arch & private_data->features.core) == 0)
nkeynes@1265: 	continue;
nkeynes@1265: 
nkeynes@1265:       /* Special case: an instruction with all bits set in the condition field
nkeynes@1265: 	 (0xFnnn_nnnn) is only matched if all those bits are set in insn->mask,
nkeynes@1265: 	 or by the catchall at the end of the table.  */
nkeynes@1265:       if ((given & 0xF0000000) != 0xF0000000
nkeynes@1265: 	  || (insn->mask & 0xF0000000) == 0xF0000000
nkeynes@1265: 	  || (insn->mask == 0 && insn->value == 0))
nkeynes@1265: 	{
nkeynes@1265: 	  unsigned long u_reg = 16;
nkeynes@1265: 	  unsigned long U_reg = 16;
nkeynes@1265: 	  bfd_boolean is_unpredictable = FALSE;
nkeynes@1265: 	  signed long value_in_comment = 0;
nkeynes@1265: 	  const char *c;
nkeynes@1265: 
nkeynes@1265: 	  for (c = insn->assembler; *c; c++)
nkeynes@1265: 	    {
nkeynes@1265: 	      if (*c == '%')
nkeynes@1265: 		{
nkeynes@1265: 		  bfd_boolean allow_unpredictable = FALSE;
nkeynes@1265: 
nkeynes@1265: 		  switch (*++c)
nkeynes@1265: 		    {
nkeynes@1265: 		    case '%':
nkeynes@1265: 		      func (stream, "%%");
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 'a':
nkeynes@1265: 		      value_in_comment = print_arm_address (pc, info, given);
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 'P':
nkeynes@1265: 		      /* Set P address bit and use normal address
nkeynes@1265: 			 printing routine.  */
nkeynes@1265: 		      value_in_comment = print_arm_address (pc, info, given | (1 << P_BIT));
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 'S':
nkeynes@1265: 		      allow_unpredictable = TRUE;
nkeynes@1265: 		    case 's':
nkeynes@1265:                       if ((given & 0x004f0000) == 0x004f0000)
nkeynes@1265: 			{
nkeynes@1265:                           /* PC relative with immediate offset.  */
nkeynes@1265: 			  bfd_vma offset = ((given & 0xf00) >> 4) | (given & 0xf);
nkeynes@1265: 
nkeynes@1265: 			  if (PRE_BIT_SET)
nkeynes@1265: 			    {
nkeynes@1265: 			      /* Elide positive zero offset.  */
nkeynes@1265: 			      if (offset || NEGATIVE_BIT_SET)
nkeynes@1265: 				func (stream, "[pc, #%s%d]\t; ",
nkeynes@1265: 				      NEGATIVE_BIT_SET ? "-" : "", offset);
nkeynes@1265: 			      else
nkeynes@1265: 				func (stream, "[pc]\t; ");
nkeynes@1265: 			      if (NEGATIVE_BIT_SET)
nkeynes@1265: 				offset = -offset;
nkeynes@1265: 			      info->print_address_func (offset + pc + 8, info);
nkeynes@1265: 			    }
nkeynes@1265: 			  else
nkeynes@1265: 			    {
nkeynes@1265: 			      /* Always show the offset.  */
nkeynes@1265: 			      func (stream, "[pc], #%s%d",
nkeynes@1265: 				    NEGATIVE_BIT_SET ? "-" : "", offset);
nkeynes@1265: 			      if (! allow_unpredictable)
nkeynes@1265: 				is_unpredictable = TRUE;
nkeynes@1265: 			    }
nkeynes@1265: 			}
nkeynes@1265: 		      else
nkeynes@1265: 			{
nkeynes@1265: 			  int offset = ((given & 0xf00) >> 4) | (given & 0xf);
nkeynes@1265: 
nkeynes@1265: 			  func (stream, "[%s",
nkeynes@1265: 				arm_regnames[(given >> 16) & 0xf]);
nkeynes@1265: 
nkeynes@1265: 			  if (PRE_BIT_SET)
nkeynes@1265: 			    {
nkeynes@1265: 			      if (IMMEDIATE_BIT_SET)
nkeynes@1265: 				{
nkeynes@1265: 				  /* Elide offset for non-writeback
nkeynes@1265: 				     positive zero.  */
nkeynes@1265: 				  if (WRITEBACK_BIT_SET || NEGATIVE_BIT_SET
nkeynes@1265: 				      || offset)
nkeynes@1265: 				    func (stream, ", #%s%d",
nkeynes@1265: 					  NEGATIVE_BIT_SET ? "-" : "", offset);
nkeynes@1265: 
nkeynes@1265: 				  if (NEGATIVE_BIT_SET)
nkeynes@1265: 				    offset = -offset;
nkeynes@1265: 
nkeynes@1265: 				  value_in_comment = offset;
nkeynes@1265: 				}
nkeynes@1265: 			      else
nkeynes@1265: 				{
nkeynes@1265: 				  /* Register Offset or Register Pre-Indexed.  */
nkeynes@1265: 				  func (stream, ", %s%s",
nkeynes@1265: 					NEGATIVE_BIT_SET ? "-" : "",
nkeynes@1265: 					arm_regnames[given & 0xf]);
nkeynes@1265: 
nkeynes@1265: 				  /* Writing back to the register that is the source/
nkeynes@1265: 				     destination of the load/store is unpredictable.  */
nkeynes@1265: 				  if (! allow_unpredictable
nkeynes@1265: 				      && WRITEBACK_BIT_SET
nkeynes@1265: 				      && ((given & 0xf) == ((given >> 12) & 0xf)))
nkeynes@1265: 				    is_unpredictable = TRUE;
nkeynes@1265: 				}
nkeynes@1265: 
nkeynes@1265: 			      func (stream, "]%s",
nkeynes@1265: 				    WRITEBACK_BIT_SET ? "!" : "");
nkeynes@1265: 			    }
nkeynes@1265: 			  else
nkeynes@1265: 			    {
nkeynes@1265: 			      if (IMMEDIATE_BIT_SET)
nkeynes@1265: 				{
nkeynes@1265: 				  /* Immediate Post-indexed.  */
nkeynes@1265: 				  /* PR 10924: Offset must be printed, even if it is zero.  */
nkeynes@1265: 				  func (stream, "], #%s%d",
nkeynes@1265: 					NEGATIVE_BIT_SET ? "-" : "", offset);
nkeynes@1265: 				  if (NEGATIVE_BIT_SET)
nkeynes@1265: 				    offset = -offset;
nkeynes@1265: 				  value_in_comment = offset;
nkeynes@1265: 				}
nkeynes@1265: 			      else
nkeynes@1265: 				{
nkeynes@1265: 				  /* Register Post-indexed.  */
nkeynes@1265: 				  func (stream, "], %s%s",
nkeynes@1265: 					NEGATIVE_BIT_SET ? "-" : "",
nkeynes@1265: 					arm_regnames[given & 0xf]);
nkeynes@1265: 
nkeynes@1265: 				  /* Writing back to the register that is the source/
nkeynes@1265: 				     destination of the load/store is unpredictable.  */
nkeynes@1265: 				  if (! allow_unpredictable
nkeynes@1265: 				      && (given & 0xf) == ((given >> 12) & 0xf))
nkeynes@1265: 				    is_unpredictable = TRUE;
nkeynes@1265: 				}
nkeynes@1265: 
nkeynes@1265: 			      if (! allow_unpredictable)
nkeynes@1265: 				{
nkeynes@1265: 				  /* Writeback is automatically implied by post- addressing.
nkeynes@1265: 				     Setting the W bit is unnecessary and ARM specify it as
nkeynes@1265: 				     being unpredictable.  */
nkeynes@1265: 				  if (WRITEBACK_BIT_SET
nkeynes@1265: 				      /* Specifying the PC register as the post-indexed
nkeynes@1265: 					 registers is also unpredictable.  */
nkeynes@1265: 				      || (! IMMEDIATE_BIT_SET && ((given & 0xf) == 0xf)))
nkeynes@1265: 				    is_unpredictable = TRUE;
nkeynes@1265: 				}
nkeynes@1265: 			    }
nkeynes@1265: 			}
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 'b':
nkeynes@1265: 		      {
nkeynes@1265: 			bfd_vma disp = (((given & 0xffffff) ^ 0x800000) - 0x800000);
nkeynes@1265: 			info->print_address_func (disp * 4 + pc + 8, info);
nkeynes@1265: 		      }
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 'c':
nkeynes@1265: 		      if (((given >> 28) & 0xf) != 0xe)
nkeynes@1265: 			func (stream, "%s",
nkeynes@1265: 			      arm_conditional [(given >> 28) & 0xf]);
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 'm':
nkeynes@1265: 		      {
nkeynes@1265: 			int started = 0;
nkeynes@1265: 			int reg;
nkeynes@1265: 
nkeynes@1265: 			func (stream, "{");
nkeynes@1265: 			for (reg = 0; reg < 16; reg++)
nkeynes@1265: 			  if ((given & (1 << reg)) != 0)
nkeynes@1265: 			    {
nkeynes@1265: 			      if (started)
nkeynes@1265: 				func (stream, ", ");
nkeynes@1265: 			      started = 1;
nkeynes@1265: 			      func (stream, "%s", arm_regnames[reg]);
nkeynes@1265: 			    }
nkeynes@1265: 			func (stream, "}");
nkeynes@1265: 			if (! started)
nkeynes@1265: 			  is_unpredictable = TRUE;
nkeynes@1265: 		      }
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 'q':
nkeynes@1265: 		      arm_decode_shift (given, func, stream, FALSE);
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 'o':
nkeynes@1265: 		      if ((given & 0x02000000) != 0)
nkeynes@1265: 			{
nkeynes@1265: 			  int rotate = (given & 0xf00) >> 7;
nkeynes@1265: 			  int immed = (given & 0xff);
nkeynes@1265: 
nkeynes@1265: 			  immed = (((immed << (32 - rotate))
nkeynes@1265: 				    | (immed >> rotate)) & 0xffffffff);
nkeynes@1265: 			  func (stream, "#%d", immed);
nkeynes@1265: 			  value_in_comment = immed;
nkeynes@1265: 			}
nkeynes@1265: 		      else
nkeynes@1265: 			arm_decode_shift (given, func, stream, TRUE);
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 'p':
nkeynes@1265: 		      if ((given & 0x0000f000) == 0x0000f000)
nkeynes@1265: 			{
nkeynes@1265: 			  /* The p-variants of tst/cmp/cmn/teq are the pre-V6
nkeynes@1265: 			     mechanism for setting PSR flag bits.  They are
nkeynes@1265: 			     obsolete in V6 onwards.  */
nkeynes@1265: 			  if ((private_data->features.core & ARM_EXT_V6) == 0)
nkeynes@1265: 			    func (stream, "p");
nkeynes@1265: 			}
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 't':
nkeynes@1265: 		      if ((given & 0x01200000) == 0x00200000)
nkeynes@1265: 			func (stream, "t");
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 'A':
nkeynes@1265: 		      {
nkeynes@1265: 			int offset = given & 0xff;
nkeynes@1265: 
nkeynes@1265: 			value_in_comment = offset * 4;
nkeynes@1265: 			if (NEGATIVE_BIT_SET)
nkeynes@1265: 			  value_in_comment = - value_in_comment;
nkeynes@1265: 
nkeynes@1265: 			func (stream, "[%s", arm_regnames [(given >> 16) & 0xf]);
nkeynes@1265: 
nkeynes@1265: 			if (PRE_BIT_SET)
nkeynes@1265: 			  {
nkeynes@1265: 			    if (offset)
nkeynes@1265: 			      func (stream, ", #%d]%s",
nkeynes@1265: 				    value_in_comment,
nkeynes@1265: 				    WRITEBACK_BIT_SET ? "!" : "");
nkeynes@1265: 			    else
nkeynes@1265: 			      func (stream, "]");
nkeynes@1265: 			  }
nkeynes@1265: 			else
nkeynes@1265: 			  {
nkeynes@1265: 			    func (stream, "]");
nkeynes@1265: 
nkeynes@1265: 			    if (WRITEBACK_BIT_SET)
nkeynes@1265: 			      {
nkeynes@1265: 				if (offset)
nkeynes@1265: 				  func (stream, ", #%d", value_in_comment);
nkeynes@1265: 			      }
nkeynes@1265: 			    else
nkeynes@1265: 			      {
nkeynes@1265: 				func (stream, ", {%d}", offset);
nkeynes@1265: 				value_in_comment = offset;
nkeynes@1265: 			      }
nkeynes@1265: 			  }
nkeynes@1265: 		      }
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 'B':
nkeynes@1265: 		      /* Print ARM V5 BLX(1) address: pc+25 bits.  */
nkeynes@1265: 		      {
nkeynes@1265: 			bfd_vma address;
nkeynes@1265: 			bfd_vma offset = 0;
nkeynes@1265: 
nkeynes@1265: 			if (! NEGATIVE_BIT_SET)
nkeynes@1265: 			  /* Is signed, hi bits should be ones.  */
nkeynes@1265: 			  offset = (-1) ^ 0x00ffffff;
nkeynes@1265: 
nkeynes@1265: 			/* Offset is (SignExtend(offset field)<<2).  */
nkeynes@1265: 			offset += given & 0x00ffffff;
nkeynes@1265: 			offset <<= 2;
nkeynes@1265: 			address = offset + pc + 8;
nkeynes@1265: 
nkeynes@1265: 			if (given & 0x01000000)
nkeynes@1265: 			  /* H bit allows addressing to 2-byte boundaries.  */
nkeynes@1265: 			  address += 2;
nkeynes@1265: 
nkeynes@1265: 		        info->print_address_func (address, info);
nkeynes@1265: 		      }
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 'C':
nkeynes@1265: 		      if ((given & 0x02000200) == 0x200)
nkeynes@1265: 			{
nkeynes@1265: 			  const char * name;
nkeynes@1265: 			  unsigned sysm = (given & 0x004f0000) >> 16;
nkeynes@1265: 
nkeynes@1265: 			  sysm |= (given & 0x300) >> 4;
nkeynes@1265: 			  name = banked_regname (sysm);
nkeynes@1265: 
nkeynes@1265: 			  if (name != NULL)
nkeynes@1265: 			    func (stream, "%s", name);
nkeynes@1265: 			  else
nkeynes@1265: 			    func (stream, "(UNDEF: %lu)", sysm);
nkeynes@1265: 			}
nkeynes@1265: 		      else
nkeynes@1265: 			{
nkeynes@1265: 			  func (stream, "%cPSR_", 
nkeynes@1265: 				(given & 0x00400000) ? 'S' : 'C');
nkeynes@1265: 			  if (given & 0x80000)
nkeynes@1265: 			    func (stream, "f");
nkeynes@1265: 			  if (given & 0x40000)
nkeynes@1265: 			    func (stream, "s");
nkeynes@1265: 			  if (given & 0x20000)
nkeynes@1265: 			    func (stream, "x");
nkeynes@1265: 			  if (given & 0x10000)
nkeynes@1265: 			    func (stream, "c");
nkeynes@1265: 			}
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 'U':
nkeynes@1265: 		      if ((given & 0xf0) == 0x60) 
nkeynes@1265: 			{
nkeynes@1265: 			  switch (given & 0xf)
nkeynes@1265: 			    {
nkeynes@1265: 			    case 0xf: func (stream, "sy"); break;
nkeynes@1265: 			    default:
nkeynes@1265: 			      func (stream, "#%d", (int) given & 0xf);
nkeynes@1265: 			      break;
nkeynes@1265: 			    }
nkeynes@1265: 			} 
nkeynes@1265: 		      else 
nkeynes@1265: 			{
nkeynes@1265: 			  switch (given & 0xf)
nkeynes@1265: 			    {
nkeynes@1265: 			    case 0xf: func (stream, "sy"); break;
nkeynes@1265: 			    case 0x7: func (stream, "un"); break;
nkeynes@1265: 			    case 0xe: func (stream, "st"); break;
nkeynes@1265: 			    case 0x6: func (stream, "unst"); break;
nkeynes@1265: 			    case 0xb: func (stream, "ish"); break;
nkeynes@1265: 			    case 0xa: func (stream, "ishst"); break;
nkeynes@1265: 			    case 0x3: func (stream, "osh"); break;
nkeynes@1265: 			    case 0x2: func (stream, "oshst"); break;
nkeynes@1265: 			    default:
nkeynes@1265: 			      func (stream, "#%d", (int) given & 0xf);
nkeynes@1265: 			      break;
nkeynes@1265: 			    }
nkeynes@1265: 			}
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case '0': case '1': case '2': case '3': case '4':
nkeynes@1265: 		    case '5': case '6': case '7': case '8': case '9':
nkeynes@1265: 		      {
nkeynes@1265: 			int width;
nkeynes@1265: 			unsigned long value;
nkeynes@1265: 
nkeynes@1265: 			c = arm_decode_bitfield (c, given, &value, &width);
nkeynes@1265: 			
nkeynes@1265: 			switch (*c)
nkeynes@1265: 			  {
nkeynes@1265: 			  case 'R':
nkeynes@1265: 			    if (value == 15)
nkeynes@1265: 			      is_unpredictable = TRUE;
nkeynes@1265: 			    /* Fall through.  */
nkeynes@1265: 			  case 'r':
nkeynes@1265: 			    if (c[1] == 'u')
nkeynes@1265: 			      {
nkeynes@1265: 				/* Eat the 'u' character.  */
nkeynes@1265: 				++ c;
nkeynes@1265: 
nkeynes@1265: 				if (u_reg == value)
nkeynes@1265: 				  is_unpredictable = TRUE;
nkeynes@1265: 				u_reg = value;
nkeynes@1265: 			      }
nkeynes@1265: 			    if (c[1] == 'U')
nkeynes@1265: 			      {
nkeynes@1265: 				/* Eat the 'U' character.  */
nkeynes@1265: 				++ c;
nkeynes@1265: 
nkeynes@1265: 				if (U_reg == value)
nkeynes@1265: 				  is_unpredictable = TRUE;
nkeynes@1265: 				U_reg = value;
nkeynes@1265: 			      }
nkeynes@1265: 			    func (stream, "%s", arm_regnames[value]);
nkeynes@1265: 			    break;
nkeynes@1265: 			  case 'd':
nkeynes@1265: 			    func (stream, "%ld", value);
nkeynes@1265: 			    value_in_comment = value;
nkeynes@1265: 			    break;
nkeynes@1265: 			  case 'b':
nkeynes@1265: 			    func (stream, "%ld", value * 8);
nkeynes@1265: 			    value_in_comment = value * 8;
nkeynes@1265: 			    break;
nkeynes@1265: 			  case 'W':
nkeynes@1265: 			    func (stream, "%ld", value + 1);
nkeynes@1265: 			    value_in_comment = value + 1;
nkeynes@1265: 			    break;
nkeynes@1265: 			  case 'x':
nkeynes@1265: 			    func (stream, "0x%08lx", value);
nkeynes@1265: 
nkeynes@1265: 			    /* Some SWI instructions have special
nkeynes@1265: 			       meanings.  */
nkeynes@1265: 			    if ((given & 0x0fffffff) == 0x0FF00000)
nkeynes@1265: 			      func (stream, "\t; IMB");
nkeynes@1265: 			    else if ((given & 0x0fffffff) == 0x0FF00001)
nkeynes@1265: 			      func (stream, "\t; IMBRange");
nkeynes@1265: 			    break;
nkeynes@1265: 			  case 'X':
nkeynes@1265: 			    func (stream, "%01lx", value & 0xf);
nkeynes@1265: 			    value_in_comment = value;
nkeynes@1265: 			    break;
nkeynes@1265: 			  case '`':
nkeynes@1265: 			    c++;
nkeynes@1265: 			    if (value == 0)
nkeynes@1265: 			      func (stream, "%c", *c);
nkeynes@1265: 			    break;
nkeynes@1265: 			  case '\'':
nkeynes@1265: 			    c++;
nkeynes@1265: 			    if (value == ((1ul << width) - 1))
nkeynes@1265: 			      func (stream, "%c", *c);
nkeynes@1265: 			    break;
nkeynes@1265: 			  case '?':
nkeynes@1265: 			    func (stream, "%c", c[(1 << width) - (int) value]);
nkeynes@1265: 			    c += 1 << width;
nkeynes@1265: 			    break;
nkeynes@1265: 			  default:
nkeynes@1265: 			    abort ();
nkeynes@1265: 			  }
nkeynes@1265: 			break;
nkeynes@1265: 
nkeynes@1265: 		      case 'e':
nkeynes@1265: 			{
nkeynes@1265: 			  int imm;
nkeynes@1265: 
nkeynes@1265: 			  imm = (given & 0xf) | ((given & 0xfff00) >> 4);
nkeynes@1265: 			  func (stream, "%d", imm);
nkeynes@1265: 			  value_in_comment = imm;
nkeynes@1265: 			}
nkeynes@1265: 			break;
nkeynes@1265: 
nkeynes@1265: 		      case 'E':
nkeynes@1265: 			/* LSB and WIDTH fields of BFI or BFC.  The machine-
nkeynes@1265: 			   language instruction encodes LSB and MSB.  */
nkeynes@1265: 			{
nkeynes@1265: 			  long msb = (given & 0x001f0000) >> 16;
nkeynes@1265: 			  long lsb = (given & 0x00000f80) >> 7;
nkeynes@1265: 			  long w = msb - lsb + 1;
nkeynes@1265: 
nkeynes@1265: 			  if (w > 0)
nkeynes@1265: 			    func (stream, "#%lu, #%lu", lsb, w);
nkeynes@1265: 			  else
nkeynes@1265: 			    func (stream, "(invalid: %lu:%lu)", lsb, msb);
nkeynes@1265: 			}
nkeynes@1265: 			break;
nkeynes@1265: 
nkeynes@1265: 		      case 'R':
nkeynes@1265: 			/* Get the PSR/banked register name.  */
nkeynes@1265: 			{
nkeynes@1265: 			  const char * name;
nkeynes@1265: 			  unsigned sysm = (given & 0x004f0000) >> 16;
nkeynes@1265: 
nkeynes@1265: 			  sysm |= (given & 0x300) >> 4;
nkeynes@1265: 			  name = banked_regname (sysm);
nkeynes@1265: 
nkeynes@1265: 			  if (name != NULL)
nkeynes@1265: 			    func (stream, "%s", name);
nkeynes@1265: 			  else
nkeynes@1265: 			    func (stream, "(UNDEF: %lu)", sysm);
nkeynes@1265: 			}
nkeynes@1265: 			break;
nkeynes@1265: 
nkeynes@1265: 		      case 'V':
nkeynes@1265: 			/* 16-bit unsigned immediate from a MOVT or MOVW
nkeynes@1265: 			   instruction, encoded in bits 0:11 and 15:19.  */
nkeynes@1265: 			{
nkeynes@1265: 			  long hi = (given & 0x000f0000) >> 4;
nkeynes@1265: 			  long lo = (given & 0x00000fff);
nkeynes@1265: 			  long imm16 = hi | lo;
nkeynes@1265: 
nkeynes@1265: 			  func (stream, "#%lu", imm16);
nkeynes@1265: 			  value_in_comment = imm16;
nkeynes@1265: 			}
nkeynes@1265: 			break;
nkeynes@1265: 
nkeynes@1265: 		      default:
nkeynes@1265: 			abort ();
nkeynes@1265: 		      }
nkeynes@1265: 		    }
nkeynes@1265: 		}
nkeynes@1265: 	      else
nkeynes@1265: 		func (stream, "%c", *c);
nkeynes@1265: 	    }
nkeynes@1265: 
nkeynes@1265: 	  if (value_in_comment > 32 || value_in_comment < -16)
nkeynes@1265: 	    func (stream, "\t; 0x%lx", (value_in_comment & 0xffffffffUL));
nkeynes@1265: 
nkeynes@1265: 	  if (is_unpredictable)
nkeynes@1265: 	    func (stream, UNPREDICTABLE_INSTRUCTION);
nkeynes@1265: 
nkeynes@1265: 	  return;
nkeynes@1265: 	}
nkeynes@1265:     }
nkeynes@1265:   abort ();
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: /* Print one 16-bit Thumb instruction from PC on INFO->STREAM.  */
nkeynes@1265: 
nkeynes@1265: static void
nkeynes@1265: print_insn_thumb16 (bfd_vma pc, struct disassemble_info *info, long given)
nkeynes@1265: {
nkeynes@1265:   const struct opcode16 *insn;
nkeynes@1265:   void *stream = info->stream;
nkeynes@1265:   fprintf_ftype func = info->fprintf_func;
nkeynes@1265: 
nkeynes@1265:   for (insn = thumb_opcodes; insn->assembler; insn++)
nkeynes@1265:     if ((given & insn->mask) == insn->value)
nkeynes@1265:       {
nkeynes@1265: 	signed long value_in_comment = 0;
nkeynes@1265: 	const char *c = insn->assembler;
nkeynes@1265: 
nkeynes@1265: 	for (; *c; c++)
nkeynes@1265: 	  {
nkeynes@1265: 	    int domaskpc = 0;
nkeynes@1265: 	    int domasklr = 0;
nkeynes@1265: 
nkeynes@1265: 	    if (*c != '%')
nkeynes@1265: 	      {
nkeynes@1265: 		func (stream, "%c", *c);
nkeynes@1265: 		continue;
nkeynes@1265: 	      }
nkeynes@1265: 
nkeynes@1265: 	    switch (*++c)
nkeynes@1265: 	      {
nkeynes@1265: 	      case '%':
nkeynes@1265: 		func (stream, "%%");
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'c':
nkeynes@1265: 		if (ifthen_state)
nkeynes@1265: 		  func (stream, "%s", arm_conditional[IFTHEN_COND]);
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'C':
nkeynes@1265: 		if (ifthen_state)
nkeynes@1265: 		  func (stream, "%s", arm_conditional[IFTHEN_COND]);
nkeynes@1265: 		else
nkeynes@1265: 		  func (stream, "s");
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'I':
nkeynes@1265: 		{
nkeynes@1265: 		  unsigned int tmp;
nkeynes@1265: 
nkeynes@1265: 		  ifthen_next_state = given & 0xff;
nkeynes@1265: 		  for (tmp = given << 1; tmp & 0xf; tmp <<= 1)
nkeynes@1265: 		    func (stream, ((given ^ tmp) & 0x10) ? "e" : "t");
nkeynes@1265: 		  func (stream, "\t%s", arm_conditional[(given >> 4) & 0xf]);
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'x':
nkeynes@1265: 		if (ifthen_next_state)
nkeynes@1265: 		  func (stream, "\t; unpredictable branch in IT block\n");
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'X':
nkeynes@1265: 		if (ifthen_state)
nkeynes@1265: 		  func (stream, "\t; unpredictable <IT:%s>",
nkeynes@1265: 			arm_conditional[IFTHEN_COND]);
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'S':
nkeynes@1265: 		{
nkeynes@1265: 		  long reg;
nkeynes@1265: 
nkeynes@1265: 		  reg = (given >> 3) & 0x7;
nkeynes@1265: 		  if (given & (1 << 6))
nkeynes@1265: 		    reg += 8;
nkeynes@1265: 
nkeynes@1265: 		  func (stream, "%s", arm_regnames[reg]);
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'D':
nkeynes@1265: 		{
nkeynes@1265: 		  long reg;
nkeynes@1265: 
nkeynes@1265: 		  reg = given & 0x7;
nkeynes@1265: 		  if (given & (1 << 7))
nkeynes@1265: 		    reg += 8;
nkeynes@1265: 
nkeynes@1265: 		  func (stream, "%s", arm_regnames[reg]);
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'N':
nkeynes@1265: 		if (given & (1 << 8))
nkeynes@1265: 		  domasklr = 1;
nkeynes@1265: 		/* Fall through.  */
nkeynes@1265: 	      case 'O':
nkeynes@1265: 		if (*c == 'O' && (given & (1 << 8)))
nkeynes@1265: 		  domaskpc = 1;
nkeynes@1265: 		/* Fall through.  */
nkeynes@1265: 	      case 'M':
nkeynes@1265: 		{
nkeynes@1265: 		  int started = 0;
nkeynes@1265: 		  int reg;
nkeynes@1265: 
nkeynes@1265: 		  func (stream, "{");
nkeynes@1265: 
nkeynes@1265: 		  /* It would be nice if we could spot
nkeynes@1265: 		     ranges, and generate the rS-rE format: */
nkeynes@1265: 		  for (reg = 0; (reg < 8); reg++)
nkeynes@1265: 		    if ((given & (1 << reg)) != 0)
nkeynes@1265: 		      {
nkeynes@1265: 			if (started)
nkeynes@1265: 			  func (stream, ", ");
nkeynes@1265: 			started = 1;
nkeynes@1265: 			func (stream, "%s", arm_regnames[reg]);
nkeynes@1265: 		      }
nkeynes@1265: 
nkeynes@1265: 		  if (domasklr)
nkeynes@1265: 		    {
nkeynes@1265: 		      if (started)
nkeynes@1265: 			func (stream, ", ");
nkeynes@1265: 		      started = 1;
nkeynes@1265: 		      func (stream, arm_regnames[14] /* "lr" */);
nkeynes@1265: 		    }
nkeynes@1265: 
nkeynes@1265: 		  if (domaskpc)
nkeynes@1265: 		    {
nkeynes@1265: 		      if (started)
nkeynes@1265: 			func (stream, ", ");
nkeynes@1265: 		      func (stream, arm_regnames[15] /* "pc" */);
nkeynes@1265: 		    }
nkeynes@1265: 
nkeynes@1265: 		  func (stream, "}");
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'W':
nkeynes@1265: 		/* Print writeback indicator for a LDMIA.  We are doing a
nkeynes@1265: 		   writeback if the base register is not in the register
nkeynes@1265: 		   mask.  */
nkeynes@1265: 		if ((given & (1 << ((given & 0x0700) >> 8))) == 0)
nkeynes@1265: 		  func (stream, "!");
nkeynes@1265: 	      	break;
nkeynes@1265: 
nkeynes@1265: 	      case 'b':
nkeynes@1265: 		/* Print ARM V6T2 CZB address: pc+4+6 bits.  */
nkeynes@1265: 		{
nkeynes@1265: 		  bfd_vma address = (pc + 4
nkeynes@1265: 				     + ((given & 0x00f8) >> 2)
nkeynes@1265: 				     + ((given & 0x0200) >> 3));
nkeynes@1265: 		  info->print_address_func (address, info);
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 's':
nkeynes@1265: 		/* Right shift immediate -- bits 6..10; 1-31 print
nkeynes@1265: 		   as themselves, 0 prints as 32.  */
nkeynes@1265: 		{
nkeynes@1265: 		  long imm = (given & 0x07c0) >> 6;
nkeynes@1265: 		  if (imm == 0)
nkeynes@1265: 		    imm = 32;
nkeynes@1265: 		  func (stream, "#%ld", imm);
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case '0': case '1': case '2': case '3': case '4':
nkeynes@1265: 	      case '5': case '6': case '7': case '8': case '9':
nkeynes@1265: 		{
nkeynes@1265: 		  int bitstart = *c++ - '0';
nkeynes@1265: 		  int bitend = 0;
nkeynes@1265: 
nkeynes@1265: 		  while (*c >= '0' && *c <= '9')
nkeynes@1265: 		    bitstart = (bitstart * 10) + *c++ - '0';
nkeynes@1265: 
nkeynes@1265: 		  switch (*c)
nkeynes@1265: 		    {
nkeynes@1265: 		    case '-':
nkeynes@1265: 		      {
nkeynes@1265: 			bfd_vma reg;
nkeynes@1265: 
nkeynes@1265: 			c++;
nkeynes@1265: 			while (*c >= '0' && *c <= '9')
nkeynes@1265: 			  bitend = (bitend * 10) + *c++ - '0';
nkeynes@1265: 			if (!bitend)
nkeynes@1265: 			  abort ();
nkeynes@1265: 			reg = given >> bitstart;
nkeynes@1265: 			reg &= (2 << (bitend - bitstart)) - 1;
nkeynes@1265: 
nkeynes@1265: 			switch (*c)
nkeynes@1265: 			  {
nkeynes@1265: 			  case 'r':
nkeynes@1265: 			    func (stream, "%s", arm_regnames[reg]);
nkeynes@1265: 			    break;
nkeynes@1265: 
nkeynes@1265: 			  case 'd':
nkeynes@1265: 			    func (stream, "%ld", reg);
nkeynes@1265: 			    value_in_comment = reg;
nkeynes@1265: 			    break;
nkeynes@1265: 
nkeynes@1265: 			  case 'H':
nkeynes@1265: 			    func (stream, "%ld", reg << 1);
nkeynes@1265: 			    value_in_comment = reg << 1;
nkeynes@1265: 			    break;
nkeynes@1265: 
nkeynes@1265: 			  case 'W':
nkeynes@1265: 			    func (stream, "%ld", reg << 2);
nkeynes@1265: 			    value_in_comment = reg << 2;
nkeynes@1265: 			    break;
nkeynes@1265: 
nkeynes@1265: 			  case 'a':
nkeynes@1265: 			    /* PC-relative address -- the bottom two
nkeynes@1265: 			       bits of the address are dropped
nkeynes@1265: 			       before the calculation.  */
nkeynes@1265: 			    info->print_address_func
nkeynes@1265: 			      (((pc + 4) & ~3) + (reg << 2), info);
nkeynes@1265: 			    value_in_comment = 0;
nkeynes@1265: 			    break;
nkeynes@1265: 
nkeynes@1265: 			  case 'x':
nkeynes@1265: 			    func (stream, "0x%04lx", reg);
nkeynes@1265: 			    break;
nkeynes@1265: 
nkeynes@1265: 			  case 'B':
nkeynes@1265: 			    reg = ((reg ^ (1 << bitend)) - (1 << bitend));
nkeynes@1265: 			    info->print_address_func (reg * 2 + pc + 4, info);
nkeynes@1265: 			    value_in_comment = 0;
nkeynes@1265: 			    break;
nkeynes@1265: 
nkeynes@1265: 			  case 'c':
nkeynes@1265: 			    func (stream, "%s", arm_conditional [reg]);
nkeynes@1265: 			    break;
nkeynes@1265: 
nkeynes@1265: 			  default:
nkeynes@1265: 			    abort ();
nkeynes@1265: 			  }
nkeynes@1265: 		      }
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case '\'':
nkeynes@1265: 		      c++;
nkeynes@1265: 		      if ((given & (1 << bitstart)) != 0)
nkeynes@1265: 			func (stream, "%c", *c);
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case '?':
nkeynes@1265: 		      ++c;
nkeynes@1265: 		      if ((given & (1 << bitstart)) != 0)
nkeynes@1265: 			func (stream, "%c", *c++);
nkeynes@1265: 		      else
nkeynes@1265: 			func (stream, "%c", *++c);
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    default:
nkeynes@1265: 		      abort ();
nkeynes@1265: 		    }
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      default:
nkeynes@1265: 		abort ();
nkeynes@1265: 	      }
nkeynes@1265: 	  }
nkeynes@1265: 
nkeynes@1265: 	if (value_in_comment > 32 || value_in_comment < -16)
nkeynes@1265: 	  func (stream, "\t; 0x%lx", value_in_comment);
nkeynes@1265: 	return;
nkeynes@1265:       }
nkeynes@1265: 
nkeynes@1265:   /* No match.  */
nkeynes@1265:   abort ();
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: /* Return the name of an V7M special register.  */
nkeynes@1265: 
nkeynes@1265: static const char *
nkeynes@1265: psr_name (int regno)
nkeynes@1265: {
nkeynes@1265:   switch (regno)
nkeynes@1265:     {
nkeynes@1265:     case 0: return "APSR";
nkeynes@1265:     case 1: return "IAPSR";
nkeynes@1265:     case 2: return "EAPSR";
nkeynes@1265:     case 3: return "PSR";
nkeynes@1265:     case 5: return "IPSR";
nkeynes@1265:     case 6: return "EPSR";
nkeynes@1265:     case 7: return "IEPSR";
nkeynes@1265:     case 8: return "MSP";
nkeynes@1265:     case 9: return "PSP";
nkeynes@1265:     case 16: return "PRIMASK";
nkeynes@1265:     case 17: return "BASEPRI";
nkeynes@1265:     case 18: return "BASEPRI_MAX";
nkeynes@1265:     case 19: return "FAULTMASK";
nkeynes@1265:     case 20: return "CONTROL";
nkeynes@1265:     default: return "<unknown>";
nkeynes@1265:     }
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: /* Print one 32-bit Thumb instruction from PC on INFO->STREAM.  */
nkeynes@1265: 
nkeynes@1265: static void
nkeynes@1265: print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given)
nkeynes@1265: {
nkeynes@1265:   const struct opcode32 *insn;
nkeynes@1265:   void *stream = info->stream;
nkeynes@1265:   fprintf_ftype func = info->fprintf_func;
nkeynes@1265: 
nkeynes@1265:   if (print_insn_coprocessor (pc, info, given, TRUE))
nkeynes@1265:     return;
nkeynes@1265: 
nkeynes@1265:   if (print_insn_neon (info, given, TRUE))
nkeynes@1265:     return;
nkeynes@1265: 
nkeynes@1265:   for (insn = thumb32_opcodes; insn->assembler; insn++)
nkeynes@1265:     if ((given & insn->mask) == insn->value)
nkeynes@1265:       {
nkeynes@1265: 	bfd_boolean is_unpredictable = FALSE;
nkeynes@1265: 	signed long value_in_comment = 0;
nkeynes@1265: 	const char *c = insn->assembler;
nkeynes@1265: 
nkeynes@1265: 	for (; *c; c++)
nkeynes@1265: 	  {
nkeynes@1265: 	    if (*c != '%')
nkeynes@1265: 	      {
nkeynes@1265: 		func (stream, "%c", *c);
nkeynes@1265: 		continue;
nkeynes@1265: 	      }
nkeynes@1265: 
nkeynes@1265: 	    switch (*++c)
nkeynes@1265: 	      {
nkeynes@1265: 	      case '%':
nkeynes@1265: 		func (stream, "%%");
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'c':
nkeynes@1265: 		if (ifthen_state)
nkeynes@1265: 		  func (stream, "%s", arm_conditional[IFTHEN_COND]);
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'x':
nkeynes@1265: 		if (ifthen_next_state)
nkeynes@1265: 		  func (stream, "\t; unpredictable branch in IT block\n");
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'X':
nkeynes@1265: 		if (ifthen_state)
nkeynes@1265: 		  func (stream, "\t; unpredictable <IT:%s>",
nkeynes@1265: 			arm_conditional[IFTHEN_COND]);
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'I':
nkeynes@1265: 		{
nkeynes@1265: 		  unsigned int imm12 = 0;
nkeynes@1265: 
nkeynes@1265: 		  imm12 |= (given & 0x000000ffu);
nkeynes@1265: 		  imm12 |= (given & 0x00007000u) >> 4;
nkeynes@1265: 		  imm12 |= (given & 0x04000000u) >> 15;
nkeynes@1265: 		  func (stream, "#%u", imm12);
nkeynes@1265: 		  value_in_comment = imm12;
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'M':
nkeynes@1265: 		{
nkeynes@1265: 		  unsigned int bits = 0, imm, imm8, mod;
nkeynes@1265: 
nkeynes@1265: 		  bits |= (given & 0x000000ffu);
nkeynes@1265: 		  bits |= (given & 0x00007000u) >> 4;
nkeynes@1265: 		  bits |= (given & 0x04000000u) >> 15;
nkeynes@1265: 		  imm8 = (bits & 0x0ff);
nkeynes@1265: 		  mod = (bits & 0xf00) >> 8;
nkeynes@1265: 		  switch (mod)
nkeynes@1265: 		    {
nkeynes@1265: 		    case 0: imm = imm8; break;
nkeynes@1265: 		    case 1: imm = ((imm8 << 16) | imm8); break;
nkeynes@1265: 		    case 2: imm = ((imm8 << 24) | (imm8 << 8)); break;
nkeynes@1265: 		    case 3: imm = ((imm8 << 24) | (imm8 << 16) | (imm8 << 8) | imm8); break;
nkeynes@1265: 		    default:
nkeynes@1265: 		      mod  = (bits & 0xf80) >> 7;
nkeynes@1265: 		      imm8 = (bits & 0x07f) | 0x80;
nkeynes@1265: 		      imm  = (((imm8 << (32 - mod)) | (imm8 >> mod)) & 0xffffffff);
nkeynes@1265: 		    }
nkeynes@1265: 		  func (stream, "#%u", imm);
nkeynes@1265: 		  value_in_comment = imm;
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 		  
nkeynes@1265: 	      case 'J':
nkeynes@1265: 		{
nkeynes@1265: 		  unsigned int imm = 0;
nkeynes@1265: 
nkeynes@1265: 		  imm |= (given & 0x000000ffu);
nkeynes@1265: 		  imm |= (given & 0x00007000u) >> 4;
nkeynes@1265: 		  imm |= (given & 0x04000000u) >> 15;
nkeynes@1265: 		  imm |= (given & 0x000f0000u) >> 4;
nkeynes@1265: 		  func (stream, "#%u", imm);
nkeynes@1265: 		  value_in_comment = imm;
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'K':
nkeynes@1265: 		{
nkeynes@1265: 		  unsigned int imm = 0;
nkeynes@1265: 
nkeynes@1265: 		  imm |= (given & 0x000f0000u) >> 16;
nkeynes@1265: 		  imm |= (given & 0x00000ff0u) >> 0;
nkeynes@1265: 		  imm |= (given & 0x0000000fu) << 12;
nkeynes@1265: 		  func (stream, "#%u", imm);
nkeynes@1265: 		  value_in_comment = imm;
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'V':
nkeynes@1265: 		{
nkeynes@1265: 		  unsigned int imm = 0;
nkeynes@1265: 
nkeynes@1265: 		  imm |= (given & 0x00000fffu);
nkeynes@1265: 		  imm |= (given & 0x000f0000u) >> 4;
nkeynes@1265: 		  func (stream, "#%u", imm);
nkeynes@1265: 		  value_in_comment = imm;
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'S':
nkeynes@1265: 		{
nkeynes@1265: 		  unsigned int reg = (given & 0x0000000fu);
nkeynes@1265: 		  unsigned int stp = (given & 0x00000030u) >> 4;
nkeynes@1265: 		  unsigned int imm = 0;
nkeynes@1265: 		  imm |= (given & 0x000000c0u) >> 6;
nkeynes@1265: 		  imm |= (given & 0x00007000u) >> 10;
nkeynes@1265: 
nkeynes@1265: 		  func (stream, "%s", arm_regnames[reg]);
nkeynes@1265: 		  switch (stp)
nkeynes@1265: 		    {
nkeynes@1265: 		    case 0:
nkeynes@1265: 		      if (imm > 0)
nkeynes@1265: 			func (stream, ", lsl #%u", imm);
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 1:
nkeynes@1265: 		      if (imm == 0)
nkeynes@1265: 			imm = 32;
nkeynes@1265: 		      func (stream, ", lsr #%u", imm);
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 2:
nkeynes@1265: 		      if (imm == 0)
nkeynes@1265: 			imm = 32;
nkeynes@1265: 		      func (stream, ", asr #%u", imm);
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 3:
nkeynes@1265: 		      if (imm == 0)
nkeynes@1265: 			func (stream, ", rrx");
nkeynes@1265: 		      else
nkeynes@1265: 			func (stream, ", ror #%u", imm);
nkeynes@1265: 		    }
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'a':
nkeynes@1265: 		{
nkeynes@1265: 		  unsigned int Rn  = (given & 0x000f0000) >> 16;
nkeynes@1265: 		  unsigned int U   = ! NEGATIVE_BIT_SET;
nkeynes@1265: 		  unsigned int op  = (given & 0x00000f00) >> 8;
nkeynes@1265: 		  unsigned int i12 = (given & 0x00000fff);
nkeynes@1265: 		  unsigned int i8  = (given & 0x000000ff);
nkeynes@1265: 		  bfd_boolean writeback = FALSE, postind = FALSE;
nkeynes@1265: 		  bfd_vma offset = 0;
nkeynes@1265: 
nkeynes@1265: 		  func (stream, "[%s", arm_regnames[Rn]);
nkeynes@1265: 		  if (U) /* 12-bit positive immediate offset.  */
nkeynes@1265: 		    {
nkeynes@1265: 		      offset = i12;
nkeynes@1265: 		      if (Rn != 15)
nkeynes@1265: 			value_in_comment = offset;
nkeynes@1265: 		    }
nkeynes@1265: 		  else if (Rn == 15) /* 12-bit negative immediate offset.  */
nkeynes@1265: 		    offset = - (int) i12;
nkeynes@1265: 		  else if (op == 0x0) /* Shifted register offset.  */
nkeynes@1265: 		    {
nkeynes@1265: 		      unsigned int Rm = (i8 & 0x0f);
nkeynes@1265: 		      unsigned int sh = (i8 & 0x30) >> 4;
nkeynes@1265: 
nkeynes@1265: 		      func (stream, ", %s", arm_regnames[Rm]);
nkeynes@1265: 		      if (sh)
nkeynes@1265: 			func (stream, ", lsl #%u", sh);
nkeynes@1265: 		      func (stream, "]");
nkeynes@1265: 		      break;
nkeynes@1265: 		    }
nkeynes@1265: 		  else switch (op)
nkeynes@1265: 		    {
nkeynes@1265: 		    case 0xE:  /* 8-bit positive immediate offset.  */
nkeynes@1265: 		      offset = i8;
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 0xC:  /* 8-bit negative immediate offset.  */
nkeynes@1265: 		      offset = -i8;
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 0xF:  /* 8-bit + preindex with wb.  */
nkeynes@1265: 		      offset = i8;
nkeynes@1265: 		      writeback = TRUE;
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 0xD:  /* 8-bit - preindex with wb.  */
nkeynes@1265: 		      offset = -i8;
nkeynes@1265: 		      writeback = TRUE;
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 0xB:  /* 8-bit + postindex.  */
nkeynes@1265: 		      offset = i8;
nkeynes@1265: 		      postind = TRUE;
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 0x9:  /* 8-bit - postindex.  */
nkeynes@1265: 		      offset = -i8;
nkeynes@1265: 		      postind = TRUE;
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    default:
nkeynes@1265: 		      func (stream, ", <undefined>]");
nkeynes@1265: 		      goto skip;
nkeynes@1265: 		    }
nkeynes@1265: 
nkeynes@1265: 		  if (postind)
nkeynes@1265: 		    func (stream, "], #%d", offset);
nkeynes@1265: 		  else
nkeynes@1265: 		    {
nkeynes@1265: 		      if (offset)
nkeynes@1265: 			func (stream, ", #%d", offset);
nkeynes@1265: 		      func (stream, writeback ? "]!" : "]");
nkeynes@1265: 		    }
nkeynes@1265: 
nkeynes@1265: 		  if (Rn == 15)
nkeynes@1265: 		    {
nkeynes@1265: 		      func (stream, "\t; ");
nkeynes@1265: 		      info->print_address_func (((pc + 4) & ~3) + offset, info);
nkeynes@1265: 		    }
nkeynes@1265: 		}
nkeynes@1265: 	      skip:
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'A':
nkeynes@1265: 		{
nkeynes@1265: 		  unsigned int U   = ! NEGATIVE_BIT_SET;
nkeynes@1265: 		  unsigned int W   = WRITEBACK_BIT_SET;
nkeynes@1265: 		  unsigned int Rn  = (given & 0x000f0000) >> 16;
nkeynes@1265: 		  unsigned int off = (given & 0x000000ff);
nkeynes@1265: 
nkeynes@1265: 		  func (stream, "[%s", arm_regnames[Rn]);
nkeynes@1265: 
nkeynes@1265: 		  if (PRE_BIT_SET)
nkeynes@1265: 		    {
nkeynes@1265: 		      if (off || !U)
nkeynes@1265: 			{
nkeynes@1265: 			  func (stream, ", #%c%u", U ? '+' : '-', off * 4);
nkeynes@1265: 			  value_in_comment = off * 4 * U ? 1 : -1;
nkeynes@1265: 			}
nkeynes@1265: 		      func (stream, "]");
nkeynes@1265: 		      if (W)
nkeynes@1265: 			func (stream, "!");
nkeynes@1265: 		    }
nkeynes@1265: 		  else
nkeynes@1265: 		    {
nkeynes@1265: 		      func (stream, "], ");
nkeynes@1265: 		      if (W)
nkeynes@1265: 			{
nkeynes@1265: 			  func (stream, "#%c%u", U ? '+' : '-', off * 4);
nkeynes@1265: 			  value_in_comment = off * 4 * U ? 1 : -1;
nkeynes@1265: 			}
nkeynes@1265: 		      else
nkeynes@1265: 			{
nkeynes@1265: 			  func (stream, "{%u}", off);
nkeynes@1265: 			  value_in_comment = off;
nkeynes@1265: 			}
nkeynes@1265: 		    }
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'w':
nkeynes@1265: 		{
nkeynes@1265: 		  unsigned int Sbit = (given & 0x01000000) >> 24;
nkeynes@1265: 		  unsigned int type = (given & 0x00600000) >> 21;
nkeynes@1265: 
nkeynes@1265: 		  switch (type)
nkeynes@1265: 		    {
nkeynes@1265: 		    case 0: func (stream, Sbit ? "sb" : "b"); break;
nkeynes@1265: 		    case 1: func (stream, Sbit ? "sh" : "h"); break;
nkeynes@1265: 		    case 2:
nkeynes@1265: 		      if (Sbit)
nkeynes@1265: 			func (stream, "??");
nkeynes@1265: 		      break;
nkeynes@1265: 		    case 3:
nkeynes@1265: 		      func (stream, "??");
nkeynes@1265: 		      break;
nkeynes@1265: 		    }
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'm':
nkeynes@1265: 		{
nkeynes@1265: 		  int started = 0;
nkeynes@1265: 		  int reg;
nkeynes@1265: 
nkeynes@1265: 		  func (stream, "{");
nkeynes@1265: 		  for (reg = 0; reg < 16; reg++)
nkeynes@1265: 		    if ((given & (1 << reg)) != 0)
nkeynes@1265: 		      {
nkeynes@1265: 			if (started)
nkeynes@1265: 			  func (stream, ", ");
nkeynes@1265: 			started = 1;
nkeynes@1265: 			func (stream, "%s", arm_regnames[reg]);
nkeynes@1265: 		      }
nkeynes@1265: 		  func (stream, "}");
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'E':
nkeynes@1265: 		{
nkeynes@1265: 		  unsigned int msb = (given & 0x0000001f);
nkeynes@1265: 		  unsigned int lsb = 0;
nkeynes@1265: 
nkeynes@1265: 		  lsb |= (given & 0x000000c0u) >> 6;
nkeynes@1265: 		  lsb |= (given & 0x00007000u) >> 10;
nkeynes@1265: 		  func (stream, "#%u, #%u", lsb, msb - lsb + 1);
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'F':
nkeynes@1265: 		{
nkeynes@1265: 		  unsigned int width = (given & 0x0000001f) + 1;
nkeynes@1265: 		  unsigned int lsb = 0;
nkeynes@1265: 
nkeynes@1265: 		  lsb |= (given & 0x000000c0u) >> 6;
nkeynes@1265: 		  lsb |= (given & 0x00007000u) >> 10;
nkeynes@1265: 		  func (stream, "#%u, #%u", lsb, width);
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'b':
nkeynes@1265: 		{
nkeynes@1265: 		  unsigned int S = (given & 0x04000000u) >> 26;
nkeynes@1265: 		  unsigned int J1 = (given & 0x00002000u) >> 13;
nkeynes@1265: 		  unsigned int J2 = (given & 0x00000800u) >> 11;
nkeynes@1265: 		  bfd_vma offset = 0;
nkeynes@1265: 
nkeynes@1265: 		  offset |= !S << 20;
nkeynes@1265: 		  offset |= J2 << 19;
nkeynes@1265: 		  offset |= J1 << 18;
nkeynes@1265: 		  offset |= (given & 0x003f0000) >> 4;
nkeynes@1265: 		  offset |= (given & 0x000007ff) << 1;
nkeynes@1265: 		  offset -= (1 << 20);
nkeynes@1265: 
nkeynes@1265: 		  info->print_address_func (pc + 4 + offset, info);
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'B':
nkeynes@1265: 		{
nkeynes@1265: 		  unsigned int S = (given & 0x04000000u) >> 26;
nkeynes@1265: 		  unsigned int I1 = (given & 0x00002000u) >> 13;
nkeynes@1265: 		  unsigned int I2 = (given & 0x00000800u) >> 11;
nkeynes@1265: 		  bfd_vma offset = 0;
nkeynes@1265: 
nkeynes@1265: 		  offset |= !S << 24;
nkeynes@1265: 		  offset |= !(I1 ^ S) << 23;
nkeynes@1265: 		  offset |= !(I2 ^ S) << 22;
nkeynes@1265: 		  offset |= (given & 0x03ff0000u) >> 4;
nkeynes@1265: 		  offset |= (given & 0x000007ffu) << 1;
nkeynes@1265: 		  offset -= (1 << 24);
nkeynes@1265: 		  offset += pc + 4;
nkeynes@1265: 
nkeynes@1265: 		  /* BLX target addresses are always word aligned.  */
nkeynes@1265: 		  if ((given & 0x00001000u) == 0)
nkeynes@1265: 		      offset &= ~2u;
nkeynes@1265: 
nkeynes@1265: 		  info->print_address_func (offset, info);
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 's':
nkeynes@1265: 		{
nkeynes@1265: 		  unsigned int shift = 0;
nkeynes@1265: 
nkeynes@1265: 		  shift |= (given & 0x000000c0u) >> 6;
nkeynes@1265: 		  shift |= (given & 0x00007000u) >> 10;
nkeynes@1265: 		  if (WRITEBACK_BIT_SET)
nkeynes@1265: 		    func (stream, ", asr #%u", shift);
nkeynes@1265: 		  else if (shift)
nkeynes@1265: 		    func (stream, ", lsl #%u", shift);
nkeynes@1265: 		  /* else print nothing - lsl #0 */
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'R':
nkeynes@1265: 		{
nkeynes@1265: 		  unsigned int rot = (given & 0x00000030) >> 4;
nkeynes@1265: 
nkeynes@1265: 		  if (rot)
nkeynes@1265: 		    func (stream, ", ror #%u", rot * 8);
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'U':
nkeynes@1265: 		if ((given & 0xf0) == 0x60) 
nkeynes@1265: 		  {
nkeynes@1265: 		    switch (given & 0xf)
nkeynes@1265: 		      {
nkeynes@1265: 			case 0xf: func (stream, "sy"); break;
nkeynes@1265: 			default:
nkeynes@1265: 			  func (stream, "#%d", (int) given & 0xf);
nkeynes@1265: 			      break;
nkeynes@1265: 		      }
nkeynes@1265: 		  }
nkeynes@1265: 		else 
nkeynes@1265: 		  {
nkeynes@1265: 		    switch (given & 0xf)
nkeynes@1265: 		      {
nkeynes@1265: 			case 0xf: func (stream, "sy"); break;
nkeynes@1265: 			case 0x7: func (stream, "un"); break;
nkeynes@1265: 			case 0xe: func (stream, "st"); break;
nkeynes@1265: 			case 0x6: func (stream, "unst"); break;
nkeynes@1265: 			case 0xb: func (stream, "ish"); break;
nkeynes@1265: 			case 0xa: func (stream, "ishst"); break;
nkeynes@1265: 			case 0x3: func (stream, "osh"); break;
nkeynes@1265: 			case 0x2: func (stream, "oshst"); break;
nkeynes@1265: 			default:
nkeynes@1265: 			  func (stream, "#%d", (int) given & 0xf);
nkeynes@1265: 			  break;
nkeynes@1265: 		      }
nkeynes@1265: 		   }
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'C':
nkeynes@1265: 		if ((given & 0xff) == 0)
nkeynes@1265: 		  {
nkeynes@1265: 		    func (stream, "%cPSR_", (given & 0x100000) ? 'S' : 'C');
nkeynes@1265: 		    if (given & 0x800)
nkeynes@1265: 		      func (stream, "f");
nkeynes@1265: 		    if (given & 0x400)
nkeynes@1265: 		      func (stream, "s");
nkeynes@1265: 		    if (given & 0x200)
nkeynes@1265: 		      func (stream, "x");
nkeynes@1265: 		    if (given & 0x100)
nkeynes@1265: 		      func (stream, "c");
nkeynes@1265: 		  }
nkeynes@1265: 		else if ((given & 0x20) == 0x20)
nkeynes@1265: 		  {
nkeynes@1265: 		    char const* name;
nkeynes@1265: 		    unsigned sysm = (given & 0xf00) >> 8;
nkeynes@1265: 
nkeynes@1265: 		    sysm |= (given & 0x30);
nkeynes@1265: 		    sysm |= (given & 0x00100000) >> 14;
nkeynes@1265: 		    name = banked_regname (sysm);
nkeynes@1265: 		    
nkeynes@1265: 		    if (name != NULL)
nkeynes@1265: 		      func (stream, "%s", name);
nkeynes@1265: 		    else
nkeynes@1265: 		      func (stream, "(UNDEF: %lu)", sysm);
nkeynes@1265: 		  }
nkeynes@1265: 		else
nkeynes@1265: 		  {
nkeynes@1265: 		    func (stream, psr_name (given & 0xff));
nkeynes@1265: 		  }
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'D':
nkeynes@1265: 		if (((given & 0xff) == 0)
nkeynes@1265: 		    || ((given & 0x20) == 0x20))
nkeynes@1265: 		  {
nkeynes@1265: 		    char const* name;
nkeynes@1265: 		    unsigned sm = (given & 0xf0000) >> 16;
nkeynes@1265: 
nkeynes@1265: 		    sm |= (given & 0x30);
nkeynes@1265: 		    sm |= (given & 0x00100000) >> 14;
nkeynes@1265: 		    name = banked_regname (sm);
nkeynes@1265: 
nkeynes@1265: 		    if (name != NULL)
nkeynes@1265: 		      func (stream, "%s", name);
nkeynes@1265: 		    else
nkeynes@1265: 		      func (stream, "(UNDEF: %lu)", sm);
nkeynes@1265: 		  }
nkeynes@1265: 		else
nkeynes@1265: 		  func (stream, psr_name (given & 0xff));
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case '0': case '1': case '2': case '3': case '4':
nkeynes@1265: 	      case '5': case '6': case '7': case '8': case '9':
nkeynes@1265: 		{
nkeynes@1265: 		  int width;
nkeynes@1265: 		  unsigned long val;
nkeynes@1265: 
nkeynes@1265: 		  c = arm_decode_bitfield (c, given, &val, &width);
nkeynes@1265: 			
nkeynes@1265: 		  switch (*c)
nkeynes@1265: 		    {
nkeynes@1265: 		    case 'd':
nkeynes@1265: 		      func (stream, "%lu", val);
nkeynes@1265: 		      value_in_comment = val;
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 'W':
nkeynes@1265: 		      func (stream, "%lu", val * 4);
nkeynes@1265: 		      value_in_comment = val * 4;
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 'R':
nkeynes@1265: 		      if (val == 15)
nkeynes@1265: 			is_unpredictable = TRUE;
nkeynes@1265: 		      /* Fall through.  */
nkeynes@1265: 		    case 'r':
nkeynes@1265: 		      func (stream, "%s", arm_regnames[val]);
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case 'c':
nkeynes@1265: 		      func (stream, "%s", arm_conditional[val]);
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case '\'':
nkeynes@1265: 		      c++;
nkeynes@1265: 		      if (val == ((1ul << width) - 1))
nkeynes@1265: 			func (stream, "%c", *c);
nkeynes@1265: 		      break;
nkeynes@1265: 		      
nkeynes@1265: 		    case '`':
nkeynes@1265: 		      c++;
nkeynes@1265: 		      if (val == 0)
nkeynes@1265: 			func (stream, "%c", *c);
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    case '?':
nkeynes@1265: 		      func (stream, "%c", c[(1 << width) - (int) val]);
nkeynes@1265: 		      c += 1 << width;
nkeynes@1265: 		      break;
nkeynes@1265: 		      
nkeynes@1265: 		    case 'x':
nkeynes@1265: 		      func (stream, "0x%lx", val & 0xffffffffUL);
nkeynes@1265: 		      break;
nkeynes@1265: 
nkeynes@1265: 		    default:
nkeynes@1265: 		      abort ();
nkeynes@1265: 		    }
nkeynes@1265: 		}
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      case 'L':
nkeynes@1265: 		/* PR binutils/12534
nkeynes@1265: 		   If we have a PC relative offset in an LDRD or STRD
nkeynes@1265: 		   instructions then display the decoded address.  */
nkeynes@1265: 		if (((given >> 16) & 0xf) == 0xf)
nkeynes@1265: 		  {
nkeynes@1265: 		    bfd_vma offset = (given & 0xff) * 4;
nkeynes@1265: 
nkeynes@1265: 		    if ((given & (1 << 23)) == 0)
nkeynes@1265: 		      offset = - offset;
nkeynes@1265: 		    func (stream, "\t; ");
nkeynes@1265: 		    info->print_address_func ((pc & ~3) + 4 + offset, info);
nkeynes@1265: 		  }
nkeynes@1265: 		break;
nkeynes@1265: 
nkeynes@1265: 	      default:
nkeynes@1265: 		abort ();
nkeynes@1265: 	      }
nkeynes@1265: 	  }
nkeynes@1265: 
nkeynes@1265: 	if (value_in_comment > 32 || value_in_comment < -16)
nkeynes@1265: 	  func (stream, "\t; 0x%lx", value_in_comment);
nkeynes@1265: 
nkeynes@1265: 	if (is_unpredictable)
nkeynes@1265: 	  func (stream, UNPREDICTABLE_INSTRUCTION);
nkeynes@1265: 
nkeynes@1265: 	return;
nkeynes@1265:       }
nkeynes@1265: 
nkeynes@1265:   /* No match.  */
nkeynes@1265:   abort ();
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: /* Print data bytes on INFO->STREAM.  */
nkeynes@1265: 
nkeynes@1265: static void
nkeynes@1265: print_insn_data (bfd_vma pc ATTRIBUTE_UNUSED,
nkeynes@1265: 		 struct disassemble_info *info,
nkeynes@1265: 		 long given)
nkeynes@1265: {
nkeynes@1265:   switch (info->bytes_per_chunk)
nkeynes@1265:     {
nkeynes@1265:     case 1:
nkeynes@1265:       info->fprintf_func (info->stream, ".byte\t0x%02lx", given);
nkeynes@1265:       break;
nkeynes@1265:     case 2:
nkeynes@1265:       info->fprintf_func (info->stream, ".short\t0x%04lx", given);
nkeynes@1265:       break;
nkeynes@1265:     case 4:
nkeynes@1265:       info->fprintf_func (info->stream, ".word\t0x%08lx", given);
nkeynes@1265:       break;
nkeynes@1265:     default:
nkeynes@1265:       abort ();
nkeynes@1265:     }
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: /* Disallow mapping symbols ($a, $b, $d, $t etc) from
nkeynes@1265:    being displayed in symbol relative addresses.  */
nkeynes@1265: 
nkeynes@1265: bfd_boolean
nkeynes@1265: arm_symbol_is_valid (asymbol * sym,
nkeynes@1265: 		     struct disassemble_info * info ATTRIBUTE_UNUSED)
nkeynes@1265: {
nkeynes@1265:   const char * name;
nkeynes@1265:   
nkeynes@1265:   if (sym == NULL)
nkeynes@1265:     return FALSE;
nkeynes@1265: 
nkeynes@1265:   name = bfd_asymbol_name (sym);
nkeynes@1265: 
nkeynes@1265:   return (name && *name != '$');
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: /* Parse an individual disassembler option.  */
nkeynes@1265: 
nkeynes@1265: void
nkeynes@1265: parse_arm_disassembler_option (char *option)
nkeynes@1265: {
nkeynes@1265:   if (option == NULL)
nkeynes@1265:     return;
nkeynes@1265: 
nkeynes@1265:   if (CONST_STRNEQ (option, "reg-names-"))
nkeynes@1265:     {
nkeynes@1265:       int i;
nkeynes@1265: 
nkeynes@1265:       option += 10;
nkeynes@1265: 
nkeynes@1265:       for (i = NUM_ARM_REGNAMES; i--;)
nkeynes@1265: 	if (strneq (option, regnames[i].name, strlen (regnames[i].name)))
nkeynes@1265: 	  {
nkeynes@1265: 	    regname_selected = i;
nkeynes@1265: 	    break;
nkeynes@1265: 	  }
nkeynes@1265: 
nkeynes@1265:       if (i < 0)
nkeynes@1265: 	/* XXX - should break 'option' at following delimiter.  */
nkeynes@1265: 	fprintf (stderr, _("Unrecognised register name set: %s\n"), option);
nkeynes@1265:     }
nkeynes@1265:   else if (CONST_STRNEQ (option, "force-thumb"))
nkeynes@1265:     force_thumb = 1;
nkeynes@1265:   else if (CONST_STRNEQ (option, "no-force-thumb"))
nkeynes@1265:     force_thumb = 0;
nkeynes@1265:   else
nkeynes@1265:     /* XXX - should break 'option' at following delimiter.  */
nkeynes@1265:     fprintf (stderr, _("Unrecognised disassembler option: %s\n"), option);
nkeynes@1265: 
nkeynes@1265:   return;
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: /* Parse the string of disassembler options, spliting it at whitespaces
nkeynes@1265:    or commas.  (Whitespace separators supported for backwards compatibility).  */
nkeynes@1265: 
nkeynes@1265: static void
nkeynes@1265: parse_disassembler_options (char *options)
nkeynes@1265: {
nkeynes@1265:   if (options == NULL)
nkeynes@1265:     return;
nkeynes@1265: 
nkeynes@1265:   while (*options)
nkeynes@1265:     {
nkeynes@1265:       parse_arm_disassembler_option (options);
nkeynes@1265: 
nkeynes@1265:       /* Skip forward to next seperator.  */
nkeynes@1265:       while ((*options) && (! ISSPACE (*options)) && (*options != ','))
nkeynes@1265: 	++ options;
nkeynes@1265:       /* Skip forward past seperators.  */
nkeynes@1265:       while (ISSPACE (*options) || (*options == ','))
nkeynes@1265: 	++ options;      
nkeynes@1265:     }
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: /* Search back through the insn stream to determine if this instruction is
nkeynes@1265:    conditionally executed.  */
nkeynes@1265: 
nkeynes@1265: static void
nkeynes@1265: find_ifthen_state (bfd_vma pc,
nkeynes@1265: 		   struct disassemble_info *info,
nkeynes@1265: 		   bfd_boolean little)
nkeynes@1265: {
nkeynes@1265:   unsigned char b[2];
nkeynes@1265:   unsigned int insn;
nkeynes@1265:   int status;
nkeynes@1265:   /* COUNT is twice the number of instructions seen.  It will be odd if we
nkeynes@1265:      just crossed an instruction boundary.  */
nkeynes@1265:   int count;
nkeynes@1265:   int it_count;
nkeynes@1265:   unsigned int seen_it;
nkeynes@1265:   bfd_vma addr;
nkeynes@1265: 
nkeynes@1265:   ifthen_address = pc;
nkeynes@1265:   ifthen_state = 0;
nkeynes@1265: 
nkeynes@1265:   addr = pc;
nkeynes@1265:   count = 1;
nkeynes@1265:   it_count = 0;
nkeynes@1265:   seen_it = 0;
nkeynes@1265:   /* Scan backwards looking for IT instructions, keeping track of where
nkeynes@1265:      instruction boundaries are.  We don't know if something is actually an
nkeynes@1265:      IT instruction until we find a definite instruction boundary.  */
nkeynes@1265:   for (;;)
nkeynes@1265:     {
nkeynes@1265:       if (addr == 0 || info->symbol_at_address_func (addr, info))
nkeynes@1265: 	{
nkeynes@1265: 	  /* A symbol must be on an instruction boundary, and will not
nkeynes@1265: 	     be within an IT block.  */
nkeynes@1265: 	  if (seen_it && (count & 1))
nkeynes@1265: 	    break;
nkeynes@1265: 
nkeynes@1265: 	  return;
nkeynes@1265: 	}
nkeynes@1265:       addr -= 2;
nkeynes@1265:       status = info->read_memory_func (addr, (bfd_byte *) b, 2, info);
nkeynes@1265:       if (status)
nkeynes@1265: 	return;
nkeynes@1265: 
nkeynes@1265:       if (little)
nkeynes@1265: 	insn = (b[0]) | (b[1] << 8);
nkeynes@1265:       else
nkeynes@1265: 	insn = (b[1]) | (b[0] << 8);
nkeynes@1265:       if (seen_it)
nkeynes@1265: 	{
nkeynes@1265: 	  if ((insn & 0xf800) < 0xe800)
nkeynes@1265: 	    {
nkeynes@1265: 	      /* Addr + 2 is an instruction boundary.  See if this matches
nkeynes@1265: 	         the expected boundary based on the position of the last
nkeynes@1265: 		 IT candidate.  */
nkeynes@1265: 	      if (count & 1)
nkeynes@1265: 		break;
nkeynes@1265: 	      seen_it = 0;
nkeynes@1265: 	    }
nkeynes@1265: 	}
nkeynes@1265:       if ((insn & 0xff00) == 0xbf00 && (insn & 0xf) != 0)
nkeynes@1265: 	{
nkeynes@1265: 	  /* This could be an IT instruction.  */
nkeynes@1265: 	  seen_it = insn;
nkeynes@1265: 	  it_count = count >> 1;
nkeynes@1265: 	}
nkeynes@1265:       if ((insn & 0xf800) >= 0xe800)
nkeynes@1265: 	count++;
nkeynes@1265:       else
nkeynes@1265: 	count = (count + 2) | 1;
nkeynes@1265:       /* IT blocks contain at most 4 instructions.  */
nkeynes@1265:       if (count >= 8 && !seen_it)
nkeynes@1265: 	return;
nkeynes@1265:     }
nkeynes@1265:   /* We found an IT instruction.  */
nkeynes@1265:   ifthen_state = (seen_it & 0xe0) | ((seen_it << it_count) & 0x1f);
nkeynes@1265:   if ((ifthen_state & 0xf) == 0)
nkeynes@1265:     ifthen_state = 0;
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: /* Returns nonzero and sets *MAP_TYPE if the N'th symbol is a
nkeynes@1265:    mapping symbol.  */
nkeynes@1265: 
nkeynes@1265: static int
nkeynes@1265: is_mapping_symbol (struct disassemble_info *info, int n,
nkeynes@1265: 		   enum map_type *map_type)
nkeynes@1265: {
nkeynes@1265:   const char *name;
nkeynes@1265: 
nkeynes@1265:   name = bfd_asymbol_name (info->symtab[n]);
nkeynes@1265:   if (name[0] == '$' && (name[1] == 'a' || name[1] == 't' || name[1] == 'd')
nkeynes@1265:       && (name[2] == 0 || name[2] == '.'))
nkeynes@1265:     {
nkeynes@1265:       *map_type = ((name[1] == 'a') ? MAP_ARM
nkeynes@1265: 		   : (name[1] == 't') ? MAP_THUMB
nkeynes@1265: 		   : MAP_DATA);
nkeynes@1265:       return TRUE;
nkeynes@1265:     }
nkeynes@1265: 
nkeynes@1265:   return FALSE;
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: /* Try to infer the code type (ARM or Thumb) from a mapping symbol.
nkeynes@1265:    Returns nonzero if *MAP_TYPE was set.  */
nkeynes@1265: 
nkeynes@1265: static int
nkeynes@1265: get_map_sym_type (struct disassemble_info *info,
nkeynes@1265: 		  int n,
nkeynes@1265: 		  enum map_type *map_type)
nkeynes@1265: {
nkeynes@1265:   /* If the symbol is in a different section, ignore it.  */
nkeynes@1265:   if (info->section != NULL && info->section != info->symtab[n]->section)
nkeynes@1265:     return FALSE;
nkeynes@1265: 
nkeynes@1265:   return is_mapping_symbol (info, n, map_type);
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: /* Try to infer the code type (ARM or Thumb) from a non-mapping symbol.
nkeynes@1265:    Returns nonzero if *MAP_TYPE was set.  */
nkeynes@1265: 
nkeynes@1265: static int
nkeynes@1265: get_sym_code_type (struct disassemble_info *info,
nkeynes@1265: 		   int n,
nkeynes@1265: 		   enum map_type *map_type)
nkeynes@1265: {
nkeynes@1265: #if 0
nkeynes@1265:   elf_symbol_type *es;
nkeynes@1265:   unsigned int type;
nkeynes@1265: 
nkeynes@1265:   /* If the symbol is in a different section, ignore it.  */
nkeynes@1265:   if (info->section != NULL && info->section != info->symtab[n]->section)
nkeynes@1265:     return FALSE;
nkeynes@1265: 
nkeynes@1265:   es = *(elf_symbol_type **)(info->symtab + n);
nkeynes@1265:   type = ELF_ST_TYPE (es->internal_elf_sym.st_info);
nkeynes@1265: 
nkeynes@1265:   /* If the symbol has function type then use that.  */
nkeynes@1265:   if (type == STT_FUNC || type == STT_GNU_IFUNC)
nkeynes@1265:     {
nkeynes@1265:       if (ARM_SYM_BRANCH_TYPE (&es->internal_elf_sym) == ST_BRANCH_TO_THUMB)
nkeynes@1265: 	*map_type = MAP_THUMB;
nkeynes@1265:       else
nkeynes@1265: 	*map_type = MAP_ARM;
nkeynes@1265:       return TRUE;
nkeynes@1265:     }
nkeynes@1265: #endif
nkeynes@1265:   return FALSE;
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: /* Given a bfd_mach_arm_XXX value, this function fills in the fields
nkeynes@1265:    of the supplied arm_feature_set structure with bitmasks indicating
nkeynes@1265:    the support base architectures and coprocessor extensions.
nkeynes@1265: 
nkeynes@1265:    FIXME: This could more efficiently implemented as a constant array,
nkeynes@1265:    although it would also be less robust.  */
nkeynes@1265: 
nkeynes@1265: static void
nkeynes@1265: select_arm_features (unsigned long mach,
nkeynes@1265: 		     arm_feature_set * features)
nkeynes@1265: {
nkeynes@1265: #undef  ARM_FEATURE
nkeynes@1265: #define ARM_FEATURE(ARCH,CEXT) \
nkeynes@1265:   features->core = (ARCH); \
nkeynes@1265:   features->coproc = (CEXT) | FPU_FPA; \
nkeynes@1265:   return
nkeynes@1265: 
nkeynes@1265:   switch (mach)
nkeynes@1265:     {
nkeynes@1265:     case bfd_mach_arm_2:       ARM_ARCH_V2;
nkeynes@1265:     case bfd_mach_arm_2a:      ARM_ARCH_V2S;
nkeynes@1265:     case bfd_mach_arm_3:       ARM_ARCH_V3;
nkeynes@1265:     case bfd_mach_arm_3M:      ARM_ARCH_V3M;
nkeynes@1265:     case bfd_mach_arm_4:       ARM_ARCH_V4;
nkeynes@1265:     case bfd_mach_arm_4T:      ARM_ARCH_V4T;
nkeynes@1265:     case bfd_mach_arm_5:       ARM_ARCH_V5;
nkeynes@1265:     case bfd_mach_arm_5T:      ARM_ARCH_V5T;
nkeynes@1265:     case bfd_mach_arm_5TE:     ARM_ARCH_V5TE;
nkeynes@1265:     case bfd_mach_arm_XScale:  ARM_ARCH_XSCALE;
nkeynes@1265:     case bfd_mach_arm_ep9312:  ARM_FEATURE (ARM_AEXT_V4T, ARM_CEXT_MAVERICK | FPU_MAVERICK);
nkeynes@1265:     case bfd_mach_arm_iWMMXt:  ARM_ARCH_IWMMXT;
nkeynes@1265:     case bfd_mach_arm_iWMMXt2: ARM_ARCH_IWMMXT2;
nkeynes@1265:       /* If the machine type is unknown allow all
nkeynes@1265: 	 architecture types and all extensions.  */
nkeynes@1265:     case bfd_mach_arm_unknown: ARM_FEATURE (-1UL, -1UL);
nkeynes@1265:     default:
nkeynes@1265:       abort ();
nkeynes@1265:     }
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: 
nkeynes@1265: /* NOTE: There are no checks in these routines that
nkeynes@1265:    the relevant number of data bytes exist.  */
nkeynes@1265: 
nkeynes@1265: static int
nkeynes@1265: print_insn (bfd_vma pc, struct disassemble_info *info, bfd_boolean little)
nkeynes@1265: {
nkeynes@1265:   unsigned char b[4];
nkeynes@1265:   long		given;
nkeynes@1265:   int           status;
nkeynes@1265:   int           is_thumb = FALSE;
nkeynes@1265:   int           is_data = FALSE;
nkeynes@1265:   int           little_code;
nkeynes@1265:   unsigned int	size = 4;
nkeynes@1265:   void	 	(*printer) (bfd_vma, struct disassemble_info *, long);
nkeynes@1265:   bfd_boolean   found = FALSE;
nkeynes@1265:   struct arm_private_data *private_data;
nkeynes@1265: 
nkeynes@1265:   if (info->disassembler_options)
nkeynes@1265:     {
nkeynes@1265:       parse_disassembler_options (info->disassembler_options);
nkeynes@1265: 
nkeynes@1265:       /* To avoid repeated parsing of these options, we remove them here.  */
nkeynes@1265:       info->disassembler_options = NULL;
nkeynes@1265:     }
nkeynes@1265: 
nkeynes@1265:   /* PR 10288: Control which instructions will be disassembled.  */
nkeynes@1265:   if (info->private_data == NULL)
nkeynes@1265:     {
nkeynes@1265:       static struct arm_private_data private;
nkeynes@1265: 
nkeynes@1265:       if ((info->flags & USER_SPECIFIED_MACHINE_TYPE) == 0)
nkeynes@1265: 	/* If the user did not use the -m command line switch then default to
nkeynes@1265: 	   disassembling all types of ARM instruction.
nkeynes@1265: 	   
nkeynes@1265: 	   The info->mach value has to be ignored as this will be based on
nkeynes@1265: 	   the default archictecture for the target and/or hints in the notes
nkeynes@1265: 	   section, but it will never be greater than the current largest arm
nkeynes@1265: 	   machine value (iWMMXt2), which is only equivalent to the V5TE
nkeynes@1265: 	   architecture.  ARM architectures have advanced beyond the machine
nkeynes@1265: 	   value encoding, and these newer architectures would be ignored if
nkeynes@1265: 	   the machine value was used.
nkeynes@1265: 
nkeynes@1265: 	   Ie the -m switch is used to restrict which instructions will be
nkeynes@1265: 	   disassembled.  If it is necessary to use the -m switch to tell
nkeynes@1265: 	   objdump that an ARM binary is being disassembled, eg because the
nkeynes@1265: 	   input is a raw binary file, but it is also desired to disassemble
nkeynes@1265: 	   all ARM instructions then use "-marm".  This will select the
nkeynes@1265: 	   "unknown" arm architecture which is compatible with any ARM
nkeynes@1265: 	   instruction.  */
nkeynes@1265: 	  info->mach = bfd_mach_arm_unknown;
nkeynes@1265: 
nkeynes@1265:       /* Compute the architecture bitmask from the machine number.
nkeynes@1265: 	 Note: This assumes that the machine number will not change
nkeynes@1265: 	 during disassembly....  */
nkeynes@1265:       select_arm_features (info->mach, & private.features);
nkeynes@1265: 
nkeynes@1265:       private.has_mapping_symbols = -1;
nkeynes@1265:       private.last_mapping_sym = -1;
nkeynes@1265:       private.last_mapping_addr = 0;
nkeynes@1265: 
nkeynes@1265:       info->private_data = & private;
nkeynes@1265:     }
nkeynes@1265: 
nkeynes@1265:   private_data = info->private_data;
nkeynes@1265: 
nkeynes@1265:   /* Decide if our code is going to be little-endian, despite what the
nkeynes@1265:      function argument might say.  */
nkeynes@1265:   little_code = ((info->endian_code == BFD_ENDIAN_LITTLE) || little);
nkeynes@1265: 
nkeynes@1265:   /* For ELF, consult the symbol table to determine what kind of code
nkeynes@1265:      or data we have.  */
nkeynes@1265:   if (info->symtab_size != 0
nkeynes@1265:       && bfd_asymbol_flavour (*info->symtab) == bfd_target_elf_flavour)
nkeynes@1265:     {
nkeynes@1265:       bfd_vma addr;
nkeynes@1265:       int n, start;
nkeynes@1265:       int last_sym = -1;
nkeynes@1265:       enum map_type type = MAP_ARM;
nkeynes@1265: 
nkeynes@1265:       /* Start scanning at the start of the function, or wherever
nkeynes@1265: 	 we finished last time.  */
nkeynes@1265:       start = info->symtab_pos + 1;
nkeynes@1265:       if (start < private_data->last_mapping_sym)
nkeynes@1265: 	start = private_data->last_mapping_sym;
nkeynes@1265:       found = FALSE;
nkeynes@1265: 
nkeynes@1265:       /* First, look for mapping symbols.  */
nkeynes@1265:       if (private_data->has_mapping_symbols != 0)
nkeynes@1265: 	{
nkeynes@1265: 	  /* Scan up to the location being disassembled.  */
nkeynes@1265: 	  for (n = start; n < info->symtab_size; n++)
nkeynes@1265: 	    {
nkeynes@1265: 	      addr = bfd_asymbol_value (info->symtab[n]);
nkeynes@1265: 	      if (addr > pc)
nkeynes@1265: 		break;
nkeynes@1265: 	      if (get_map_sym_type (info, n, &type))
nkeynes@1265: 		{
nkeynes@1265: 		  last_sym = n;
nkeynes@1265: 		  found = TRUE;
nkeynes@1265: 		}
nkeynes@1265: 	    }
nkeynes@1265: 
nkeynes@1265: 	  if (!found)
nkeynes@1265: 	    {
nkeynes@1265: 	      /* No mapping symbol found at this address.  Look backwards
nkeynes@1265: 		 for a preceding one.  */
nkeynes@1265: 	      for (n = start - 1; n >= 0; n--)
nkeynes@1265: 		{
nkeynes@1265: 		  if (get_map_sym_type (info, n, &type))
nkeynes@1265: 		    {
nkeynes@1265: 		      last_sym = n;
nkeynes@1265: 		      found = TRUE;
nkeynes@1265: 		      break;
nkeynes@1265: 		    }
nkeynes@1265: 		}
nkeynes@1265: 	    }
nkeynes@1265: 
nkeynes@1265: 	  if (found)
nkeynes@1265: 	    private_data->has_mapping_symbols = 1;
nkeynes@1265: 
nkeynes@1265: 	  /* No mapping symbols were found.  A leading $d may be
nkeynes@1265: 	     omitted for sections which start with data; but for
nkeynes@1265: 	     compatibility with legacy and stripped binaries, only
nkeynes@1265: 	     assume the leading $d if there is at least one mapping
nkeynes@1265: 	     symbol in the file.  */
nkeynes@1265: 	  if (!found && private_data->has_mapping_symbols == -1)
nkeynes@1265: 	    {
nkeynes@1265: 	      /* Look for mapping symbols, in any section.  */
nkeynes@1265: 	      for (n = 0; n < info->symtab_size; n++)
nkeynes@1265: 		if (is_mapping_symbol (info, n, &type))
nkeynes@1265: 		  {
nkeynes@1265: 		    private_data->has_mapping_symbols = 1;
nkeynes@1265: 		    break;
nkeynes@1265: 		  }
nkeynes@1265: 	      if (private_data->has_mapping_symbols == -1)
nkeynes@1265: 		private_data->has_mapping_symbols = 0;
nkeynes@1265: 	    }
nkeynes@1265: 
nkeynes@1265: 	  if (!found && private_data->has_mapping_symbols == 1)
nkeynes@1265: 	    {
nkeynes@1265: 	      type = MAP_DATA;
nkeynes@1265: 	      found = TRUE;
nkeynes@1265: 	    }
nkeynes@1265: 	}
nkeynes@1265: 
nkeynes@1265:       /* Next search for function symbols to separate ARM from Thumb
nkeynes@1265: 	 in binaries without mapping symbols.  */
nkeynes@1265:       if (!found)
nkeynes@1265: 	{
nkeynes@1265: 	  /* Scan up to the location being disassembled.  */
nkeynes@1265: 	  for (n = start; n < info->symtab_size; n++)
nkeynes@1265: 	    {
nkeynes@1265: 	      addr = bfd_asymbol_value (info->symtab[n]);
nkeynes@1265: 	      if (addr > pc)
nkeynes@1265: 		break;
nkeynes@1265: 	      if (get_sym_code_type (info, n, &type))
nkeynes@1265: 		{
nkeynes@1265: 		  last_sym = n;
nkeynes@1265: 		  found = TRUE;
nkeynes@1265: 		}
nkeynes@1265: 	    }
nkeynes@1265: 
nkeynes@1265: 	  if (!found)
nkeynes@1265: 	    {
nkeynes@1265: 	      /* No mapping symbol found at this address.  Look backwards
nkeynes@1265: 		 for a preceding one.  */
nkeynes@1265: 	      for (n = start - 1; n >= 0; n--)
nkeynes@1265: 		{
nkeynes@1265: 		  if (get_sym_code_type (info, n, &type))
nkeynes@1265: 		    {
nkeynes@1265: 		      last_sym = n;
nkeynes@1265: 		      found = TRUE;
nkeynes@1265: 		      break;
nkeynes@1265: 		    }
nkeynes@1265: 		}
nkeynes@1265: 	    }
nkeynes@1265: 	}
nkeynes@1265: 
nkeynes@1265:       private_data->last_mapping_sym = last_sym;
nkeynes@1265:       private_data->last_type = type;
nkeynes@1265:       is_thumb = (private_data->last_type == MAP_THUMB);
nkeynes@1265:       is_data = (private_data->last_type == MAP_DATA);
nkeynes@1265: 
nkeynes@1265:       /* Look a little bit ahead to see if we should print out
nkeynes@1265: 	 two or four bytes of data.  If there's a symbol,
nkeynes@1265: 	 mapping or otherwise, after two bytes then don't
nkeynes@1265: 	 print more.  */
nkeynes@1265:       if (is_data)
nkeynes@1265: 	{
nkeynes@1265: 	  size = 4 - (pc & 3);
nkeynes@1265: 	  for (n = last_sym + 1; n < info->symtab_size; n++)
nkeynes@1265: 	    {
nkeynes@1265: 	      addr = bfd_asymbol_value (info->symtab[n]);
nkeynes@1265: 	      if (addr > pc
nkeynes@1265: 		  && (info->section == NULL
nkeynes@1265: 		      || info->section == info->symtab[n]->section))
nkeynes@1265: 		{
nkeynes@1265: 		  if (addr - pc < size)
nkeynes@1265: 		    size = addr - pc;
nkeynes@1265: 		  break;
nkeynes@1265: 		}
nkeynes@1265: 	    }
nkeynes@1265: 	  /* If the next symbol is after three bytes, we need to
nkeynes@1265: 	     print only part of the data, so that we can use either
nkeynes@1265: 	     .byte or .short.  */
nkeynes@1265: 	  if (size == 3)
nkeynes@1265: 	    size = (pc & 1) ? 1 : 2;
nkeynes@1265: 	}
nkeynes@1265:     }
nkeynes@1265: 
nkeynes@1265: #if 0
nkeynes@1265:   if (info->symbols != NULL)
nkeynes@1265:     {
nkeynes@1265:       if (bfd_asymbol_flavour (*info->symbols) == bfd_target_coff_flavour)
nkeynes@1265: 	{
nkeynes@1265: 	  coff_symbol_type * cs;
nkeynes@1265: 
nkeynes@1265: 	  cs = coffsymbol (*info->symbols);
nkeynes@1265: 	  is_thumb = (   cs->native->u.syment.n_sclass == C_THUMBEXT
nkeynes@1265: 		      || cs->native->u.syment.n_sclass == C_THUMBSTAT
nkeynes@1265: 		      || cs->native->u.syment.n_sclass == C_THUMBLABEL
nkeynes@1265: 		      || cs->native->u.syment.n_sclass == C_THUMBEXTFUNC
nkeynes@1265: 		      || cs->native->u.syment.n_sclass == C_THUMBSTATFUNC);
nkeynes@1265: 	}
nkeynes@1265:       else if (bfd_asymbol_flavour (*info->symbols) == bfd_target_elf_flavour
nkeynes@1265: 	       && !found)
nkeynes@1265: 	{
nkeynes@1265: 	  /* If no mapping symbol has been found then fall back to the type
nkeynes@1265: 	     of the function symbol.  */
nkeynes@1265: 	  elf_symbol_type *  es;
nkeynes@1265: 	  unsigned int       type;
nkeynes@1265: 
nkeynes@1265: 	  es = *(elf_symbol_type **)(info->symbols);
nkeynes@1265: 	  type = ELF_ST_TYPE (es->internal_elf_sym.st_info);
nkeynes@1265: 
nkeynes@1265: 	  is_thumb = ((ARM_SYM_BRANCH_TYPE (&es->internal_elf_sym)
nkeynes@1265: 		       == ST_BRANCH_TO_THUMB)
nkeynes@1265: 		      || type == STT_ARM_16BIT);
nkeynes@1265: 	}
nkeynes@1265:     }
nkeynes@1265: #endif
nkeynes@1265:   if (force_thumb)
nkeynes@1265:     is_thumb = TRUE;
nkeynes@1265: 
nkeynes@1265:   if (is_data)
nkeynes@1265:     info->display_endian = little ? BFD_ENDIAN_LITTLE : BFD_ENDIAN_BIG;
nkeynes@1265:   else
nkeynes@1265:     info->display_endian = little_code ? BFD_ENDIAN_LITTLE : BFD_ENDIAN_BIG;
nkeynes@1265: 
nkeynes@1265:   info->bytes_per_line = 4;
nkeynes@1265: 
nkeynes@1265:   /* PR 10263: Disassemble data if requested to do so by the user.  */
nkeynes@1265:   if (is_data && ((info->flags & DISASSEMBLE_DATA) == 0))
nkeynes@1265:     {
nkeynes@1265:       int i;
nkeynes@1265: 
nkeynes@1265:       /* Size was already set above.  */
nkeynes@1265:       info->bytes_per_chunk = size;
nkeynes@1265:       printer = print_insn_data;
nkeynes@1265: 
nkeynes@1265:       status = info->read_memory_func (pc, (bfd_byte *) b, size, info);
nkeynes@1265:       given = 0;
nkeynes@1265:       if (little)
nkeynes@1265: 	for (i = size - 1; i >= 0; i--)
nkeynes@1265: 	  given = b[i] | (given << 8);
nkeynes@1265:       else
nkeynes@1265: 	for (i = 0; i < (int) size; i++)
nkeynes@1265: 	  given = b[i] | (given << 8);
nkeynes@1265:     }
nkeynes@1265:   else if (!is_thumb)
nkeynes@1265:     {
nkeynes@1265:       /* In ARM mode endianness is a straightforward issue: the instruction
nkeynes@1265: 	 is four bytes long and is either ordered 0123 or 3210.  */
nkeynes@1265:       printer = print_insn_arm;
nkeynes@1265:       info->bytes_per_chunk = 4;
nkeynes@1265:       size = 4;
nkeynes@1265: 
nkeynes@1265:       status = info->read_memory_func (pc, (bfd_byte *) b, 4, info);
nkeynes@1265:       if (little_code)
nkeynes@1265: 	given = (b[0]) | (b[1] << 8) | (b[2] << 16) | (b[3] << 24);
nkeynes@1265:       else
nkeynes@1265: 	given = (b[3]) | (b[2] << 8) | (b[1] << 16) | (b[0] << 24);
nkeynes@1265:     }
nkeynes@1265:   else
nkeynes@1265:     {
nkeynes@1265:       /* In Thumb mode we have the additional wrinkle of two
nkeynes@1265: 	 instruction lengths.  Fortunately, the bits that determine
nkeynes@1265: 	 the length of the current instruction are always to be found
nkeynes@1265: 	 in the first two bytes.  */
nkeynes@1265:       printer = print_insn_thumb16;
nkeynes@1265:       info->bytes_per_chunk = 2;
nkeynes@1265:       size = 2;
nkeynes@1265: 
nkeynes@1265:       status = info->read_memory_func (pc, (bfd_byte *) b, 2, info);
nkeynes@1265:       if (little_code)
nkeynes@1265: 	given = (b[0]) | (b[1] << 8);
nkeynes@1265:       else
nkeynes@1265: 	given = (b[1]) | (b[0] << 8);
nkeynes@1265: 
nkeynes@1265:       if (!status)
nkeynes@1265: 	{
nkeynes@1265: 	  /* These bit patterns signal a four-byte Thumb
nkeynes@1265: 	     instruction.  */
nkeynes@1265: 	  if ((given & 0xF800) == 0xF800
nkeynes@1265: 	      || (given & 0xF800) == 0xF000
nkeynes@1265: 	      || (given & 0xF800) == 0xE800)
nkeynes@1265: 	    {
nkeynes@1265: 	      status = info->read_memory_func (pc + 2, (bfd_byte *) b, 2, info);
nkeynes@1265: 	      if (little_code)
nkeynes@1265: 		given = (b[0]) | (b[1] << 8) | (given << 16);
nkeynes@1265: 	      else
nkeynes@1265: 		given = (b[1]) | (b[0] << 8) | (given << 16);
nkeynes@1265: 
nkeynes@1265: 	      printer = print_insn_thumb32;
nkeynes@1265: 	      size = 4;
nkeynes@1265: 	    }
nkeynes@1265: 	}
nkeynes@1265: 
nkeynes@1265:       if (ifthen_address != pc)
nkeynes@1265: 	find_ifthen_state (pc, info, little_code);
nkeynes@1265: 
nkeynes@1265:       if (ifthen_state)
nkeynes@1265: 	{
nkeynes@1265: 	  if ((ifthen_state & 0xf) == 0x8)
nkeynes@1265: 	    ifthen_next_state = 0;
nkeynes@1265: 	  else
nkeynes@1265: 	    ifthen_next_state = (ifthen_state & 0xe0)
nkeynes@1265: 				| ((ifthen_state & 0xf) << 1);
nkeynes@1265: 	}
nkeynes@1265:     }
nkeynes@1265: 
nkeynes@1265:   if (status)
nkeynes@1265:     {
nkeynes@1265:       info->memory_error_func (status, pc, info);
nkeynes@1265:       return -1;
nkeynes@1265:     }
nkeynes@1265:   if (info->flags & INSN_HAS_RELOC)
nkeynes@1265:     /* If the instruction has a reloc associated with it, then
nkeynes@1265:        the offset field in the instruction will actually be the
nkeynes@1265:        addend for the reloc.  (We are using REL type relocs).
nkeynes@1265:        In such cases, we can ignore the pc when computing
nkeynes@1265:        addresses, since the addend is not currently pc-relative.  */
nkeynes@1265:     pc = 0;
nkeynes@1265: 
nkeynes@1265:   printer (pc, info, given);
nkeynes@1265: 
nkeynes@1265:   if (is_thumb)
nkeynes@1265:     {
nkeynes@1265:       ifthen_state = ifthen_next_state;
nkeynes@1265:       ifthen_address += size;
nkeynes@1265:     }
nkeynes@1265:   return size;
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: int
nkeynes@1265: print_insn_big_arm (bfd_vma pc, struct disassemble_info *info)
nkeynes@1265: {
nkeynes@1265:   /* Detect BE8-ness and record it in the disassembler info.  */
nkeynes@1265: #if 0
nkeynes@1265:   if (info->flavour == bfd_target_elf_flavour
nkeynes@1265:       && info->section != NULL
nkeynes@1265:       && (elf_elfheader (info->section->owner)->e_flags & EF_ARM_BE8))
nkeynes@1265:     info->endian_code = BFD_ENDIAN_LITTLE;
nkeynes@1265: #endif
nkeynes@1265:   return print_insn (pc, info, FALSE);
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: int
nkeynes@1265: print_insn_little_arm (bfd_vma pc, struct disassemble_info *info)
nkeynes@1265: {
nkeynes@1265:   return print_insn (pc, info, TRUE);
nkeynes@1265: }
nkeynes@1265: 
nkeynes@1265: void
nkeynes@1265: print_arm_disassembler_options (FILE *stream)
nkeynes@1265: {
nkeynes@1265:   int i;
nkeynes@1265: 
nkeynes@1265:   fprintf (stream, _("\n\
nkeynes@1265: The following ARM specific disassembler options are supported for use with\n\
nkeynes@1265: the -M switch:\n"));
nkeynes@1265: 
nkeynes@1265:   for (i = NUM_ARM_REGNAMES; i--;)
nkeynes@1265:     fprintf (stream, "  reg-names-%s %*c%s\n",
nkeynes@1265: 	     regnames[i].name,
nkeynes@1265: 	     (int)(14 - strlen (regnames[i].name)), ' ',
nkeynes@1265: 	     regnames[i].description);
nkeynes@1265: 
nkeynes@1265:   fprintf (stream, "  force-thumb              Assume all insns are Thumb insns\n");
nkeynes@1265:   fprintf (stream, "  no-force-thumb           Examine preceding label to determine an insn's type\n\n");
nkeynes@1265: }