nkeynes@31: /** nkeynes@106: * $Id: pvr2.c,v 1.18 2006-03-14 12:45:53 nkeynes Exp $ nkeynes@31: * nkeynes@100: * PVR2 (Video) Core MMIO registers. nkeynes@31: * nkeynes@31: * Copyright (c) 2005 Nathan Keynes. nkeynes@31: * nkeynes@31: * This program is free software; you can redistribute it and/or modify nkeynes@31: * it under the terms of the GNU General Public License as published by nkeynes@31: * the Free Software Foundation; either version 2 of the License, or nkeynes@31: * (at your option) any later version. nkeynes@31: * nkeynes@31: * This program is distributed in the hope that it will be useful, nkeynes@31: * but WITHOUT ANY WARRANTY; without even the implied warranty of nkeynes@31: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the nkeynes@31: * GNU General Public License for more details. nkeynes@31: */ nkeynes@35: #define MODULE pvr2_module nkeynes@31: nkeynes@1: #include "dream.h" nkeynes@1: #include "video.h" nkeynes@1: #include "mem.h" nkeynes@1: #include "asic.h" nkeynes@103: #include "pvr2/pvr2.h" nkeynes@56: #include "sh4/sh4core.h" nkeynes@1: #define MMIO_IMPL nkeynes@103: #include "pvr2/pvr2mmio.h" nkeynes@1: nkeynes@1: char *video_base; nkeynes@1: nkeynes@15: void pvr2_init( void ); nkeynes@30: uint32_t pvr2_run_slice( uint32_t ); nkeynes@94: void pvr2_display_frame( void ); nkeynes@94: nkeynes@103: /** nkeynes@103: * Current PVR2 ram address of the data (if any) currently held in the nkeynes@103: * OpenGL buffers. nkeynes@103: */ nkeynes@103: nkeynes@94: video_driver_t video_driver = NULL; nkeynes@94: struct video_buffer video_buffer[2]; nkeynes@94: int video_buffer_idx = 0; nkeynes@15: nkeynes@103: struct video_timing { nkeynes@103: int fields_per_second; nkeynes@103: int total_lines; nkeynes@103: int display_lines; nkeynes@103: int line_time_ns; nkeynes@103: }; nkeynes@103: nkeynes@103: struct video_timing pal_timing = { 50, 625, 575, 32000 }; nkeynes@103: struct video_timing ntsc_timing= { 60, 525, 480, 31746 }; nkeynes@103: nkeynes@23: struct dreamcast_module pvr2_module = { "PVR2", pvr2_init, NULL, NULL, nkeynes@23: pvr2_run_slice, NULL, nkeynes@15: NULL, NULL }; nkeynes@15: nkeynes@1: void pvr2_init( void ) nkeynes@1: { nkeynes@1: register_io_region( &mmio_region_PVR2 ); nkeynes@85: register_io_region( &mmio_region_PVR2PAL ); nkeynes@56: register_io_region( &mmio_region_PVR2TA ); nkeynes@1: video_base = mem_get_region_by_name( MEM_REGION_VIDEO ); nkeynes@106: } nkeynes@106: nkeynes@106: void video_set_driver( video_driver_t driver ) nkeynes@106: { nkeynes@106: if( video_driver != NULL && video_driver->shutdown_driver != NULL ) nkeynes@106: video_driver->shutdown_driver(); nkeynes@106: nkeynes@106: video_driver = driver; nkeynes@106: if( driver->init_driver != NULL ) nkeynes@106: driver->init_driver(); nkeynes@106: driver->set_display_format( 640, 480, COLFMT_RGB32 ); nkeynes@1: } nkeynes@1: nkeynes@103: uint32_t pvr2_line_count = 0; nkeynes@103: uint32_t pvr2_line_remainder = 0; nkeynes@103: uint32_t pvr2_irq_vpos1 = 0; nkeynes@103: uint32_t pvr2_irq_vpos2 = 0; nkeynes@103: struct video_timing *pvr2_timing = &ntsc_timing; nkeynes@23: uint32_t pvr2_time_counter = 0; nkeynes@94: uint32_t pvr2_frame_counter = 0; nkeynes@30: uint32_t pvr2_time_per_frame = 20000000; nkeynes@23: nkeynes@30: uint32_t pvr2_run_slice( uint32_t nanosecs ) nkeynes@23: { nkeynes@103: pvr2_line_remainder += nanosecs; nkeynes@103: while( pvr2_line_remainder >= pvr2_timing->line_time_ns ) { nkeynes@103: pvr2_line_remainder -= pvr2_timing->line_time_ns; nkeynes@103: pvr2_line_count++; nkeynes@103: if( pvr2_line_count == pvr2_irq_vpos1 ) { nkeynes@103: asic_event( EVENT_SCANLINE1 ); nkeynes@103: } nkeynes@103: if( pvr2_line_count == pvr2_irq_vpos2 ) { nkeynes@103: asic_event( EVENT_SCANLINE2 ); nkeynes@103: } nkeynes@103: if( pvr2_line_count == pvr2_timing->display_lines ) { nkeynes@103: asic_event( EVENT_RETRACE ); nkeynes@103: } else if( pvr2_line_count == pvr2_timing->total_lines ) { nkeynes@103: pvr2_display_frame(); nkeynes@103: pvr2_line_count = 0; nkeynes@103: } nkeynes@23: } nkeynes@30: return nanosecs; nkeynes@23: } nkeynes@23: nkeynes@1: uint32_t vid_stride, vid_lpf, vid_ppl, vid_hres, vid_vres, vid_col; nkeynes@1: int interlaced, bChanged = 1, bEnabled = 0, vid_size = 0; nkeynes@1: char *frame_start; /* current video start address (in real memory) */ nkeynes@1: nkeynes@103: /** nkeynes@1: * Display the next frame, copying the current contents of video ram to nkeynes@1: * the window. If the video configuration has changed, first recompute the nkeynes@1: * new frame size/depth. nkeynes@1: */ nkeynes@94: void pvr2_display_frame( void ) nkeynes@1: { nkeynes@103: uint32_t display_addr = MMIO_READ( PVR2, DISPADDR1 ); nkeynes@103: nkeynes@94: int dispsize = MMIO_READ( PVR2, DISPSIZE ); nkeynes@94: int dispmode = MMIO_READ( PVR2, DISPMODE ); nkeynes@103: int vidcfg = MMIO_READ( PVR2, DISPCFG ); nkeynes@94: int vid_stride = ((dispsize & DISPSIZE_MODULO) >> 20) - 1; nkeynes@94: int vid_lpf = ((dispsize & DISPSIZE_LPF) >> 10) + 1; nkeynes@94: int vid_ppl = ((dispsize & DISPSIZE_PPL)) + 1; nkeynes@103: gboolean bEnabled = (dispmode & DISPMODE_DE) && (vidcfg & DISPCFG_VO ) ? TRUE : FALSE; nkeynes@103: gboolean interlaced = (vidcfg & DISPCFG_I ? TRUE : FALSE); nkeynes@1: if( bEnabled ) { nkeynes@94: video_buffer_t buffer = &video_buffer[video_buffer_idx]; nkeynes@94: video_buffer_idx = !video_buffer_idx; nkeynes@94: video_buffer_t last = &video_buffer[video_buffer_idx]; nkeynes@94: buffer->rowstride = (vid_ppl + vid_stride) << 2; nkeynes@94: buffer->data = frame_start = video_base + MMIO_READ( PVR2, DISPADDR1 ); nkeynes@94: buffer->vres = vid_lpf; nkeynes@94: if( interlaced ) buffer->vres <<= 1; nkeynes@103: switch( (dispmode & DISPMODE_COL) >> 2 ) { nkeynes@103: case 0: nkeynes@103: buffer->colour_format = COLFMT_ARGB1555; nkeynes@103: buffer->hres = vid_ppl << 1; nkeynes@103: break; nkeynes@103: case 1: nkeynes@103: buffer->colour_format = COLFMT_RGB565; nkeynes@103: buffer->hres = vid_ppl << 1; nkeynes@103: break; nkeynes@103: case 2: nkeynes@103: buffer->colour_format = COLFMT_RGB888; nkeynes@103: buffer->hres = (vid_ppl << 2) / 3; nkeynes@103: break; nkeynes@103: case 3: nkeynes@103: buffer->colour_format = COLFMT_ARGB8888; nkeynes@103: buffer->hres = vid_ppl; nkeynes@103: break; nkeynes@94: } nkeynes@94: nkeynes@94: if( video_driver != NULL ) { nkeynes@94: if( buffer->hres != last->hres || nkeynes@94: buffer->vres != last->vres || nkeynes@94: buffer->colour_format != last->colour_format) { nkeynes@103: video_driver->set_display_format( buffer->hres, buffer->vres, nkeynes@103: buffer->colour_format ); nkeynes@94: } nkeynes@103: if( MMIO_READ( PVR2, DISPCFG2 ) & 0x08 ) { /* Blanked */ nkeynes@100: uint32_t colour = MMIO_READ( PVR2, DISPBORDER ); nkeynes@94: video_driver->display_blank_frame( colour ); nkeynes@103: } else if( !pvr2_render_display_frame( PVR2_RAM_BASE + display_addr ) ) { nkeynes@94: video_driver->display_frame( buffer ); nkeynes@94: } nkeynes@65: } nkeynes@1: } else { nkeynes@94: video_buffer_idx = 0; nkeynes@94: video_buffer[0].hres = video_buffer[0].vres = 0; nkeynes@1: } nkeynes@94: pvr2_frame_counter++; nkeynes@1: asic_event( EVENT_SCANLINE1 ); nkeynes@1: asic_event( EVENT_SCANLINE2 ); nkeynes@1: asic_event( EVENT_RETRACE ); nkeynes@1: } nkeynes@1: nkeynes@1: void mmio_region_PVR2_write( uint32_t reg, uint32_t val ) nkeynes@1: { nkeynes@1: if( reg >= 0x200 && reg < 0x600 ) { /* Fog table */ nkeynes@1: MMIO_WRITE( PVR2, reg, val ); nkeynes@1: /* I don't want to hear about these */ nkeynes@1: return; nkeynes@1: } nkeynes@1: nkeynes@1: INFO( "PVR2 write to %08X <= %08X [%s: %s]", reg, val, nkeynes@1: MMIO_REGID(PVR2,reg), MMIO_REGDESC(PVR2,reg) ); nkeynes@1: nkeynes@1: switch(reg) { nkeynes@103: case VPOS_IRQ: nkeynes@103: pvr2_irq_vpos1 = (val >> 16) & 0x03FF; nkeynes@103: pvr2_irq_vpos2 = val & 0x03FF; nkeynes@103: break; nkeynes@100: case TAINIT: nkeynes@100: if( val & 0x80000000 ) nkeynes@100: pvr2_ta_init(); nkeynes@100: break; nkeynes@65: case RENDSTART: nkeynes@65: if( val == 0xFFFFFFFF ) nkeynes@65: pvr2_render_scene(); nkeynes@65: break; nkeynes@1: } nkeynes@1: MMIO_WRITE( PVR2, reg, val ); nkeynes@1: } nkeynes@1: nkeynes@1: MMIO_REGION_READ_FN( PVR2, reg ) nkeynes@1: { nkeynes@1: switch( reg ) { nkeynes@1: case BEAMPOS: nkeynes@2: return sh4r.icount&0x20 ? 0x2000 : 1; nkeynes@1: default: nkeynes@1: return MMIO_READ( PVR2, reg ); nkeynes@1: } nkeynes@1: } nkeynes@19: nkeynes@85: MMIO_REGION_DEFFNS( PVR2PAL ) nkeynes@85: nkeynes@19: void pvr2_set_base_address( uint32_t base ) nkeynes@19: { nkeynes@19: mmio_region_PVR2_write( DISPADDR1, base ); nkeynes@19: } nkeynes@56: nkeynes@56: nkeynes@65: nkeynes@98: nkeynes@56: int32_t mmio_region_PVR2TA_read( uint32_t reg ) nkeynes@56: { nkeynes@56: return 0xFFFFFFFF; nkeynes@56: } nkeynes@56: nkeynes@56: void mmio_region_PVR2TA_write( uint32_t reg, uint32_t val ) nkeynes@56: { nkeynes@100: pvr2_ta_write( &val, sizeof(uint32_t) ); nkeynes@56: } nkeynes@56: nkeynes@85: nkeynes@103: void pvr2_vram64_write( sh4addr_t destaddr, char *src, uint32_t length ) nkeynes@103: { nkeynes@103: int bank_flag = (destaddr & 0x04) >> 2; nkeynes@103: uint32_t *banks[2]; nkeynes@103: uint32_t *dwsrc; nkeynes@103: int i; nkeynes@65: nkeynes@103: destaddr = destaddr & 0x7FFFFF; nkeynes@103: if( destaddr + length > 0x800000 ) { nkeynes@103: length = 0x800000 - destaddr; nkeynes@103: } nkeynes@103: nkeynes@103: for( i=destaddr & 0xFFFFF000; i < destaddr + length; i+= PAGE_SIZE ) { nkeynes@103: texcache_invalidate_page( i ); nkeynes@103: } nkeynes@103: nkeynes@103: banks[0] = ((uint32_t *)(video_base + (destaddr>>3))); nkeynes@103: banks[1] = banks[0] + 0x100000; nkeynes@103: nkeynes@103: /* Handle non-aligned start of source */ nkeynes@103: if( destaddr & 0x03 ) { nkeynes@103: char *dest = ((char *)banks[bank_flag]) + (destaddr & 0x03); nkeynes@103: for( i= destaddr & 0x03; i < 4 && length > 0; i++, length-- ) { nkeynes@103: *dest++ = *src++; nkeynes@103: } nkeynes@103: bank_flag = !bank_flag; nkeynes@103: } nkeynes@103: nkeynes@103: dwsrc = (uint32_t *)src; nkeynes@103: while( length >= 4 ) { nkeynes@103: *banks[bank_flag]++ = *dwsrc++; nkeynes@103: bank_flag = !bank_flag; nkeynes@103: length -= 4; nkeynes@103: } nkeynes@103: nkeynes@103: /* Handle non-aligned end of source */ nkeynes@103: if( length ) { nkeynes@103: src = (char *)dwsrc; nkeynes@103: char *dest = (char *)banks[bank_flag]; nkeynes@103: while( length-- > 0 ) { nkeynes@103: *dest++ = *src++; nkeynes@103: } nkeynes@103: } nkeynes@103: nkeynes@103: } nkeynes@103: nkeynes@103: void pvr2_vram64_read( char *dest, sh4addr_t srcaddr, uint32_t length ) nkeynes@103: { nkeynes@103: int bank_flag = (srcaddr & 0x04) >> 2; nkeynes@103: uint32_t *banks[2]; nkeynes@103: uint32_t *dwdest; nkeynes@103: int i; nkeynes@103: nkeynes@103: srcaddr = srcaddr & 0x7FFFFF; nkeynes@103: if( srcaddr + length > 0x800000 ) nkeynes@103: length = 0x800000 - srcaddr; nkeynes@103: nkeynes@103: banks[0] = ((uint32_t *)(video_base + (srcaddr>>3))); nkeynes@103: banks[1] = banks[0] + 0x100000; nkeynes@103: nkeynes@103: /* Handle non-aligned start of source */ nkeynes@103: if( srcaddr & 0x03 ) { nkeynes@103: char *src = ((char *)banks[bank_flag]) + (srcaddr & 0x03); nkeynes@103: for( i= srcaddr & 0x03; i < 4 && length > 0; i++, length-- ) { nkeynes@103: *dest++ = *src++; nkeynes@103: } nkeynes@103: bank_flag = !bank_flag; nkeynes@103: } nkeynes@103: nkeynes@103: dwdest = (uint32_t *)dest; nkeynes@103: while( length >= 4 ) { nkeynes@103: *dwdest++ = *banks[bank_flag]++; nkeynes@103: bank_flag = !bank_flag; nkeynes@103: length -= 4; nkeynes@103: } nkeynes@103: nkeynes@103: /* Handle non-aligned end of source */ nkeynes@103: if( length ) { nkeynes@103: dest = (char *)dwdest; nkeynes@103: char *src = (char *)banks[bank_flag]; nkeynes@103: while( length-- > 0 ) { nkeynes@103: *dest++ = *src++; nkeynes@103: } nkeynes@103: } nkeynes@103: }