nkeynes@30: /** nkeynes@54: * $Id: sh4dasm.c,v 1.9 2006-01-01 08:08:40 nkeynes Exp $ nkeynes@30: * nkeynes@30: * SH4 CPU definition and disassembly functions nkeynes@30: * nkeynes@30: * Copyright (c) 2005 Nathan Keynes. nkeynes@30: * nkeynes@30: * This program is free software; you can redistribute it and/or modify nkeynes@30: * it under the terms of the GNU General Public License as published by nkeynes@30: * the Free Software Foundation; either version 2 of the License, or nkeynes@30: * (at your option) any later version. nkeynes@30: * nkeynes@30: * This program is distributed in the hope that it will be useful, nkeynes@30: * but WITHOUT ANY WARRANTY; without even the implied warranty of nkeynes@30: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the nkeynes@30: * GNU General Public License for more details. nkeynes@30: */ nkeynes@30: nkeynes@1: #include "sh4core.h" nkeynes@1: #include "sh4dasm.h" nkeynes@1: #include "mem.h" nkeynes@1: nkeynes@1: #define UNIMP(ir) snprintf( buf, len, "??? " ) nkeynes@1: nkeynes@9: nkeynes@11: const struct reg_desc_struct sh4_reg_map[] = nkeynes@9: { {"R0", REG_INT, &sh4r.r[0]}, {"R1", REG_INT, &sh4r.r[1]}, nkeynes@9: {"R2", REG_INT, &sh4r.r[2]}, {"R3", REG_INT, &sh4r.r[3]}, nkeynes@9: {"R4", REG_INT, &sh4r.r[4]}, {"R5", REG_INT, &sh4r.r[5]}, nkeynes@9: {"R6", REG_INT, &sh4r.r[6]}, {"R7", REG_INT, &sh4r.r[7]}, nkeynes@9: {"R8", REG_INT, &sh4r.r[8]}, {"R9", REG_INT, &sh4r.r[9]}, nkeynes@9: {"R10",REG_INT, &sh4r.r[10]}, {"R11",REG_INT, &sh4r.r[11]}, nkeynes@9: {"R12",REG_INT, &sh4r.r[12]}, {"R13",REG_INT, &sh4r.r[13]}, nkeynes@9: {"R14",REG_INT, &sh4r.r[14]}, {"R15",REG_INT, &sh4r.r[15]}, nkeynes@9: {"SR", REG_INT, &sh4r.sr}, {"GBR", REG_INT, &sh4r.gbr}, nkeynes@9: {"SSR",REG_INT, &sh4r.ssr}, {"SPC", REG_INT, &sh4r.spc}, nkeynes@9: {"SGR",REG_INT, &sh4r.sgr}, {"DBR", REG_INT, &sh4r.dbr}, nkeynes@9: {"VBR",REG_INT, &sh4r.vbr}, nkeynes@9: {"PC", REG_INT, &sh4r.pc}, {"PR", REG_INT, &sh4r.pr}, nkeynes@9: {"MACL",REG_INT, &sh4r.mac},{"MACH",REG_INT, ((uint32_t *)&sh4r.mac)+1}, nkeynes@9: {"FPUL", REG_INT, &sh4r.fpul}, {"FPSCR", REG_INT, &sh4r.fpscr}, nkeynes@9: {NULL, 0, NULL} }; nkeynes@9: nkeynes@10: nkeynes@14: const struct cpu_desc_struct sh4_cpu_desc = nkeynes@43: { "SH4", sh4_disasm_instruction, sh4_execute_instruction, mem_has_page, nkeynes@43: sh4_set_breakpoint, sh4_clear_breakpoint, sh4_get_breakpoint, 2, nkeynes@14: (char *)&sh4r, sizeof(sh4r), sh4_reg_map, nkeynes@30: &sh4r.pc, &sh4r.icount }; nkeynes@9: nkeynes@11: uint32_t sh4_disasm_instruction( uint32_t pc, char *buf, int len, char *opcode ) nkeynes@1: { nkeynes@10: uint16_t ir = sh4_read_word(pc); nkeynes@1: nkeynes@1: #define RN(ir) ((ir&0x0F00)>>8) nkeynes@1: #define RN_BANK(ir) ((ir&0x0070)>>4) nkeynes@1: #define RM(ir) ((ir&0x00F0)>>4) nkeynes@1: #define DISP4(ir) (ir&0x000F) /* 4-bit displacements are *not* sign extended */ nkeynes@1: #define DISP8(ir) (ir&0x00FF) nkeynes@1: #define PCDISP8(ir) SIGNEXT8(ir&0x00FF) nkeynes@1: #define UIMM8(ir) (ir&0x00FF) nkeynes@1: #define IMM8(ir) SIGNEXT8(ir&0x00FF) nkeynes@1: #define DISP12(ir) SIGNEXT12(ir&0x0FFF) nkeynes@1: #define FVN(ir) ((ir&0x0C00)>>10) nkeynes@1: #define FVM(ir) ((ir&0x0300)>>8) nkeynes@1: nkeynes@11: sprintf( opcode, "%02X %02X", ir&0xFF, ir>>8 ); nkeynes@11: nkeynes@1: switch( (ir&0xF000)>>12 ) { nkeynes@1: case 0: /* 0000nnnnmmmmxxxx */ nkeynes@1: switch( ir&0x000F ) { nkeynes@1: case 2: nkeynes@1: switch( (ir&0x00F0)>>4 ) { nkeynes@1: case 0: snprintf( buf, len, "STC SR, R%d", RN(ir) ); break; nkeynes@1: case 1: snprintf( buf, len, "STC GBR, R%d", RN(ir) ); break; nkeynes@1: case 2: snprintf( buf, len, "STC VBR, R%d", RN(ir) ); break; nkeynes@1: case 3: snprintf( buf, len, "STC SSR, R%d", RN(ir) ); break; nkeynes@1: case 4: snprintf( buf, len, "STC SPC, R%d", RN(ir) ); break; nkeynes@1: case 8: case 9: case 10: case 11: case 12: case 13: case 14: nkeynes@1: case 15:snprintf( buf, len, "STC R%d_bank, R%d", RN_BANK(ir), RN(ir) ); break; nkeynes@1: default: UNIMP(ir); nkeynes@1: } nkeynes@1: break; nkeynes@1: case 3: nkeynes@1: switch( (ir&0x00F0)>>4 ) { nkeynes@1: case 0: snprintf( buf, len, "BSRF R%d", RN(ir) ); break; nkeynes@1: case 2: snprintf( buf, len, "BRAF R%d", RN(ir) ); break; nkeynes@1: case 8: snprintf( buf, len, "PREF [R%d]", RN(ir) ); break; nkeynes@1: case 9: snprintf( buf, len, "OCBI [R%d]", RN(ir) ); break; nkeynes@1: case 10:snprintf( buf, len, "OCBP [R%d]", RN(ir) ); break; nkeynes@1: case 11:snprintf( buf, len, "OCBWB [R%d]", RN(ir) ); break; nkeynes@1: case 12:snprintf( buf, len, "MOVCA.L R0, [R%d]", RN(ir) ); break; nkeynes@1: default: UNIMP(ir); nkeynes@1: } nkeynes@1: break; nkeynes@1: case 4: snprintf( buf, len, "MOV.B R%d, [R0+R%d]", RM(ir), RN(ir) ); break; nkeynes@1: case 5: snprintf( buf, len, "MOV.W R%d, [R0+R%d]", RM(ir), RN(ir) ); break; nkeynes@1: case 6: snprintf( buf, len, "MOV.L R%d, [R0+R%d]", RM(ir), RN(ir) ); break; nkeynes@1: case 7: snprintf( buf, len, "MUL.L R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 8: nkeynes@1: switch( (ir&0x0FF0)>>4 ) { nkeynes@1: case 0: snprintf( buf, len, "CLRT " ); break; nkeynes@1: case 1: snprintf( buf, len, "SETT " ); break; nkeynes@1: case 2: snprintf( buf, len, "CLRMAC " ); break; nkeynes@1: case 3: snprintf( buf, len, "LDTLB " ); break; nkeynes@1: case 4: snprintf( buf, len, "CLRS " ); break; nkeynes@1: case 5: snprintf( buf, len, "SETS " ); break; nkeynes@1: default: UNIMP(ir); nkeynes@1: } nkeynes@1: break; nkeynes@1: case 9: nkeynes@1: if( (ir&0x00F0) == 0x20 ) nkeynes@1: snprintf( buf, len, "MOVT R%d", RN(ir) ); nkeynes@1: else if( ir == 0x0019 ) nkeynes@1: snprintf( buf, len, "DIV0U " ); nkeynes@1: else if( ir == 0x0009 ) nkeynes@1: snprintf( buf, len, "NOP " ); nkeynes@1: else UNIMP(ir); nkeynes@1: break; nkeynes@1: case 10: nkeynes@1: switch( (ir&0x00F0) >> 4 ) { nkeynes@1: case 0: snprintf( buf, len, "STS MACH, R%d", RN(ir) ); break; nkeynes@1: case 1: snprintf( buf, len, "STS MACL, R%d", RN(ir) ); break; nkeynes@1: case 2: snprintf( buf, len, "STS PR, R%d", RN(ir) ); break; nkeynes@1: case 3: snprintf( buf, len, "STC SGR, R%d", RN(ir) ); break; nkeynes@1: case 5: snprintf( buf, len, "STS FPUL, R%d", RN(ir) ); break; nkeynes@1: case 6: snprintf( buf, len, "STS FPSCR, R%d", RN(ir) ); break; nkeynes@1: case 15:snprintf( buf, len, "STC DBR, R%d", RN(ir) ); break; nkeynes@1: default: UNIMP(ir); nkeynes@1: } nkeynes@1: break; nkeynes@1: case 11: nkeynes@1: switch( (ir&0x0FF0)>>4 ) { nkeynes@1: case 0: snprintf( buf, len, "RTS " ); break; nkeynes@1: case 1: snprintf( buf, len, "SLEEP " ); break; nkeynes@1: case 2: snprintf( buf, len, "RTE " ); break; nkeynes@1: default:UNIMP(ir); nkeynes@1: } nkeynes@1: break; nkeynes@1: case 12:snprintf( buf, len, "MOV.B [R0+R%d], R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 13:snprintf( buf, len, "MOV.W [R0+R%d], R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 14:snprintf( buf, len, "MOV.L [R0+R%d], R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 15:snprintf( buf, len, "MAC.L [R%d++], [R%d++]", RM(ir), RN(ir) ); break; nkeynes@1: default: UNIMP(ir); nkeynes@1: } nkeynes@1: break; nkeynes@1: case 1: /* 0001nnnnmmmmdddd */ nkeynes@1: snprintf( buf, len, "MOV.L R%d, [R%d%+d]", RM(ir), RN(ir), DISP4(ir)<<2 ); break; nkeynes@1: case 2: /* 0010nnnnmmmmxxxx */ nkeynes@1: switch( ir&0x000F ) { nkeynes@1: case 0: snprintf( buf, len, "MOV.B R%d, [R%d]", RM(ir), RN(ir) ); break; nkeynes@1: case 1: snprintf( buf, len, "MOV.W R%d, [R%d]", RM(ir), RN(ir) ); break; nkeynes@1: case 2: snprintf( buf, len, "MOV.L R%d, [R%d]", RM(ir), RN(ir) ); break; nkeynes@1: case 3: UNIMP(ir); break; nkeynes@1: case 4: snprintf( buf, len, "MOV.B R%d, [--R%d]", RM(ir), RN(ir) ); break; nkeynes@1: case 5: snprintf( buf, len, "MOV.W R%d, [--R%d]", RM(ir), RN(ir) ); break; nkeynes@1: case 6: snprintf( buf, len, "MOV.L R%d, [--R%d]", RM(ir), RN(ir) ); break; nkeynes@1: case 7: snprintf( buf, len, "DIV0S R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 8: snprintf( buf, len, "TST R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 9: snprintf( buf, len, "AND R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 10:snprintf( buf, len, "XOR R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 11:snprintf( buf, len, "OR R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 12:snprintf( buf, len, "CMP/STR R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 13:snprintf( buf, len, "XTRCT R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 14:snprintf( buf, len, "MULU.W R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 15:snprintf( buf, len, "MULS.W R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: } nkeynes@1: break; nkeynes@1: case 3: /* 0011nnnnmmmmxxxx */ nkeynes@1: switch( ir&0x000F ) { nkeynes@1: case 0: snprintf( buf, len, "CMP/EQ R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 2: snprintf( buf, len, "CMP/HS R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 3: snprintf( buf, len, "CMP/GE R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 4: snprintf( buf, len, "DIV1 R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 5: snprintf( buf, len, "DMULU.L R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 6: snprintf( buf, len, "CMP/HI R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 7: snprintf( buf, len, "CMP/GT R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 8: snprintf( buf, len, "SUB R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 10:snprintf( buf, len, "SUBC R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 11:snprintf( buf, len, "SUBV R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 12:snprintf( buf, len, "ADD R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 13:snprintf( buf, len, "DMULS.L R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 14:snprintf( buf, len, "ADDC R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 15:snprintf( buf, len, "ADDV R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: default: UNIMP(ir); nkeynes@1: } nkeynes@1: break; nkeynes@1: case 4: /* 0100nnnnxxxxxxxx */ nkeynes@1: switch( ir&0x00FF ) { nkeynes@1: case 0x00: snprintf( buf, len, "SHLL R%d", RN(ir) ); break; nkeynes@1: case 0x01: snprintf( buf, len, "SHLR R%d", RN(ir) ); break; nkeynes@1: case 0x02: snprintf( buf, len, "STS.L MACH, [--R%d]", RN(ir) ); break; nkeynes@1: case 0x03: snprintf( buf, len, "STC.L SR, [--R%d]", RN(ir) ); break; nkeynes@1: case 0x04: snprintf( buf, len, "ROTL R%d", RN(ir) ); break; nkeynes@1: case 0x05: snprintf( buf, len, "ROTR R%d", RN(ir) ); break; nkeynes@1: case 0x06: snprintf( buf, len, "LDS.L [R%d++], MACH", RN(ir) ); break; nkeynes@1: case 0x07: snprintf( buf, len, "LDC.L [R%d++], SR", RN(ir) ); break; nkeynes@1: case 0x08: snprintf( buf, len, "SHLL2 R%d", RN(ir) ); break; nkeynes@1: case 0x09: snprintf( buf, len, "SHLR2 R%d", RN(ir) ); break; nkeynes@1: case 0x0A: snprintf( buf, len, "LDS R%d, MACH", RN(ir) ); break; nkeynes@1: case 0x0B: snprintf( buf, len, "JSR [R%d]", RN(ir) ); break; nkeynes@1: case 0x0E: snprintf( buf, len, "LDC R%d, SR", RN(ir) ); break; nkeynes@1: case 0x10: snprintf( buf, len, "DT R%d", RN(ir) ); break; nkeynes@1: case 0x11: snprintf( buf, len, "CMP/PZ R%d", RN(ir) ); break; nkeynes@1: case 0x12: snprintf( buf, len, "STS.L MACL, [--R%d]", RN(ir) ); break; nkeynes@1: case 0x13: snprintf( buf, len, "STC.L GBR, [--R%d]", RN(ir) ); break; nkeynes@1: case 0x15: snprintf( buf, len, "CMP/PL R%d", RN(ir) ); break; nkeynes@1: case 0x16: snprintf( buf, len, "LDS.L [R%d++], MACL", RN(ir) ); break; nkeynes@1: case 0x17: snprintf( buf, len, "LDC.L [R%d++], GBR", RN(ir) ); break; nkeynes@1: case 0x18: snprintf( buf, len, "SHLL8 R%d", RN(ir) ); break; nkeynes@1: case 0x19: snprintf( buf, len, "SHLR8 R%d", RN(ir) ); break; nkeynes@1: case 0x1A: snprintf( buf, len, "LDS R%d, MACL", RN(ir) ); break; nkeynes@1: case 0x1B: snprintf( buf, len, "TAS.B [R%d]", RN(ir) ); break; nkeynes@1: case 0x1E: snprintf( buf, len, "LDC R%d, GBR", RN(ir) ); break; nkeynes@1: case 0x20: snprintf( buf, len, "SHAL R%d", RN(ir) ); break; nkeynes@1: case 0x21: snprintf( buf, len, "SHAR R%d", RN(ir) ); break; nkeynes@1: case 0x22: snprintf( buf, len, "STS.L PR, [--R%d]", RN(ir) ); break; nkeynes@1: case 0x23: snprintf( buf, len, "STC.L VBR, [--R%d]", RN(ir) ); break; nkeynes@1: case 0x24: snprintf( buf, len, "ROTCL R%d", RN(ir) ); break; nkeynes@1: case 0x25: snprintf( buf, len, "ROTCR R%d", RN(ir) ); break; nkeynes@1: case 0x26: snprintf( buf, len, "LDS.L [R%d++], PR", RN(ir) ); break; nkeynes@1: case 0x27: snprintf( buf, len, "LDC.L [R%d++], VBR", RN(ir) ); break; nkeynes@1: case 0x28: snprintf( buf, len, "SHLL16 R%d", RN(ir) ); break; nkeynes@1: case 0x29: snprintf( buf, len, "SHLR16 R%d", RN(ir) ); break; nkeynes@1: case 0x2A: snprintf( buf, len, "LDS R%d, PR", RN(ir) ); break; nkeynes@1: case 0x2B: snprintf( buf, len, "JMP [R%d]", RN(ir) ); break; nkeynes@1: case 0x2E: snprintf( buf, len, "LDC R%d, VBR", RN(ir) ); break; nkeynes@1: case 0x32: snprintf( buf, len, "STC.L SGR, [--R%d]", RN(ir) ); break; nkeynes@1: case 0x33: snprintf( buf, len, "STC.L SSR, [--R%d]", RN(ir) ); break; nkeynes@1: case 0x37: snprintf( buf, len, "LDC.L [R%d++], SSR", RN(ir) ); break; nkeynes@1: case 0x3E: snprintf( buf, len, "LDC R%d, SSR", RN(ir) ); break; nkeynes@1: case 0x43: snprintf( buf, len, "STC.L SPC, [--R%d]", RN(ir) ); break; nkeynes@1: case 0x47: snprintf( buf, len, "LDC.L [R%d++], SPC", RN(ir) ); break; nkeynes@1: case 0x4E: snprintf( buf, len, "LDC R%d, SPC", RN(ir) ); break; nkeynes@1: case 0x52: snprintf( buf, len, "STS.L FPUL, [--R%d]", RN(ir) ); break; nkeynes@1: case 0x56: snprintf( buf, len, "LDS.L [R%d++], FPUL", RN(ir) ); break; nkeynes@1: case 0x5A: snprintf( buf, len, "LDS R%d, FPUL", RN(ir) ); break; nkeynes@1: case 0x62: snprintf( buf, len, "STS.L FPSCR, [--R%d]", RN(ir) ); break; nkeynes@1: case 0x66: snprintf( buf, len, "LDS.L [R%d++], FPSCR", RN(ir) ); break; nkeynes@1: case 0x6A: snprintf( buf, len, "LDS R%d, FPSCR", RN(ir) ); break; nkeynes@1: case 0xF2: snprintf( buf, len, "STC.L DBR, [--R%d]", RN(ir) ); break; nkeynes@1: case 0xF6: snprintf( buf, len, "LDC.L [R%d++], DBR", RN(ir) ); break; nkeynes@1: case 0xFA: snprintf( buf, len, "LDC R%d, DBR", RN(ir) ); break; nkeynes@1: case 0x83: case 0x93: case 0xA3: case 0xB3: case 0xC3: case 0xD3: case 0xE3: nkeynes@1: case 0xF3: snprintf( buf, len, "STC.L R%d_BANK, [--R%d]", RN_BANK(ir), RN(ir) ); break; nkeynes@1: case 0x87: case 0x97: case 0xA7: case 0xB7: case 0xC7: case 0xD7: case 0xE7: nkeynes@1: case 0xF7: snprintf( buf, len, "LDC.L [R%d++], R%d_BANK", RN(ir), RN_BANK(ir) ); break; nkeynes@1: case 0x8E: case 0x9E: case 0xAE: case 0xBE: case 0xCE: case 0xDE: case 0xEE: nkeynes@1: case 0xFE: snprintf( buf, len, "LDC R%d, R%d_BANK", RN(ir), RN_BANK(ir) ); break; nkeynes@1: default: nkeynes@1: if( (ir&0x000F) == 0x0F ) { nkeynes@1: snprintf( buf, len, "MAC.W [R%d++], [R%d++]", RM(ir), RN(ir) ); nkeynes@1: } else if( (ir&0x000F) == 0x0C ) { nkeynes@1: snprintf( buf, len, "SHAD R%d, R%d", RM(ir), RN(ir) ); nkeynes@1: } else if( (ir&0x000F) == 0x0D ) { nkeynes@1: snprintf( buf, len, "SHLD R%d, R%d", RM(ir), RN(ir) ); nkeynes@1: } else UNIMP(ir); nkeynes@1: } nkeynes@1: break; nkeynes@1: case 5: /* 0101nnnnmmmmdddd */ nkeynes@1: snprintf( buf, len, "MOV.L [R%d%+d], R%d", RM(ir), DISP4(ir)<<2, RN(ir) ); break; nkeynes@1: case 6: /* 0110xxxxxxxxxxxx */ nkeynes@1: switch( ir&0x000f ) { nkeynes@1: case 0: snprintf( buf, len, "MOV.B [R%d], R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 1: snprintf( buf, len, "MOV.W [R%d], R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 2: snprintf( buf, len, "MOV.L [R%d], R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 3: snprintf( buf, len, "MOV R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 4: snprintf( buf, len, "MOV.B [R%d++], R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 5: snprintf( buf, len, "MOV.W [R%d++], R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 6: snprintf( buf, len, "MOV.L [R%d++], R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 7: snprintf( buf, len, "NOT R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 8: snprintf( buf, len, "SWAP.B R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 9: snprintf( buf, len, "SWAP.W R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 10:snprintf( buf, len, "NEGC R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 11:snprintf( buf, len, "NEG R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 12:snprintf( buf, len, "EXTU.B R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 13:snprintf( buf, len, "EXTU.W R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 14:snprintf( buf, len, "EXTS.B R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: case 15:snprintf( buf, len, "EXTS.W R%d, R%d", RM(ir), RN(ir) ); break; nkeynes@1: } nkeynes@1: break; nkeynes@1: case 7: /* 0111nnnniiiiiiii */ nkeynes@1: snprintf( buf, len, "ADD #%d, R%d", SIGNEXT8(ir&0x00FF), RN(ir) ); break; nkeynes@1: case 8: /* 1000xxxxxxxxxxxx */ nkeynes@1: switch( (ir&0x0F00) >> 8 ) { nkeynes@1: case 0: snprintf( buf, len, "MOV.B R0, [R%d%+d]", RM(ir), DISP4(ir) ); break; nkeynes@1: case 1: snprintf( buf, len, "MOV.W R0, [R%d%+d]", RM(ir), DISP4(ir)<<1 ); break; nkeynes@1: case 4: snprintf( buf, len, "MOV.B [R%d%+d], R0", RM(ir), DISP4(ir) ); break; nkeynes@1: case 5: snprintf( buf, len, "MOV.W [R%d%+d], R0", RM(ir), DISP4(ir)<<1 ); break; nkeynes@1: case 8: snprintf( buf, len, "CMP/EQ #%d, R0", IMM8(ir) ); break; nkeynes@1: case 9: snprintf( buf, len, "BT $%xh", (PCDISP8(ir)<<1)+pc+4 ); break; nkeynes@1: case 11:snprintf( buf, len, "BF $%xh", (PCDISP8(ir)<<1)+pc+4 ); break; nkeynes@1: case 13:snprintf( buf, len, "BT/S $%xh", (PCDISP8(ir)<<1)+pc+4 ); break; nkeynes@1: case 15:snprintf( buf, len, "BF/S $%xh", (PCDISP8(ir)<<1)+pc+4 ); break; nkeynes@1: default: UNIMP(ir); nkeynes@1: } nkeynes@1: break; nkeynes@1: case 9: /* 1001xxxxxxxxxxxx */ nkeynes@1: snprintf( buf, len, "MOV.W [$%xh], R%-2d ; <- #%08x", (DISP8(ir)<<1)+pc+4, RN(ir), nkeynes@10: sh4_read_word( (DISP8(ir)<<1)+pc+4 ) ); break; nkeynes@1: case 10:/* 1010xxxxxxxxxxxx */ nkeynes@1: snprintf( buf, len, "BRA $%xh", (DISP12(ir)<<1)+pc+4 ); break; nkeynes@1: case 11:/* 1011xxxxxxxxxxxx */ nkeynes@1: snprintf( buf, len, "BSR $%xh", (DISP12(ir)<<1)+pc+4 ); break; nkeynes@1: case 12:/* 1100xxxxdddddddd */ nkeynes@1: switch( (ir&0x0F00)>>8 ) { nkeynes@1: case 0: snprintf( buf, len, "MOV.B R0, [GBR%+d]", DISP8(ir) ); break; nkeynes@1: case 1: snprintf( buf, len, "MOV.W R0, [GBR%+d]", DISP8(ir)<<1 ); break; nkeynes@1: case 2: snprintf( buf, len, "MOV.L R0, [GBR%+d]", DISP8(ir)<<2 ); break; nkeynes@1: case 3: snprintf( buf, len, "TRAPA #%d", UIMM8(ir) ); break; nkeynes@1: case 4: snprintf( buf, len, "MOV.B [GBR%+d], R0", DISP8(ir) ); break; nkeynes@1: case 5: snprintf( buf, len, "MOV.W [GBR%+d], R0", DISP8(ir)<<1 ); break; nkeynes@1: case 6: snprintf( buf, len, "MOV.L [GBR%+d], R0", DISP8(ir)<<2 ); break; nkeynes@1: case 7: snprintf( buf, len, "MOVA $%xh, R0", (DISP8(ir)<<2)+(pc&~3)+4 ); break; nkeynes@1: case 8: snprintf( buf, len, "TST #%02Xh, R0", UIMM8(ir) ); break; nkeynes@1: case 9: snprintf( buf, len, "AND #%02Xh, R0", UIMM8(ir) ); break; nkeynes@1: case 10:snprintf( buf, len, "XOR #%02Xh, R0", UIMM8(ir) ); break; nkeynes@1: case 11:snprintf( buf, len, "OR #%02Xh, R0", UIMM8(ir) ); break; nkeynes@1: case 12:snprintf( buf, len, "TST.B #%02Xh, [R0+GBR]", UIMM8(ir) ); break; nkeynes@1: case 13:snprintf( buf, len, "AND.B #%02Xh, [R0+GBR]", UIMM8(ir) ); break; nkeynes@1: case 14:snprintf( buf, len, "XOR.B #%02Xh, [R0+GBR]", UIMM8(ir) ); break; nkeynes@1: case 15:snprintf( buf, len, "OR.B #%02Xh, [R0+GBR]", UIMM8(ir) ); break; nkeynes@1: } nkeynes@1: break; nkeynes@1: case 13:/* 1101xxxxxxxxxxxx */ nkeynes@1: snprintf( buf, len, "MOV.L [$%xh], R%-2d ; <- #%08x", (DISP8(ir)<<2)+(pc&~3)+4, RN(ir), nkeynes@10: sh4_read_long( (DISP8(ir)<<2)+(pc&~3)+4 ) ); break; nkeynes@1: case 14:/* 1110xxxxxxxxxxxx */ nkeynes@1: snprintf( buf, len, "MOV #%d, R%d", DISP8(ir), RN(ir)); break; nkeynes@1: case 15:/* 1111xxxxxxxxxxxx */ nkeynes@1: switch( ir&0x000F ) { nkeynes@1: case 0: snprintf( buf, len, "FADD FR%d, FR%d", RM(ir), RN(ir) ); break; nkeynes@1: case 1: snprintf( buf, len, "FSUB FR%d, FR%d", RM(ir), RN(ir) ); break; nkeynes@1: case 2: snprintf( buf, len, "FMUL FR%d, FR%d", RM(ir), RN(ir) ); break; nkeynes@1: case 3: snprintf( buf, len, "FDIV FR%d, FR%d", RM(ir), RN(ir) ); break; nkeynes@1: case 4: snprintf( buf, len, "FCMP/EQ FR%d, FR%d", RM(ir), RN(ir) ); break; nkeynes@1: case 5: snprintf( buf, len, "FCMP/GT FR%d, FR%d", RM(ir), RN(ir) ); break; nkeynes@1: case 6: snprintf( buf, len, "FMOV.S [R%d+R0], FR%d", RM(ir), RN(ir) ); break; nkeynes@1: case 7: snprintf( buf, len, "FMOV.S FR%d, [R%d+R0]", RM(ir), RN(ir) ); break; nkeynes@1: case 8: snprintf( buf, len, "FMOV.S [R%d], FR%d", RM(ir), RN(ir) ); break; nkeynes@1: case 9: snprintf( buf, len, "FMOV.S [R%d++], FR%d", RM(ir), RN(ir) ); break; nkeynes@1: case 10:snprintf( buf, len, "FMOV.S FR%d, [R%d]", RM(ir), RN(ir) ); break; nkeynes@1: case 11:snprintf( buf, len, "FMOV.S FR%d, [--R%d]", RM(ir), RN(ir) ); break; nkeynes@1: case 12:snprintf( buf, len, "FMOV FR%d, FR%d", RM(ir), RN(ir) ); break; nkeynes@1: case 13: nkeynes@1: switch( (ir&0x00F0) >> 4 ) { nkeynes@1: case 0: snprintf( buf, len, "FSTS FPUL, FR%d", RN(ir) ); break; nkeynes@1: case 1: snprintf( buf, len, "FLDS FR%d, FPUL", RN(ir) ); break; nkeynes@1: case 2: snprintf( buf, len, "FLOAT FPUL, FR%d", RN(ir) ); break; nkeynes@1: case 3: snprintf( buf, len, "FTRC FR%d, FPUL", RN(ir) ); break; nkeynes@1: case 4: snprintf( buf, len, "FNEG FR%d", RN(ir) ); break; nkeynes@1: case 5: snprintf( buf, len, "FABS FR%d", RN(ir) ); break; nkeynes@1: case 6: snprintf( buf, len, "FSQRT FR%d", RN(ir) ); break; nkeynes@2: case 7: snprintf( buf, len, "FSRRA FR%d", RN(ir) ); break; nkeynes@1: case 8: snprintf( buf, len, "FLDI0 FR%d", RN(ir) ); break; nkeynes@1: case 9: snprintf( buf, len, "FLDI1 FR%d", RN(ir) ); break; nkeynes@1: case 10:snprintf( buf, len, "FCNVSD FPUL, DR%d", RN(ir)>>1 ); break; nkeynes@1: case 11:snprintf( buf, len, "FCNVDS DR%d, FPUL", RN(ir)>>1 ); break; nkeynes@1: case 14:snprintf( buf, len, "FIPR FV%d, FV%d", FVM(ir), FVN(ir) ); break; nkeynes@1: case 15: nkeynes@2: if( (ir & 0x0300) == 0x0100 ) nkeynes@1: snprintf( buf, len, "FTRV XMTRX,FV%d", FVN(ir) ); nkeynes@2: else if( (ir & 0x0100) == 0 ) nkeynes@2: snprintf( buf, len, "FSCA FPUL, DR%d", RN(ir) ); nkeynes@1: else if( ir == 0xFBFD ) nkeynes@1: snprintf( buf, len, "FRCHG " ); nkeynes@1: else if( ir == 0xF3FD ) nkeynes@1: snprintf( buf, len, "FSCHG " ); nkeynes@2: else UNIMP(ir); nkeynes@1: break; nkeynes@1: default: UNIMP(ir); nkeynes@1: } nkeynes@1: break; nkeynes@1: case 14:snprintf( buf, len, "FMAC FR0, FR%d, FR%d", RM(ir), RN(ir) ); break; nkeynes@1: default: UNIMP(ir); nkeynes@1: } nkeynes@1: break; nkeynes@1: } nkeynes@1: return pc+2; nkeynes@1: } nkeynes@1: nkeynes@1: nkeynes@54: void sh4_disasm_region( const gchar *filename, int from, int to ) nkeynes@1: { nkeynes@1: int pc; nkeynes@1: char buf[80]; nkeynes@11: char opcode[16]; nkeynes@54: FILE *f; nkeynes@1: nkeynes@54: f = fopen( filename, "w" ); nkeynes@1: for( pc = from; pc < to; pc+=2 ) { nkeynes@1: buf[0] = '\0'; nkeynes@1: sh4_disasm_instruction( pc, nkeynes@11: buf, sizeof(buf), opcode ); nkeynes@54: fprintf( f, " %08x: %s %s\n", pc, opcode, buf ); nkeynes@1: } nkeynes@54: fclose(f); nkeynes@1: }