nkeynes@31: /** nkeynes@433: * $Id: pvr2.c,v 1.46 2007-10-09 08:48:28 nkeynes Exp $ nkeynes@31: * nkeynes@133: * PVR2 (Video) Core module implementation and MMIO registers. nkeynes@31: * nkeynes@31: * Copyright (c) 2005 Nathan Keynes. nkeynes@31: * nkeynes@31: * This program is free software; you can redistribute it and/or modify nkeynes@31: * it under the terms of the GNU General Public License as published by nkeynes@31: * the Free Software Foundation; either version 2 of the License, or nkeynes@31: * (at your option) any later version. nkeynes@31: * nkeynes@31: * This program is distributed in the hope that it will be useful, nkeynes@31: * but WITHOUT ANY WARRANTY; without even the implied warranty of nkeynes@31: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the nkeynes@31: * GNU General Public License for more details. nkeynes@31: */ nkeynes@35: #define MODULE pvr2_module nkeynes@31: nkeynes@1: #include "dream.h" nkeynes@265: #include "eventq.h" nkeynes@144: #include "display.h" nkeynes@1: #include "mem.h" nkeynes@1: #include "asic.h" nkeynes@261: #include "clock.h" nkeynes@103: #include "pvr2/pvr2.h" nkeynes@56: #include "sh4/sh4core.h" nkeynes@1: #define MMIO_IMPL nkeynes@103: #include "pvr2/pvr2mmio.h" nkeynes@1: nkeynes@1: char *video_base; nkeynes@1: nkeynes@352: #define MAX_RENDER_BUFFERS 4 nkeynes@352: nkeynes@304: #define HPOS_PER_FRAME 0 nkeynes@304: #define HPOS_PER_LINECOUNT 1 nkeynes@304: nkeynes@133: static void pvr2_init( void ); nkeynes@133: static void pvr2_reset( void ); nkeynes@133: static uint32_t pvr2_run_slice( uint32_t ); nkeynes@133: static void pvr2_save_state( FILE *f ); nkeynes@133: static int pvr2_load_state( FILE *f ); nkeynes@265: static void pvr2_update_raster_posn( uint32_t nanosecs ); nkeynes@304: static void pvr2_schedule_scanline_event( int eventid, int line, int minimum_lines, int line_time_ns ); nkeynes@352: static render_buffer_t pvr2_get_render_buffer( frame_buffer_t frame ); nkeynes@352: static render_buffer_t pvr2_next_render_buffer( ); nkeynes@265: uint32_t pvr2_get_sync_status(); nkeynes@133: nkeynes@94: void pvr2_display_frame( void ); nkeynes@94: nkeynes@352: static int output_colour_formats[] = { COLFMT_ARGB1555, COLFMT_RGB565, COLFMT_RGB888, COLFMT_ARGB8888 }; nkeynes@161: nkeynes@133: struct dreamcast_module pvr2_module = { "PVR2", pvr2_init, pvr2_reset, NULL, nkeynes@133: pvr2_run_slice, NULL, nkeynes@133: pvr2_save_state, pvr2_load_state }; nkeynes@133: nkeynes@103: nkeynes@144: display_driver_t display_driver = NULL; nkeynes@15: nkeynes@133: struct pvr2_state { nkeynes@133: uint32_t frame_count; nkeynes@133: uint32_t line_count; nkeynes@133: uint32_t line_remainder; nkeynes@265: uint32_t cycles_run; /* Cycles already executed prior to main time slice */ nkeynes@304: uint32_t irq_hpos_line; nkeynes@304: uint32_t irq_hpos_line_count; nkeynes@304: uint32_t irq_hpos_mode; nkeynes@304: uint32_t irq_hpos_time_ns; /* Time within the line */ nkeynes@133: uint32_t irq_vpos1; nkeynes@133: uint32_t irq_vpos2; nkeynes@261: uint32_t odd_even_field; /* 1 = odd, 0 = even */ nkeynes@337: gboolean palette_changed; /* TRUE if palette has changed since last render */ nkeynes@295: gchar *save_next_render_filename; nkeynes@261: /* timing */ nkeynes@261: uint32_t dot_clock; nkeynes@261: uint32_t total_lines; nkeynes@261: uint32_t line_size; nkeynes@261: uint32_t line_time_ns; nkeynes@261: uint32_t vsync_lines; nkeynes@261: uint32_t hsync_width_ns; nkeynes@261: uint32_t front_porch_ns; nkeynes@261: uint32_t back_porch_ns; nkeynes@265: uint32_t retrace_start_line; nkeynes@265: uint32_t retrace_end_line; nkeynes@261: gboolean interlaced; nkeynes@133: } pvr2_state; nkeynes@15: nkeynes@352: render_buffer_t render_buffers[MAX_RENDER_BUFFERS]; nkeynes@352: int render_buffer_count = 0; nkeynes@133: nkeynes@265: /** nkeynes@304: * Event handler for the hpos callback nkeynes@265: */ nkeynes@304: static void pvr2_hpos_callback( int eventid ) { nkeynes@265: asic_event( eventid ); nkeynes@265: pvr2_update_raster_posn(sh4r.slice_cycle); nkeynes@304: if( pvr2_state.irq_hpos_mode == HPOS_PER_LINECOUNT ) { nkeynes@304: pvr2_state.irq_hpos_line += pvr2_state.irq_hpos_line_count; nkeynes@304: while( pvr2_state.irq_hpos_line > (pvr2_state.total_lines>>1) ) { nkeynes@304: pvr2_state.irq_hpos_line -= (pvr2_state.total_lines>>1); nkeynes@304: } nkeynes@304: } nkeynes@304: pvr2_schedule_scanline_event( eventid, pvr2_state.irq_hpos_line, 1, nkeynes@304: pvr2_state.irq_hpos_time_ns ); nkeynes@265: } nkeynes@265: nkeynes@265: /** nkeynes@265: * Event handler for the scanline callbacks. Fires the corresponding nkeynes@265: * ASIC event, and resets the timer for the next field. nkeynes@265: */ nkeynes@265: static void pvr2_scanline_callback( int eventid ) { nkeynes@265: asic_event( eventid ); nkeynes@265: pvr2_update_raster_posn(sh4r.slice_cycle); nkeynes@265: if( eventid == EVENT_SCANLINE1 ) { nkeynes@304: pvr2_schedule_scanline_event( eventid, pvr2_state.irq_vpos1, 1, 0 ); nkeynes@265: } else { nkeynes@304: pvr2_schedule_scanline_event( eventid, pvr2_state.irq_vpos2, 1, 0 ); nkeynes@265: } nkeynes@265: } nkeynes@265: nkeynes@133: static void pvr2_init( void ) nkeynes@1: { nkeynes@352: int i; nkeynes@1: register_io_region( &mmio_region_PVR2 ); nkeynes@85: register_io_region( &mmio_region_PVR2PAL ); nkeynes@56: register_io_region( &mmio_region_PVR2TA ); nkeynes@304: register_event_callback( EVENT_HPOS, pvr2_hpos_callback ); nkeynes@265: register_event_callback( EVENT_SCANLINE1, pvr2_scanline_callback ); nkeynes@265: register_event_callback( EVENT_SCANLINE2, pvr2_scanline_callback ); nkeynes@1: video_base = mem_get_region_by_name( MEM_REGION_VIDEO ); nkeynes@133: texcache_init(); nkeynes@133: pvr2_reset(); nkeynes@214: pvr2_ta_reset(); nkeynes@295: pvr2_state.save_next_render_filename = NULL; nkeynes@352: for( i=0; i= pvr2_state.line_time_ns ) { nkeynes@265: pvr2_state.line_count ++; nkeynes@265: pvr2_state.line_remainder -= pvr2_state.line_time_ns; nkeynes@265: } nkeynes@265: nkeynes@265: if( pvr2_state.line_count >= pvr2_state.total_lines ) { nkeynes@265: pvr2_state.line_count -= pvr2_state.total_lines; nkeynes@265: if( pvr2_state.interlaced ) { nkeynes@265: pvr2_state.odd_even_field = !pvr2_state.odd_even_field; nkeynes@265: } nkeynes@265: } nkeynes@265: if( pvr2_state.line_count >= pvr2_state.retrace_end_line && nkeynes@265: (old_line_count < pvr2_state.retrace_end_line || nkeynes@265: old_line_count > pvr2_state.line_count) ) { nkeynes@337: pvr2_state.frame_count++; nkeynes@265: pvr2_display_frame(); nkeynes@265: } nkeynes@265: } nkeynes@265: nkeynes@133: static uint32_t pvr2_run_slice( uint32_t nanosecs ) nkeynes@133: { nkeynes@265: pvr2_update_raster_posn( nanosecs ); nkeynes@265: pvr2_state.cycles_run = 0; nkeynes@133: return nanosecs; nkeynes@133: } nkeynes@133: nkeynes@133: int pvr2_get_frame_count() nkeynes@133: { nkeynes@133: return pvr2_state.frame_count; nkeynes@106: } nkeynes@106: nkeynes@295: gboolean pvr2_save_next_scene( const gchar *filename ) nkeynes@295: { nkeynes@295: if( pvr2_state.save_next_render_filename != NULL ) { nkeynes@295: g_free( pvr2_state.save_next_render_filename ); nkeynes@295: } nkeynes@295: pvr2_state.save_next_render_filename = g_strdup(filename); nkeynes@295: return TRUE; nkeynes@295: } nkeynes@295: nkeynes@295: nkeynes@295: nkeynes@103: /** nkeynes@1: * Display the next frame, copying the current contents of video ram to nkeynes@1: * the window. If the video configuration has changed, first recompute the nkeynes@1: * new frame size/depth. nkeynes@1: */ nkeynes@94: void pvr2_display_frame( void ) nkeynes@1: { nkeynes@197: int dispmode = MMIO_READ( PVR2, DISP_MODE ); nkeynes@261: int vidcfg = MMIO_READ( PVR2, DISP_SYNCCFG ); nkeynes@335: gboolean bEnabled = (dispmode & DISPMODE_ENABLE) && (vidcfg & DISPCFG_VO ) ? TRUE : FALSE; nkeynes@352: nkeynes@352: if( display_driver == NULL ) { nkeynes@352: return; /* can't really do anything much */ nkeynes@352: } else if( !bEnabled ) { nkeynes@352: /* Output disabled == black */ nkeynes@352: display_driver->display_blank( 0 ); nkeynes@352: } else if( MMIO_READ( PVR2, DISP_CFG2 ) & 0x08 ) { nkeynes@352: /* Enabled but blanked - border colour */ nkeynes@352: uint32_t colour = MMIO_READ( PVR2, DISP_BORDER ); nkeynes@352: display_driver->display_blank( colour ); nkeynes@352: } else { nkeynes@352: /* Real output - determine dimensions etc */ nkeynes@352: struct frame_buffer fbuf; nkeynes@352: uint32_t dispsize = MMIO_READ( PVR2, DISP_SIZE ); nkeynes@352: int vid_stride = (((dispsize & DISPSIZE_MODULO) >> 20) - 1); nkeynes@352: int vid_ppl = ((dispsize & DISPSIZE_PPL)) + 1; nkeynes@352: nkeynes@352: fbuf.colour_format = output_colour_formats[(dispmode & DISPMODE_COLFMT) >> 2]; nkeynes@352: fbuf.width = vid_ppl << 2 / colour_formats[fbuf.colour_format].bpp; nkeynes@352: fbuf.height = ((dispsize & DISPSIZE_LPF) >> 10) + 1; nkeynes@352: fbuf.size = vid_ppl << 2 * fbuf.height; nkeynes@352: fbuf.rowstride = (vid_ppl + vid_stride) << 2; nkeynes@352: nkeynes@352: /* Determine the field to display, and deinterlace if possible */ nkeynes@352: if( pvr2_state.interlaced ) { nkeynes@352: if( vid_ppl == vid_stride ) { /* Magic deinterlace */ nkeynes@352: fbuf.height = fbuf.height << 1; nkeynes@352: fbuf.rowstride = vid_ppl << 2; nkeynes@352: fbuf.address = MMIO_READ( PVR2, DISP_ADDR1 ); nkeynes@352: } else { nkeynes@352: /* Just display the field as is, folks. This is slightly tricky - nkeynes@352: * we pick the field based on which frame is about to come through, nkeynes@352: * which may not be the same as the odd_even_field. nkeynes@352: */ nkeynes@352: gboolean oddfield = pvr2_state.odd_even_field; nkeynes@352: if( pvr2_state.line_count >= pvr2_state.retrace_start_line ) { nkeynes@352: oddfield = !oddfield; nkeynes@352: } nkeynes@352: if( oddfield ) { nkeynes@352: fbuf.address = MMIO_READ( PVR2, DISP_ADDR1 ); nkeynes@352: } else { nkeynes@352: fbuf.address = MMIO_READ( PVR2, DISP_ADDR2 ); nkeynes@352: } nkeynes@337: } nkeynes@352: } else { nkeynes@352: fbuf.address = MMIO_READ( PVR2, DISP_ADDR1 ); nkeynes@335: } nkeynes@352: fbuf.address = (fbuf.address & 0x00FFFFFF) + PVR2_RAM_BASE; nkeynes@352: nkeynes@352: render_buffer_t rbuf = pvr2_get_render_buffer( &fbuf ); nkeynes@352: if( rbuf != NULL ) { nkeynes@352: display_driver->display_render_buffer( rbuf ); nkeynes@352: } else { nkeynes@352: fbuf.data = video_base + (fbuf.address&0x00FFFFFF); nkeynes@352: display_driver->display_frame_buffer( &fbuf ); nkeynes@65: } nkeynes@1: } nkeynes@1: } nkeynes@1: nkeynes@197: /** nkeynes@197: * This has to handle every single register individually as they all get masked nkeynes@197: * off differently (and its easier to do it at write time) nkeynes@197: */ nkeynes@1: void mmio_region_PVR2_write( uint32_t reg, uint32_t val ) nkeynes@1: { nkeynes@1: if( reg >= 0x200 && reg < 0x600 ) { /* Fog table */ nkeynes@1: MMIO_WRITE( PVR2, reg, val ); nkeynes@1: return; nkeynes@1: } nkeynes@1: nkeynes@1: switch(reg) { nkeynes@189: case PVRID: nkeynes@189: case PVRVER: nkeynes@261: case GUNPOS: /* Read only registers */ nkeynes@189: break; nkeynes@197: case PVRRESET: nkeynes@197: val &= 0x00000007; /* Do stuff? */ nkeynes@197: MMIO_WRITE( PVR2, reg, val ); nkeynes@197: break; nkeynes@295: case RENDER_START: /* Don't really care what value */ nkeynes@295: if( pvr2_state.save_next_render_filename != NULL ) { nkeynes@295: if( pvr2_render_save_scene(pvr2_state.save_next_render_filename) == 0 ) { nkeynes@295: INFO( "Saved scene to %s", pvr2_state.save_next_render_filename); nkeynes@295: } nkeynes@295: g_free( pvr2_state.save_next_render_filename ); nkeynes@295: pvr2_state.save_next_render_filename = NULL; nkeynes@295: } nkeynes@352: render_buffer_t buffer = pvr2_next_render_buffer(); nkeynes@373: if( buffer != NULL ) { nkeynes@373: pvr2_render_scene( buffer ); nkeynes@373: } nkeynes@352: asic_event( EVENT_PVR_RENDER_DONE ); nkeynes@189: break; nkeynes@191: case RENDER_POLYBASE: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x00F00000 ); nkeynes@191: break; nkeynes@191: case RENDER_TSPCFG: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x00010101 ); nkeynes@191: break; nkeynes@197: case DISP_BORDER: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x01FFFFFF ); nkeynes@191: break; nkeynes@197: case DISP_MODE: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x00FFFF7F ); nkeynes@191: break; nkeynes@191: case RENDER_MODE: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x00FFFF0F ); nkeynes@191: break; nkeynes@191: case RENDER_SIZE: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x000001FF ); nkeynes@191: break; nkeynes@197: case DISP_ADDR1: nkeynes@189: val &= 0x00FFFFFC; nkeynes@189: MMIO_WRITE( PVR2, reg, val ); nkeynes@265: pvr2_update_raster_posn(sh4r.slice_cycle); nkeynes@108: break; nkeynes@197: case DISP_ADDR2: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x00FFFFFC ); nkeynes@337: pvr2_update_raster_posn(sh4r.slice_cycle); nkeynes@191: break; nkeynes@197: case DISP_SIZE: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x3FFFFFFF ); nkeynes@191: break; nkeynes@191: case RENDER_ADDR1: nkeynes@191: case RENDER_ADDR2: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x01FFFFFC ); nkeynes@191: break; nkeynes@191: case RENDER_HCLIP: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x07FF07FF ); nkeynes@189: break; nkeynes@191: case RENDER_VCLIP: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x03FF03FF ); nkeynes@189: break; nkeynes@197: case DISP_HPOSIRQ: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x03FF33FF ); nkeynes@304: pvr2_state.irq_hpos_line = val & 0x03FF; nkeynes@304: pvr2_state.irq_hpos_time_ns = 2000000*((val>>16)&0x03FF)/pvr2_state.dot_clock; nkeynes@304: pvr2_state.irq_hpos_mode = (val >> 12) & 0x03; nkeynes@304: switch( pvr2_state.irq_hpos_mode ) { nkeynes@304: case 3: /* Reserved - treat as 0 */ nkeynes@304: case 0: /* Once per frame at specified line */ nkeynes@304: pvr2_state.irq_hpos_mode = HPOS_PER_FRAME; nkeynes@304: break; nkeynes@304: case 2: /* Once per line - as per-line-count */ nkeynes@304: pvr2_state.irq_hpos_line = 1; nkeynes@304: pvr2_state.irq_hpos_mode = 1; nkeynes@304: case 1: /* Once per N lines */ nkeynes@304: pvr2_state.irq_hpos_line_count = pvr2_state.irq_hpos_line; nkeynes@304: pvr2_state.irq_hpos_line = (pvr2_state.line_count >> 1) + nkeynes@304: pvr2_state.irq_hpos_line_count; nkeynes@304: while( pvr2_state.irq_hpos_line > (pvr2_state.total_lines>>1) ) { nkeynes@304: pvr2_state.irq_hpos_line -= (pvr2_state.total_lines>>1); nkeynes@304: } nkeynes@304: pvr2_state.irq_hpos_mode = HPOS_PER_LINECOUNT; nkeynes@304: } nkeynes@304: pvr2_schedule_scanline_event( EVENT_HPOS, pvr2_state.irq_hpos_line, 0, nkeynes@304: pvr2_state.irq_hpos_time_ns ); nkeynes@189: break; nkeynes@197: case DISP_VPOSIRQ: nkeynes@189: val = val & 0x03FF03FF; nkeynes@189: pvr2_state.irq_vpos1 = (val >> 16); nkeynes@133: pvr2_state.irq_vpos2 = val & 0x03FF; nkeynes@265: pvr2_update_raster_posn(sh4r.slice_cycle); nkeynes@304: pvr2_schedule_scanline_event( EVENT_SCANLINE1, pvr2_state.irq_vpos1, 0, 0 ); nkeynes@304: pvr2_schedule_scanline_event( EVENT_SCANLINE2, pvr2_state.irq_vpos2, 0, 0 ); nkeynes@189: MMIO_WRITE( PVR2, reg, val ); nkeynes@103: break; nkeynes@197: case RENDER_NEARCLIP: nkeynes@197: MMIO_WRITE( PVR2, reg, val & 0x7FFFFFFF ); nkeynes@197: break; nkeynes@191: case RENDER_SHADOW: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x000001FF ); nkeynes@191: break; nkeynes@191: case RENDER_OBJCFG: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x003FFFFF ); nkeynes@191: break; nkeynes@191: case RENDER_TSPCLIP: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x7FFFFFFF ); nkeynes@191: break; nkeynes@197: case RENDER_FARCLIP: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0xFFFFFFF0 ); nkeynes@197: break; nkeynes@191: case RENDER_BGPLANE: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x1FFFFFFF ); nkeynes@191: break; nkeynes@191: case RENDER_ISPCFG: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x00FFFFF9 ); nkeynes@191: break; nkeynes@197: case VRAM_CFG1: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x000000FF ); nkeynes@197: break; nkeynes@197: case VRAM_CFG2: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x003FFFFF ); nkeynes@197: break; nkeynes@197: case VRAM_CFG3: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x1FFFFFFF ); nkeynes@197: break; nkeynes@197: case RENDER_FOGTBLCOL: nkeynes@197: case RENDER_FOGVRTCOL: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x00FFFFFF ); nkeynes@197: break; nkeynes@197: case RENDER_FOGCOEFF: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x0000FFFF ); nkeynes@197: break; nkeynes@197: case RENDER_CLAMPHI: nkeynes@197: case RENDER_CLAMPLO: nkeynes@197: MMIO_WRITE( PVR2, reg, val ); nkeynes@197: break; nkeynes@261: case RENDER_TEXSIZE: nkeynes@261: MMIO_WRITE( PVR2, reg, val&0x00031F1F ); nkeynes@197: break; nkeynes@261: case RENDER_PALETTE: nkeynes@261: MMIO_WRITE( PVR2, reg, val&0x00000003 ); nkeynes@261: break; nkeynes@261: nkeynes@261: /********** CRTC registers *************/ nkeynes@197: case DISP_HBORDER: nkeynes@197: case DISP_VBORDER: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x03FF03FF ); nkeynes@197: break; nkeynes@261: case DISP_TOTAL: nkeynes@261: val = val & 0x03FF03FF; nkeynes@261: MMIO_WRITE( PVR2, reg, val ); nkeynes@265: pvr2_update_raster_posn(sh4r.slice_cycle); nkeynes@261: pvr2_state.total_lines = (val >> 16) + 1; nkeynes@261: pvr2_state.line_size = (val & 0x03FF) + 1; nkeynes@261: pvr2_state.line_time_ns = 1000000 * pvr2_state.line_size / pvr2_state.dot_clock; nkeynes@265: pvr2_state.retrace_end_line = 0x2A; nkeynes@265: pvr2_state.retrace_start_line = pvr2_state.total_lines - 6; nkeynes@304: pvr2_schedule_scanline_event( EVENT_SCANLINE1, pvr2_state.irq_vpos1, 0, 0 ); nkeynes@304: pvr2_schedule_scanline_event( EVENT_SCANLINE2, pvr2_state.irq_vpos2, 0, 0 ); nkeynes@304: pvr2_schedule_scanline_event( EVENT_HPOS, pvr2_state.irq_hpos_line, 0, nkeynes@304: pvr2_state.irq_hpos_time_ns ); nkeynes@261: break; nkeynes@261: case DISP_SYNCCFG: nkeynes@261: MMIO_WRITE( PVR2, reg, val&0x000003FF ); nkeynes@261: pvr2_state.interlaced = (val & 0x0010) ? TRUE : FALSE; nkeynes@261: break; nkeynes@261: case DISP_SYNCTIME: nkeynes@261: pvr2_state.vsync_lines = (val >> 8) & 0x0F; nkeynes@269: pvr2_state.hsync_width_ns = ((val & 0x7F) + 1) * 2000000 / pvr2_state.dot_clock; nkeynes@197: MMIO_WRITE( PVR2, reg, val&0xFFFFFF7F ); nkeynes@197: break; nkeynes@197: case DISP_CFG2: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x003F01FF ); nkeynes@197: break; nkeynes@197: case DISP_HPOS: nkeynes@261: val = val & 0x03FF; nkeynes@261: pvr2_state.front_porch_ns = (val + 1) * 1000000 / pvr2_state.dot_clock; nkeynes@261: MMIO_WRITE( PVR2, reg, val ); nkeynes@197: break; nkeynes@197: case DISP_VPOS: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x03FF03FF ); nkeynes@197: break; nkeynes@261: nkeynes@261: /*********** Tile accelerator registers ***********/ nkeynes@261: case TA_POLYPOS: nkeynes@261: case TA_LISTPOS: nkeynes@261: /* Readonly registers */ nkeynes@197: break; nkeynes@189: case TA_TILEBASE: nkeynes@193: case TA_LISTEND: nkeynes@189: case TA_LISTBASE: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x00FFFFE0 ); nkeynes@189: break; nkeynes@191: case RENDER_TILEBASE: nkeynes@189: case TA_POLYBASE: nkeynes@189: case TA_POLYEND: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x00FFFFFC ); nkeynes@189: break; nkeynes@189: case TA_TILESIZE: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x000F003F ); nkeynes@189: break; nkeynes@189: case TA_TILECFG: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x00133333 ); nkeynes@189: break; nkeynes@261: case TA_INIT: nkeynes@261: if( val & 0x80000000 ) nkeynes@261: pvr2_ta_init(); nkeynes@261: break; nkeynes@261: case TA_REINIT: nkeynes@261: break; nkeynes@261: /**************** Scaler registers? ****************/ nkeynes@335: case RENDER_SCALER: nkeynes@261: MMIO_WRITE( PVR2, reg, val&0x0007FFFF ); nkeynes@261: break; nkeynes@261: nkeynes@197: case YUV_ADDR: nkeynes@284: val = val & 0x00FFFFF8; nkeynes@284: MMIO_WRITE( PVR2, reg, val ); nkeynes@284: pvr2_yuv_init( val ); nkeynes@197: break; nkeynes@197: case YUV_CFG: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x01013F3F ); nkeynes@284: pvr2_yuv_set_config(val); nkeynes@197: break; nkeynes@261: nkeynes@261: /**************** Unknowns ***************/ nkeynes@261: case PVRUNK1: nkeynes@261: MMIO_WRITE( PVR2, reg, val&0x000007FF ); nkeynes@261: break; nkeynes@261: case PVRUNK2: nkeynes@261: MMIO_WRITE( PVR2, reg, val&0x00000007 ); nkeynes@100: break; nkeynes@261: case PVRUNK3: nkeynes@261: MMIO_WRITE( PVR2, reg, val&0x000FFF3F ); nkeynes@261: break; nkeynes@261: case PVRUNK5: nkeynes@261: MMIO_WRITE( PVR2, reg, val&0x0000FFFF ); nkeynes@261: break; nkeynes@261: case PVRUNK6: nkeynes@261: MMIO_WRITE( PVR2, reg, val&0x000000FF ); nkeynes@197: break; nkeynes@197: case PVRUNK7: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x00000001 ); nkeynes@197: break; nkeynes@1: } nkeynes@1: } nkeynes@1: nkeynes@261: /** nkeynes@261: * Calculate the current read value of the syncstat register, using nkeynes@261: * the current SH4 clock time as an offset from the last timeslice. nkeynes@261: * The register reads (LSB to MSB) as: nkeynes@261: * 0..9 Current scan line nkeynes@261: * 10 Odd/even field (1 = odd, 0 = even) nkeynes@261: * 11 Display active (including border and overscan) nkeynes@261: * 12 Horizontal sync off nkeynes@261: * 13 Vertical sync off nkeynes@261: * Note this method is probably incorrect for anything other than straight nkeynes@265: * interlaced PAL/NTSC, and needs further testing. nkeynes@261: */ nkeynes@261: uint32_t pvr2_get_sync_status() nkeynes@261: { nkeynes@265: pvr2_update_raster_posn(sh4r.slice_cycle); nkeynes@265: uint32_t result = pvr2_state.line_count; nkeynes@261: nkeynes@265: if( pvr2_state.odd_even_field ) { nkeynes@261: result |= 0x0400; nkeynes@261: } nkeynes@265: if( (pvr2_state.line_count & 0x01) == pvr2_state.odd_even_field ) { nkeynes@265: if( pvr2_state.line_remainder > pvr2_state.hsync_width_ns ) { nkeynes@261: result |= 0x1000; /* !HSYNC */ nkeynes@261: } nkeynes@265: if( pvr2_state.line_count >= pvr2_state.vsync_lines ) { nkeynes@265: if( pvr2_state.line_remainder > pvr2_state.front_porch_ns ) { nkeynes@261: result |= 0x2800; /* Display active */ nkeynes@261: } else { nkeynes@261: result |= 0x2000; /* Front porch */ nkeynes@261: } nkeynes@261: } nkeynes@261: } else { nkeynes@269: if( pvr2_state.line_count >= pvr2_state.vsync_lines ) { nkeynes@269: if( pvr2_state.line_remainder < (pvr2_state.line_time_ns - pvr2_state.back_porch_ns)) { nkeynes@269: result |= 0x3800; /* Display active */ nkeynes@269: } else { nkeynes@269: result |= 0x3000; nkeynes@269: } nkeynes@261: } else { nkeynes@261: result |= 0x1000; /* Back porch */ nkeynes@261: } nkeynes@261: } nkeynes@261: return result; nkeynes@261: } nkeynes@261: nkeynes@265: /** nkeynes@265: * Schedule a "scanline" event. This actually goes off at nkeynes@265: * 2 * line in even fields and 2 * line + 1 in odd fields. nkeynes@265: * Otherwise this behaves as per pvr2_schedule_line_event(). nkeynes@265: * The raster position should be updated before calling this nkeynes@265: * method. nkeynes@304: * @param eventid Event to fire at the specified time nkeynes@304: * @param line Line on which to fire the event (this is 2n/2n+1 for interlaced nkeynes@304: * displays). nkeynes@304: * @param hpos_ns Nanoseconds into the line at which to fire. nkeynes@265: */ nkeynes@304: static void pvr2_schedule_scanline_event( int eventid, int line, int minimum_lines, int hpos_ns ) nkeynes@265: { nkeynes@265: uint32_t field = pvr2_state.odd_even_field; nkeynes@265: if( line <= pvr2_state.line_count && pvr2_state.interlaced ) { nkeynes@265: field = !field; nkeynes@265: } nkeynes@304: if( hpos_ns > pvr2_state.line_time_ns ) { nkeynes@304: hpos_ns = pvr2_state.line_time_ns; nkeynes@304: } nkeynes@265: nkeynes@265: line <<= 1; nkeynes@265: if( field ) { nkeynes@265: line += 1; nkeynes@265: } nkeynes@274: nkeynes@274: if( line < pvr2_state.total_lines ) { nkeynes@274: uint32_t lines; nkeynes@274: uint32_t time; nkeynes@274: if( line <= pvr2_state.line_count ) { nkeynes@274: lines = (pvr2_state.total_lines - pvr2_state.line_count + line); nkeynes@274: } else { nkeynes@274: lines = (line - pvr2_state.line_count); nkeynes@274: } nkeynes@274: if( lines <= minimum_lines ) { nkeynes@274: lines += pvr2_state.total_lines; nkeynes@274: } nkeynes@304: time = (lines * pvr2_state.line_time_ns) - pvr2_state.line_remainder + hpos_ns; nkeynes@274: event_schedule( eventid, time ); nkeynes@274: } else { nkeynes@274: event_cancel( eventid ); nkeynes@274: } nkeynes@265: } nkeynes@265: nkeynes@1: MMIO_REGION_READ_FN( PVR2, reg ) nkeynes@1: { nkeynes@1: switch( reg ) { nkeynes@261: case DISP_SYNCSTAT: nkeynes@261: return pvr2_get_sync_status(); nkeynes@1: default: nkeynes@1: return MMIO_READ( PVR2, reg ); nkeynes@1: } nkeynes@1: } nkeynes@19: nkeynes@337: MMIO_REGION_WRITE_FN( PVR2PAL, reg, val ) nkeynes@337: { nkeynes@337: MMIO_WRITE( PVR2PAL, reg, val ); nkeynes@337: pvr2_state.palette_changed = TRUE; nkeynes@337: } nkeynes@337: nkeynes@337: void pvr2_check_palette_changed() nkeynes@337: { nkeynes@337: if( pvr2_state.palette_changed ) { nkeynes@337: texcache_invalidate_palette(); nkeynes@337: pvr2_state.palette_changed = FALSE; nkeynes@337: } nkeynes@337: } nkeynes@337: nkeynes@337: MMIO_REGION_READ_DEFFN( PVR2PAL ); nkeynes@85: nkeynes@19: void pvr2_set_base_address( uint32_t base ) nkeynes@19: { nkeynes@197: mmio_region_PVR2_write( DISP_ADDR1, base ); nkeynes@19: } nkeynes@56: nkeynes@56: nkeynes@65: nkeynes@98: nkeynes@56: int32_t mmio_region_PVR2TA_read( uint32_t reg ) nkeynes@56: { nkeynes@56: return 0xFFFFFFFF; nkeynes@56: } nkeynes@56: nkeynes@56: void mmio_region_PVR2TA_write( uint32_t reg, uint32_t val ) nkeynes@56: { nkeynes@433: pvr2_ta_write( (unsigned char *)&val, sizeof(uint32_t) ); nkeynes@56: } nkeynes@56: nkeynes@352: /** nkeynes@352: * Find the render buffer corresponding to the requested output frame nkeynes@352: * (does not consider texture renders). nkeynes@352: * @return the render_buffer if found, or null if no such buffer. nkeynes@352: * nkeynes@352: * Note: Currently does not consider "partial matches", ie partial nkeynes@352: * frame overlap - it probably needs to do this. nkeynes@352: */ nkeynes@352: render_buffer_t pvr2_get_render_buffer( frame_buffer_t frame ) nkeynes@352: { nkeynes@352: int i; nkeynes@352: for( i=0; iaddress == frame->address ) { nkeynes@352: return render_buffers[i]; nkeynes@352: } nkeynes@352: } nkeynes@352: return NULL; nkeynes@352: } nkeynes@352: nkeynes@352: /** nkeynes@352: * Determine the next render buffer to write into. The order of preference is: nkeynes@352: * 1. An existing buffer with the same address. (not flushed unless the new nkeynes@352: * size is smaller than the old one). nkeynes@352: * 2. An existing buffer with the same size chosen by LRU order. Old buffer nkeynes@352: * is flushed to vram. nkeynes@352: * 3. A new buffer if one can be created. nkeynes@352: * 4. The current display buff nkeynes@352: * Note: The current display field(s) will never be overwritten except as a last nkeynes@352: * resort. nkeynes@352: */ nkeynes@352: render_buffer_t pvr2_next_render_buffer() nkeynes@352: { nkeynes@352: render_buffer_t result = NULL; nkeynes@352: uint32_t render_addr = MMIO_READ( PVR2, RENDER_ADDR1 ); nkeynes@352: uint32_t render_mode = MMIO_READ( PVR2, RENDER_MODE ); nkeynes@352: uint32_t render_scale = MMIO_READ( PVR2, RENDER_SCALER ); nkeynes@352: uint32_t render_stride = MMIO_READ( PVR2, RENDER_SIZE ) << 3; nkeynes@433: nkeynes@352: if( render_addr & 0x01000000 ) { /* vram64 */ nkeynes@352: render_addr = (render_addr & 0x00FFFFFF) + PVR2_RAM_BASE_INT; nkeynes@352: } else { /* vram32 */ nkeynes@352: render_addr = (render_addr & 0x00FFFFFF) + PVR2_RAM_BASE; nkeynes@352: } nkeynes@352: nkeynes@352: int width, height, i; nkeynes@352: int colour_format = pvr2_render_colour_format[render_mode&0x07]; nkeynes@352: pvr2_render_getsize( &width, &height ); nkeynes@352: nkeynes@352: /* Check existing buffers for an available buffer */ nkeynes@352: for( i=0; iwidth == width && render_buffers[i]->height == height ) { nkeynes@352: /* needs to be the right dimensions */ nkeynes@352: if( render_buffers[i]->address == render_addr ) { nkeynes@352: /* perfect */ nkeynes@352: result = render_buffers[i]; nkeynes@352: break; nkeynes@352: } else if( render_buffers[i]->address == -1 && result == NULL ) { nkeynes@352: result = render_buffers[i]; nkeynes@352: } nkeynes@352: } else if( render_buffers[i]->address == render_addr ) { nkeynes@352: /* right address, wrong size - if it's larger, flush it, otherwise nkeynes@352: * nuke it quietly */ nkeynes@352: if( render_buffers[i]->width * render_buffers[i]->height > nkeynes@352: width*height ) { nkeynes@352: pvr2_render_buffer_copy_to_sh4( render_buffers[i] ); nkeynes@352: } nkeynes@433: render_buffers[i]->address = -1; nkeynes@352: } nkeynes@352: } nkeynes@352: nkeynes@352: /* Nothing available - make one */ nkeynes@352: if( result == NULL ) { nkeynes@352: if( render_buffer_count == MAX_RENDER_BUFFERS ) { nkeynes@352: /* maximum buffers reached - need to throw one away */ nkeynes@352: uint32_t field1_addr = MMIO_READ( PVR2, DISP_ADDR1 ); nkeynes@352: uint32_t field2_addr = MMIO_READ( PVR2, DISP_ADDR2 ); nkeynes@352: for( i=0; iaddress != field1_addr && nkeynes@352: render_buffers[i]->address != field2_addr ) { nkeynes@352: /* Never throw away the current "front buffer(s)" */ nkeynes@352: result = render_buffers[i]; nkeynes@352: pvr2_render_buffer_copy_to_sh4( result ); nkeynes@352: if( result->width != width || result->height != height ) { nkeynes@352: display_driver->destroy_render_buffer(render_buffers[i]); nkeynes@352: result = display_driver->create_render_buffer(width,height); nkeynes@352: render_buffers[i] = result; nkeynes@352: } nkeynes@352: break; nkeynes@352: } nkeynes@352: } nkeynes@352: } else { nkeynes@352: result = display_driver->create_render_buffer(width,height); nkeynes@352: if( result != NULL ) { nkeynes@352: render_buffers[render_buffer_count++] = result; nkeynes@352: } else { nkeynes@373: // ERROR( "Failed to obtain a render buffer!" ); nkeynes@352: return NULL; nkeynes@352: } nkeynes@352: } nkeynes@352: } nkeynes@352: nkeynes@352: /* Setup the buffer */ nkeynes@352: result->rowstride = render_stride; nkeynes@352: result->colour_format = colour_format; nkeynes@352: result->scale = render_scale; nkeynes@352: result->size = width * height * colour_formats[colour_format].bpp; nkeynes@352: result->address = render_addr; nkeynes@352: result->flushed = FALSE; nkeynes@352: return result; nkeynes@352: } nkeynes@352: nkeynes@352: /** nkeynes@352: * Invalidate any caching on the supplied address. Specifically, if it falls nkeynes@352: * within any of the render buffers, flush the buffer back to PVR2 ram. nkeynes@352: */ nkeynes@352: gboolean pvr2_render_buffer_invalidate( sh4addr_t address, gboolean isWrite ) nkeynes@352: { nkeynes@352: int i; nkeynes@352: address = address & 0x1FFFFFFF; nkeynes@352: for( i=0; iaddress; nkeynes@352: if( bufaddr != -1 && bufaddr <= address && nkeynes@352: (bufaddr + render_buffers[i]->size) > address ) { nkeynes@352: if( !render_buffers[i]->flushed ) { nkeynes@352: pvr2_render_buffer_copy_to_sh4( render_buffers[i] ); nkeynes@352: render_buffers[i]->flushed = TRUE; nkeynes@352: } nkeynes@352: if( isWrite ) { nkeynes@352: render_buffers[i]->address = -1; /* Invalid */ nkeynes@352: } nkeynes@352: return TRUE; /* should never have overlapping buffers */ nkeynes@352: } nkeynes@352: } nkeynes@352: return FALSE; nkeynes@352: }