nkeynes@1: #include <stdint.h>
nkeynes@1: 
nkeynes@1: #define PORT_R 1
nkeynes@1: #define PORT_W 2
nkeynes@1: #define PORT_MEM 4 /* store written value */
nkeynes@1: #define PORT_RW 3
nkeynes@1: #define PORT_MRW 7
nkeynes@1: #define UNDEFINED 0
nkeynes@1: 
nkeynes@1: struct mmio_region {
nkeynes@1:     char *id, *desc;
nkeynes@1:     uint32_t base;
nkeynes@1:     char *mem;
nkeynes@1:     struct mmio_port {
nkeynes@1:         char *id, *desc;
nkeynes@1:         int width;
nkeynes@1:         uint32_t offset;
nkeynes@1:         uint32_t default;
nkeynes@1:         int flags;
nkeynes@1:     } *ports;
nkeynes@1: };
nkeynes@1: 
nkeynes@1: #define _MACROIZE #define
nkeynes@1: 
nkeynes@1: #define MMIO_REGION_BEGIN(b,id,d) struct mmio_region mmio_region_##id = { #id, d, b, NULL, 
nkeynes@1: #define LONG_PORT( o,id,f,def,d ) { #id, desc, 32, o, def, f }, \
nkeynes@1: _MACROIZE port_##id o \
nkeynes@1: _MACROIZE reg_##id  (*(uint32_t *)(mmio_region_##id.mem + o))
nkeynes@1: #define WORD_PORT( o,id,f,def,d ) { #id, desc, 16, o, def, f },
nkeynes@1: #define BYTE_PORT( o,id,f,def,d ) { #id, desc, 8, o, def, f },
nkeynes@1: #define MMIO_REGION_END {NULL, NULL, 0, 0, 0} };
nkeynes@1: 
nkeynes@1: MMIO_REGION_BEGIN( 0xFF000000, MMU, "MMU Registers" )
nkeynes@1:     LONG_PORT( 0x000, PTEH, PORT_MRW, UNDEFINED, "Page table entry high" ),
nkeynes@1:     LONG_PORT( 0x004, PTEL, PORT_MRW, UNDEFINED, "Page table entry low" ),
nkeynes@1: MMIO_REGION_END
nkeynes@1: 
nkeynes@1: MMIO_REGION_BEGIN( BSC, 0xFF800000, "I/O Port Registers" )
nkeynes@1:     LONG_PORT( 0x000, BCR1, PORT_MRW, 0, "" ),
nkeynes@1:     WORD_PORT( 0x004, BCR2, PORT_MRW, 0x3FFC, "" ),
nkeynes@1:     LONG_PORT( 0x008, WCR1, PORT_MRW, 0x77777777, "" ),
nkeynes@1:     LONG_PORT( 0x00C, WCR2, PORT_MRW, 0xFFFEEFFF, "" ),
nkeynes@1:     LONG_PORT( 0x010, WCR3, PORT_MRW, 0x07777777, "" ),
nkeynes@1:     LONG_PORT( 0x02C, PCTRA, PORT_MRW, 0, "Port control register A" ),
nkeynes@1:     WORD_PORT( 0x030, PDTRA, PORT_RW, UNDEFINED, "Port data register A" ),
nkeynes@1:     LONG_PORT( 0x040, PCTRB, PORT_MRW, 0, "Port control register B" ),
nkeynes@1:     WORD_PORT( 0x044, PCTRB, PORT_RW, UNDEFINED, "Port data register B" ),
nkeynes@1:     WORD_PORT( 0x048, GPIOIC, PORT_MRW, 0, "GPIO interrupt control register" )
nkeynes@1: MMIO_REGION_END
nkeynes@1: 
nkeynes@1: MMIO_REGION_BEGIN( SCI, 0xFFE00000, "Serial Controller Registers" )
nkeynes@1:     
nkeynes@1: MMIO_REGION_END
nkeynes@1: 
nkeynes@1: MMIO_REGIN_BEGIN( SCIF, 0xFFE80000, "Serial Controller (FIFO) Registers" )
nkeynes@1: MMIO_REGION_END
nkeynes@1: