nkeynes@31: /** nkeynes@218: * $Id: pvr2.c,v 1.33 2006-08-29 08:11:56 nkeynes Exp $ nkeynes@31: * nkeynes@133: * PVR2 (Video) Core module implementation and MMIO registers. nkeynes@31: * nkeynes@31: * Copyright (c) 2005 Nathan Keynes. nkeynes@31: * nkeynes@31: * This program is free software; you can redistribute it and/or modify nkeynes@31: * it under the terms of the GNU General Public License as published by nkeynes@31: * the Free Software Foundation; either version 2 of the License, or nkeynes@31: * (at your option) any later version. nkeynes@31: * nkeynes@31: * This program is distributed in the hope that it will be useful, nkeynes@31: * but WITHOUT ANY WARRANTY; without even the implied warranty of nkeynes@31: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the nkeynes@31: * GNU General Public License for more details. nkeynes@31: */ nkeynes@35: #define MODULE pvr2_module nkeynes@31: nkeynes@1: #include "dream.h" nkeynes@144: #include "display.h" nkeynes@1: #include "mem.h" nkeynes@1: #include "asic.h" nkeynes@103: #include "pvr2/pvr2.h" nkeynes@56: #include "sh4/sh4core.h" nkeynes@1: #define MMIO_IMPL nkeynes@103: #include "pvr2/pvr2mmio.h" nkeynes@1: nkeynes@1: char *video_base; nkeynes@1: nkeynes@133: static void pvr2_init( void ); nkeynes@133: static void pvr2_reset( void ); nkeynes@133: static uint32_t pvr2_run_slice( uint32_t ); nkeynes@133: static void pvr2_save_state( FILE *f ); nkeynes@133: static int pvr2_load_state( FILE *f ); nkeynes@133: nkeynes@94: void pvr2_display_frame( void ); nkeynes@94: nkeynes@161: int colour_format_bytes[] = { 2, 2, 2, 1, 3, 4, 1, 1 }; nkeynes@161: nkeynes@133: struct dreamcast_module pvr2_module = { "PVR2", pvr2_init, pvr2_reset, NULL, nkeynes@133: pvr2_run_slice, NULL, nkeynes@133: pvr2_save_state, pvr2_load_state }; nkeynes@133: nkeynes@103: nkeynes@144: display_driver_t display_driver = NULL; nkeynes@15: nkeynes@103: struct video_timing { nkeynes@103: int fields_per_second; nkeynes@103: int total_lines; nkeynes@108: int retrace_lines; nkeynes@103: int line_time_ns; nkeynes@103: }; nkeynes@103: nkeynes@133: struct video_timing pal_timing = { 50, 625, 65, 32000 }; nkeynes@108: struct video_timing ntsc_timing= { 60, 525, 65, 31746 }; nkeynes@103: nkeynes@133: struct pvr2_state { nkeynes@133: uint32_t frame_count; nkeynes@133: uint32_t line_count; nkeynes@133: uint32_t line_remainder; nkeynes@133: uint32_t irq_vpos1; nkeynes@133: uint32_t irq_vpos2; nkeynes@133: gboolean retrace; nkeynes@133: struct video_timing timing; nkeynes@133: } pvr2_state; nkeynes@15: nkeynes@133: struct video_buffer video_buffer[2]; nkeynes@133: int video_buffer_idx = 0; nkeynes@133: nkeynes@133: static void pvr2_init( void ) nkeynes@1: { nkeynes@1: register_io_region( &mmio_region_PVR2 ); nkeynes@85: register_io_region( &mmio_region_PVR2PAL ); nkeynes@56: register_io_region( &mmio_region_PVR2TA ); nkeynes@1: video_base = mem_get_region_by_name( MEM_REGION_VIDEO ); nkeynes@133: texcache_init(); nkeynes@133: pvr2_reset(); nkeynes@214: pvr2_ta_reset(); nkeynes@133: } nkeynes@133: nkeynes@133: static void pvr2_reset( void ) nkeynes@133: { nkeynes@133: pvr2_state.line_count = 0; nkeynes@133: pvr2_state.line_remainder = 0; nkeynes@133: pvr2_state.irq_vpos1 = 0; nkeynes@133: pvr2_state.irq_vpos2 = 0; nkeynes@133: pvr2_state.retrace = FALSE; nkeynes@133: pvr2_state.timing = ntsc_timing; nkeynes@133: video_buffer_idx = 0; nkeynes@133: nkeynes@133: pvr2_ta_init(); nkeynes@107: pvr2_render_init(); nkeynes@133: texcache_flush(); nkeynes@133: } nkeynes@133: nkeynes@133: static void pvr2_save_state( FILE *f ) nkeynes@133: { nkeynes@133: fwrite( &pvr2_state, sizeof(pvr2_state), 1, f ); nkeynes@193: pvr2_ta_save_state( f ); nkeynes@133: } nkeynes@133: nkeynes@133: static int pvr2_load_state( FILE *f ) nkeynes@133: { nkeynes@153: if( fread( &pvr2_state, sizeof(pvr2_state), 1, f ) != 1 ) nkeynes@153: return 1; nkeynes@193: return pvr2_ta_load_state(f); nkeynes@133: } nkeynes@133: nkeynes@133: static uint32_t pvr2_run_slice( uint32_t nanosecs ) nkeynes@133: { nkeynes@133: pvr2_state.line_remainder += nanosecs; nkeynes@133: while( pvr2_state.line_remainder >= pvr2_state.timing.line_time_ns ) { nkeynes@133: pvr2_state.line_remainder -= pvr2_state.timing.line_time_ns; nkeynes@133: nkeynes@133: pvr2_state.line_count++; nkeynes@133: if( pvr2_state.line_count == pvr2_state.timing.total_lines ) { nkeynes@133: asic_event( EVENT_RETRACE ); nkeynes@133: pvr2_state.line_count = 0; nkeynes@133: pvr2_state.retrace = TRUE; nkeynes@133: } nkeynes@133: nkeynes@133: if( pvr2_state.line_count == pvr2_state.irq_vpos1 ) { nkeynes@133: asic_event( EVENT_SCANLINE1 ); nkeynes@133: } nkeynes@133: if( pvr2_state.line_count == pvr2_state.irq_vpos2 ) { nkeynes@133: asic_event( EVENT_SCANLINE2 ); nkeynes@133: } nkeynes@133: nkeynes@133: if( pvr2_state.line_count == pvr2_state.timing.retrace_lines ) { nkeynes@133: if( pvr2_state.retrace ) { nkeynes@133: pvr2_display_frame(); nkeynes@133: pvr2_state.retrace = FALSE; nkeynes@133: } nkeynes@133: } nkeynes@133: } nkeynes@133: return nanosecs; nkeynes@133: } nkeynes@133: nkeynes@133: int pvr2_get_frame_count() nkeynes@133: { nkeynes@133: return pvr2_state.frame_count; nkeynes@106: } nkeynes@106: nkeynes@103: /** nkeynes@1: * Display the next frame, copying the current contents of video ram to nkeynes@1: * the window. If the video configuration has changed, first recompute the nkeynes@1: * new frame size/depth. nkeynes@1: */ nkeynes@94: void pvr2_display_frame( void ) nkeynes@1: { nkeynes@197: uint32_t display_addr = MMIO_READ( PVR2, DISP_ADDR1 ); nkeynes@103: nkeynes@197: int dispsize = MMIO_READ( PVR2, DISP_SIZE ); nkeynes@197: int dispmode = MMIO_READ( PVR2, DISP_MODE ); nkeynes@197: int vidcfg = MMIO_READ( PVR2, DISP_CFG ); nkeynes@94: int vid_stride = ((dispsize & DISPSIZE_MODULO) >> 20) - 1; nkeynes@94: int vid_lpf = ((dispsize & DISPSIZE_LPF) >> 10) + 1; nkeynes@94: int vid_ppl = ((dispsize & DISPSIZE_PPL)) + 1; nkeynes@103: gboolean bEnabled = (dispmode & DISPMODE_DE) && (vidcfg & DISPCFG_VO ) ? TRUE : FALSE; nkeynes@103: gboolean interlaced = (vidcfg & DISPCFG_I ? TRUE : FALSE); nkeynes@161: video_buffer_t buffer = &video_buffer[video_buffer_idx]; nkeynes@161: video_buffer_idx = !video_buffer_idx; nkeynes@161: video_buffer_t last = &video_buffer[video_buffer_idx]; nkeynes@161: buffer->rowstride = (vid_ppl + vid_stride) << 2; nkeynes@197: buffer->data = video_base + MMIO_READ( PVR2, DISP_ADDR1 ); nkeynes@161: buffer->vres = vid_lpf; nkeynes@161: if( interlaced ) buffer->vres <<= 1; nkeynes@161: switch( (dispmode & DISPMODE_COL) >> 2 ) { nkeynes@161: case 0: nkeynes@161: buffer->colour_format = COLFMT_ARGB1555; nkeynes@161: buffer->hres = vid_ppl << 1; nkeynes@161: break; nkeynes@161: case 1: nkeynes@161: buffer->colour_format = COLFMT_RGB565; nkeynes@161: buffer->hres = vid_ppl << 1; nkeynes@161: break; nkeynes@161: case 2: nkeynes@161: buffer->colour_format = COLFMT_RGB888; nkeynes@161: buffer->hres = (vid_ppl << 2) / 3; nkeynes@161: break; nkeynes@161: case 3: nkeynes@161: buffer->colour_format = COLFMT_ARGB8888; nkeynes@161: buffer->hres = vid_ppl; nkeynes@161: break; nkeynes@161: } nkeynes@161: nkeynes@161: if( buffer->hres <=8 ) nkeynes@161: buffer->hres = 640; nkeynes@161: if( buffer->vres <=8 ) nkeynes@161: buffer->vres = 480; nkeynes@161: if( display_driver != NULL ) { nkeynes@161: if( buffer->hres != last->hres || nkeynes@161: buffer->vres != last->vres || nkeynes@161: buffer->colour_format != last->colour_format) { nkeynes@161: display_driver->set_display_format( buffer->hres, buffer->vres, nkeynes@161: buffer->colour_format ); nkeynes@94: } nkeynes@161: if( !bEnabled ) { nkeynes@161: display_driver->display_blank_frame( 0 ); nkeynes@197: } else if( MMIO_READ( PVR2, DISP_CFG2 ) & 0x08 ) { /* Blanked */ nkeynes@197: uint32_t colour = MMIO_READ( PVR2, DISP_BORDER ); nkeynes@161: display_driver->display_blank_frame( colour ); nkeynes@161: } else if( !pvr2_render_display_frame( PVR2_RAM_BASE + display_addr ) ) { nkeynes@161: display_driver->display_frame( buffer ); nkeynes@65: } nkeynes@1: } nkeynes@133: pvr2_state.frame_count++; nkeynes@1: } nkeynes@1: nkeynes@197: /** nkeynes@197: * This has to handle every single register individually as they all get masked nkeynes@197: * off differently (and its easier to do it at write time) nkeynes@197: */ nkeynes@1: void mmio_region_PVR2_write( uint32_t reg, uint32_t val ) nkeynes@1: { nkeynes@1: if( reg >= 0x200 && reg < 0x600 ) { /* Fog table */ nkeynes@1: MMIO_WRITE( PVR2, reg, val ); nkeynes@1: return; nkeynes@1: } nkeynes@1: nkeynes@1: switch(reg) { nkeynes@189: case PVRID: nkeynes@189: case PVRVER: nkeynes@189: case GUNPOS: nkeynes@189: case TA_POLYPOS: nkeynes@189: case TA_LISTPOS: nkeynes@189: /* Readonly registers */ nkeynes@189: break; nkeynes@197: case PVRRESET: nkeynes@197: val &= 0x00000007; /* Do stuff? */ nkeynes@197: MMIO_WRITE( PVR2, reg, val ); nkeynes@197: break; nkeynes@191: case RENDER_START: nkeynes@189: if( val == 0xFFFFFFFF ) nkeynes@189: pvr2_render_scene(); nkeynes@189: break; nkeynes@191: case PVRUNK1: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x000007FF ); nkeynes@191: break; nkeynes@191: case RENDER_POLYBASE: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x00F00000 ); nkeynes@191: break; nkeynes@191: case RENDER_TSPCFG: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x00010101 ); nkeynes@191: break; nkeynes@197: case DISP_BORDER: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x01FFFFFF ); nkeynes@191: break; nkeynes@197: case DISP_MODE: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x00FFFF7F ); nkeynes@191: break; nkeynes@191: case RENDER_MODE: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x00FFFF0F ); nkeynes@191: break; nkeynes@191: case RENDER_SIZE: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x000001FF ); nkeynes@191: break; nkeynes@197: case DISP_ADDR1: nkeynes@189: val &= 0x00FFFFFC; nkeynes@189: MMIO_WRITE( PVR2, reg, val ); nkeynes@133: if( pvr2_state.retrace ) { nkeynes@108: pvr2_display_frame(); nkeynes@133: pvr2_state.retrace = FALSE; nkeynes@108: } nkeynes@108: break; nkeynes@197: case DISP_ADDR2: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x00FFFFFC ); nkeynes@191: break; nkeynes@197: case DISP_SIZE: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x3FFFFFFF ); nkeynes@191: break; nkeynes@191: case RENDER_ADDR1: nkeynes@191: case RENDER_ADDR2: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x01FFFFFC ); nkeynes@191: break; nkeynes@191: case RENDER_HCLIP: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x07FF07FF ); nkeynes@189: break; nkeynes@191: case RENDER_VCLIP: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x03FF03FF ); nkeynes@189: break; nkeynes@197: case DISP_HPOSIRQ: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x03FF33FF ); nkeynes@189: break; nkeynes@197: case DISP_VPOSIRQ: nkeynes@189: val = val & 0x03FF03FF; nkeynes@189: pvr2_state.irq_vpos1 = (val >> 16); nkeynes@133: pvr2_state.irq_vpos2 = val & 0x03FF; nkeynes@189: MMIO_WRITE( PVR2, reg, val ); nkeynes@103: break; nkeynes@197: case RENDER_NEARCLIP: nkeynes@197: MMIO_WRITE( PVR2, reg, val & 0x7FFFFFFF ); nkeynes@197: break; nkeynes@191: case RENDER_SHADOW: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x000001FF ); nkeynes@191: break; nkeynes@191: case RENDER_OBJCFG: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x003FFFFF ); nkeynes@191: break; nkeynes@197: case PVRUNK2: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x00000007 ); nkeynes@197: break; nkeynes@191: case RENDER_TSPCLIP: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x7FFFFFFF ); nkeynes@191: break; nkeynes@197: case RENDER_FARCLIP: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0xFFFFFFF0 ); nkeynes@197: break; nkeynes@191: case RENDER_BGPLANE: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x1FFFFFFF ); nkeynes@191: break; nkeynes@191: case RENDER_ISPCFG: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x00FFFFF9 ); nkeynes@191: break; nkeynes@197: case VRAM_CFG1: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x000000FF ); nkeynes@197: break; nkeynes@197: case VRAM_CFG2: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x003FFFFF ); nkeynes@197: break; nkeynes@197: case VRAM_CFG3: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x1FFFFFFF ); nkeynes@197: break; nkeynes@197: case RENDER_FOGTBLCOL: nkeynes@197: case RENDER_FOGVRTCOL: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x00FFFFFF ); nkeynes@197: break; nkeynes@197: case RENDER_FOGCOEFF: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x0000FFFF ); nkeynes@197: break; nkeynes@197: case RENDER_CLAMPHI: nkeynes@197: case RENDER_CLAMPLO: nkeynes@197: MMIO_WRITE( PVR2, reg, val ); nkeynes@197: break; nkeynes@197: case DISP_CFG: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x000003FF ); nkeynes@197: break; nkeynes@197: case DISP_HBORDER: nkeynes@197: case DISP_SYNC: nkeynes@197: case DISP_VBORDER: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x03FF03FF ); nkeynes@197: break; nkeynes@197: case DISP_SYNC2: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0xFFFFFF7F ); nkeynes@197: break; nkeynes@197: case RENDER_TEXSIZE: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x00031F1F ); nkeynes@197: break; nkeynes@197: case DISP_CFG2: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x003F01FF ); nkeynes@197: break; nkeynes@197: case DISP_HPOS: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x000003FF ); nkeynes@197: break; nkeynes@197: case DISP_VPOS: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x03FF03FF ); nkeynes@197: break; nkeynes@197: case SCALERCFG: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x0007FFFF ); nkeynes@197: break; nkeynes@197: case RENDER_PALETTE: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x00000003 ); nkeynes@197: break; nkeynes@197: case PVRUNK3: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x000FFF3F ); nkeynes@197: break; nkeynes@197: case PVRUNK5: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x0000FFFF ); nkeynes@197: break; nkeynes@197: case PVRUNK6: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x000000FF ); nkeynes@197: break; nkeynes@189: case TA_TILEBASE: nkeynes@193: case TA_LISTEND: nkeynes@189: case TA_LISTBASE: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x00FFFFE0 ); nkeynes@189: break; nkeynes@191: case RENDER_TILEBASE: nkeynes@189: case TA_POLYBASE: nkeynes@189: case TA_POLYEND: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x00FFFFFC ); nkeynes@189: break; nkeynes@189: case TA_TILESIZE: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x000F003F ); nkeynes@189: break; nkeynes@189: case TA_TILECFG: nkeynes@191: MMIO_WRITE( PVR2, reg, val&0x00133333 ); nkeynes@189: break; nkeynes@197: case YUV_ADDR: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x00FFFFF8 ); nkeynes@197: break; nkeynes@197: case YUV_CFG: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x01013F3F ); nkeynes@197: break; nkeynes@189: case TA_INIT: nkeynes@100: if( val & 0x80000000 ) nkeynes@100: pvr2_ta_init(); nkeynes@100: break; nkeynes@197: case TA_REINIT: nkeynes@197: break; nkeynes@197: case PVRUNK7: nkeynes@197: MMIO_WRITE( PVR2, reg, val&0x00000001 ); nkeynes@197: break; nkeynes@1: } nkeynes@1: } nkeynes@1: nkeynes@1: MMIO_REGION_READ_FN( PVR2, reg ) nkeynes@1: { nkeynes@1: switch( reg ) { nkeynes@197: case DISP_BEAMPOS: nkeynes@2: return sh4r.icount&0x20 ? 0x2000 : 1; nkeynes@1: default: nkeynes@1: return MMIO_READ( PVR2, reg ); nkeynes@1: } nkeynes@1: } nkeynes@19: nkeynes@85: MMIO_REGION_DEFFNS( PVR2PAL ) nkeynes@85: nkeynes@19: void pvr2_set_base_address( uint32_t base ) nkeynes@19: { nkeynes@197: mmio_region_PVR2_write( DISP_ADDR1, base ); nkeynes@19: } nkeynes@56: nkeynes@56: nkeynes@65: nkeynes@98: nkeynes@56: int32_t mmio_region_PVR2TA_read( uint32_t reg ) nkeynes@56: { nkeynes@56: return 0xFFFFFFFF; nkeynes@56: } nkeynes@56: nkeynes@56: void mmio_region_PVR2TA_write( uint32_t reg, uint32_t val ) nkeynes@56: { nkeynes@189: pvr2_ta_write( (char *)&val, sizeof(uint32_t) ); nkeynes@56: } nkeynes@56: nkeynes@85: nkeynes@103: void pvr2_vram64_write( sh4addr_t destaddr, char *src, uint32_t length ) nkeynes@103: { nkeynes@103: int bank_flag = (destaddr & 0x04) >> 2; nkeynes@103: uint32_t *banks[2]; nkeynes@103: uint32_t *dwsrc; nkeynes@103: int i; nkeynes@65: nkeynes@103: destaddr = destaddr & 0x7FFFFF; nkeynes@103: if( destaddr + length > 0x800000 ) { nkeynes@103: length = 0x800000 - destaddr; nkeynes@103: } nkeynes@103: nkeynes@103: for( i=destaddr & 0xFFFFF000; i < destaddr + length; i+= PAGE_SIZE ) { nkeynes@103: texcache_invalidate_page( i ); nkeynes@103: } nkeynes@103: nkeynes@108: banks[0] = ((uint32_t *)(video_base + ((destaddr & 0x007FFFF8) >>1))); nkeynes@103: banks[1] = banks[0] + 0x100000; nkeynes@108: if( bank_flag ) nkeynes@108: banks[0]++; nkeynes@103: nkeynes@103: /* Handle non-aligned start of source */ nkeynes@103: if( destaddr & 0x03 ) { nkeynes@103: char *dest = ((char *)banks[bank_flag]) + (destaddr & 0x03); nkeynes@103: for( i= destaddr & 0x03; i < 4 && length > 0; i++, length-- ) { nkeynes@103: *dest++ = *src++; nkeynes@103: } nkeynes@103: bank_flag = !bank_flag; nkeynes@103: } nkeynes@103: nkeynes@103: dwsrc = (uint32_t *)src; nkeynes@103: while( length >= 4 ) { nkeynes@103: *banks[bank_flag]++ = *dwsrc++; nkeynes@103: bank_flag = !bank_flag; nkeynes@103: length -= 4; nkeynes@103: } nkeynes@103: nkeynes@103: /* Handle non-aligned end of source */ nkeynes@103: if( length ) { nkeynes@103: src = (char *)dwsrc; nkeynes@103: char *dest = (char *)banks[bank_flag]; nkeynes@103: while( length-- > 0 ) { nkeynes@103: *dest++ = *src++; nkeynes@103: } nkeynes@103: } nkeynes@218: } nkeynes@103: nkeynes@218: void pvr2_vram_write_invert( sh4addr_t destaddr, char *src, uint32_t length, uint32_t line_length ) nkeynes@218: { nkeynes@218: char *dest = video_base + (destaddr & 0x007FFFFF); nkeynes@218: char *p = src + length - line_length; nkeynes@218: while( p >= src ) { nkeynes@218: memcpy( dest, p, line_length ); nkeynes@218: p -= line_length; nkeynes@218: dest += line_length; nkeynes@218: } nkeynes@103: } nkeynes@103: nkeynes@103: void pvr2_vram64_read( char *dest, sh4addr_t srcaddr, uint32_t length ) nkeynes@103: { nkeynes@103: int bank_flag = (srcaddr & 0x04) >> 2; nkeynes@103: uint32_t *banks[2]; nkeynes@103: uint32_t *dwdest; nkeynes@103: int i; nkeynes@103: nkeynes@103: srcaddr = srcaddr & 0x7FFFFF; nkeynes@103: if( srcaddr + length > 0x800000 ) nkeynes@103: length = 0x800000 - srcaddr; nkeynes@103: nkeynes@108: banks[0] = ((uint32_t *)(video_base + ((srcaddr&0x007FFFF8)>>1))); nkeynes@103: banks[1] = banks[0] + 0x100000; nkeynes@108: if( bank_flag ) nkeynes@108: banks[0]++; nkeynes@103: nkeynes@103: /* Handle non-aligned start of source */ nkeynes@103: if( srcaddr & 0x03 ) { nkeynes@103: char *src = ((char *)banks[bank_flag]) + (srcaddr & 0x03); nkeynes@103: for( i= srcaddr & 0x03; i < 4 && length > 0; i++, length-- ) { nkeynes@103: *dest++ = *src++; nkeynes@103: } nkeynes@103: bank_flag = !bank_flag; nkeynes@103: } nkeynes@103: nkeynes@103: dwdest = (uint32_t *)dest; nkeynes@103: while( length >= 4 ) { nkeynes@103: *dwdest++ = *banks[bank_flag]++; nkeynes@103: bank_flag = !bank_flag; nkeynes@103: length -= 4; nkeynes@103: } nkeynes@103: nkeynes@103: /* Handle non-aligned end of source */ nkeynes@103: if( length ) { nkeynes@103: dest = (char *)dwdest; nkeynes@103: char *src = (char *)banks[bank_flag]; nkeynes@103: while( length-- > 0 ) { nkeynes@103: *dest++ = *src++; nkeynes@103: } nkeynes@103: } nkeynes@103: } nkeynes@127: nkeynes@127: void pvr2_vram64_dump( sh4addr_t addr, uint32_t length, FILE *f ) nkeynes@127: { nkeynes@127: char tmp[length]; nkeynes@127: pvr2_vram64_read( tmp, addr, length ); nkeynes@127: fwrite_dump( tmp, length, f ); nkeynes@127: }