--- a/src/pvr2/texcache.c Tue Jan 01 05:08:38 2008 +0000 +++ b/src/pvr2/texcache.c Thu Feb 14 14:06:41 2008 +0000 @@ -67,6 +67,7 @@ for( i=0; inext; } + /* Not found - check the free list */ texcache_entry_index slot = 0; @@ -561,6 +564,45 @@ /* Construct the GL texture */ glBindTexture( GL_TEXTURE_2D, texcache_active_list[slot].texture_id ); texcache_load_texture( texture_addr, width, height, mode ); - + + texcache_integrity_check(); return texcache_active_list[slot].texture_id; } + +/** + * Check the integrity of the texcache. Verifies that every cache slot + * appears exactly once on either the free list or one page list. For + * active slots, the texture address must also match the page it appears on. + * + */ +void texcache_integrity_check() +{ + int i; + int slot_found[MAX_TEXTURES]; + + memset( slot_found, 0, sizeof(slot_found) ); + + /* Check entries on the free list */ + for( i= texcache_free_ptr; i< MAX_TEXTURES; i++ ) { + int slot = texcache_free_list[i]; + assert( slot_found[slot] == 0 ); + assert( texcache_active_list[slot].next == EMPTY_ENTRY ); + slot_found[slot] = 1; + } + + /* Check entries on the active lists */ + for( i=0; i< PVR2_RAM_PAGES; i++ ) { + int slot = texcache_page_lookup[i]; + while( slot != EMPTY_ENTRY ) { + assert( slot_found[slot] == 0 ); + assert( (texcache_active_list[slot].texture_addr >> 12) == i ); + slot_found[slot] = 2; + slot = texcache_active_list[slot].next; + } + } + + /* Make sure we didn't miss any entries */ + for( i=0; i